SDMP_IOT / Mbed OS AdiSense1000_SmartBabySeat

Fork of Babyseat_NewFirmware_copy_sean by Ross O'Halloran

inc/registers/ADISENSE1000_REGISTERS_device.h

Committer:
kevin1990
Date:
2017-08-25
Revision:
2:625a45555a85

File content as of revision 2:625a45555a85:

/* ================================================================================
 
     Created by   : sherry
     Created on   : 2017 Jul 27, 19:13 IST

     Project      :   ADISENSE1000_REGISTERS
     File         :   ADISENSE1000_REGISTERS_device.h
     Description  :   C Register Definitions

     !! ADI Confidential !!
       INTERNAL USE ONLY

     Copyright (c) 2017 Analog Devices, Inc.  All Rights Reserved.
     This software is proprietary and confidential to Analog Devices, Inc. and
     its licensors.

     This file was auto-generated. Do not make local changes to this file.
 
     Auto generation script information:
       Script:        /usr/cadtools/bin/yoda.dir/generators/inc/genHeaders
       Last modified: 26-MAY-2017

   ================================================================================ */

#ifndef _ADISENSE1000_REGISTERS_DEVICE_H
#define _ADISENSE1000_REGISTERS_DEVICE_H

/* pickup integer types */
#if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__))
#include <stdint.h>
#endif /* _LANGUAGE_C */

/* pickup register bitfield and bit masks */
#include "ADISENSE1000_REGISTERS_typedefs.h"

#if defined ( __CC_ARM   )
#pragma push
#pragma anon_unions
#endif


#ifndef __IO
#define     __I     volatile      /* read-only */
#define     __C
#define     __RC    const         /* read-only memory ROM*/
#define     __O     volatile      /* write-only */
#define     __IO    volatile      /* read-write */
#endif
/** @defgroup SPI  (SPI) Module
 *  
 *  @{
 */

/*! ==========================================================================
 *  \struct ADI_SPI_TypeDef
 *  \brief  
 *  ========================================================================== */
typedef struct _ADI_SENSE_SPI_TypeDef
{
    __IO     uint8_t    INTERFACE_CONFIG_A;            /*!<  */
    __IO     uint8_t    INTERFACE_CONFIG_B;            /*!<  */
    __IO     uint8_t    DEVICE_CONFIG;                 /*!<  */
    __I __C  uint8_t    CHIP_TYPE;                     /*!<  */
    __I __C  uint8_t    PRODUCT_ID_L;                  /*!<  */
    __I __C  uint8_t    PRODUCT_ID_H;                  /*!<  */
    __I __C  uint8_t    CHIP_GRADE;                    /*!<  */
    __I __C  uint8_t  RESERVED0[3];
    __IO     uint8_t    SCRATCH_PAD;                   /*!<  */
    __I __C  uint8_t    SPI_REVISION;                  /*!<  */
    __I __C  uint8_t    VENDOR_L;                      /*!<  */
    __I __C  uint8_t    VENDOR_H;                      /*!<  */
    __IO     uint8_t    STREAM_MODE;                   /*!<  */
    __I __C  uint8_t  RESERVED1;
    __IO     uint8_t    INTERFACE_CONFIG_C;            /*!<  */
    __I __C  uint8_t    INTERFACE_STATUS_A;            /*!<  */
} ADI_SENSE_SPI_TypeDef;

/*!@}*/

/** @defgroup CORE ADISENSE1000 Core  (CORE) Module
 *  ADISENSE1000 Core 
 *  @{
 */

/*! ==========================================================================
 *  \struct ADI_CORE_TypeDef
 *  \brief  ADISENSE1000 Core 
 *  ========================================================================== */
typedef struct _ADI_SENSE_CORE_TypeDef
{
    __I __C  uint8_t  RESERVED0[4];
    __O      uint8_t    COMMAND;                       /*!< Special Command */
    __I __C  uint8_t  RESERVED1[3];
    __IO     uint8_t    MODE;                          /*!< Operating Mode and DRDY Control */
    __IO     uint8_t    POWER_CONFIG;                  /*!< General Configuration */
    __IO     uint16_t   CYCLE_CONTROL;                 /*!< Measurement Cycle */
    __IO     uint8_t    FIFO_NUM_CYCLES;               /*!< Number of Measurement Cycles to Store in FIFO */
    __IO     uint8_t    MULTI_CYCLE_RATE;              /*!< Time Between Repeats of Multi-Cycle Conversions.... */
    __I __C  uint8_t  RESERVED2[2];
    __I __C  uint8_t    STATUS;                        /*!< General Status */
    __I __C  uint8_t  RESERVED3[3];
    __I __C  uint16_t   DIAGNOSTICS_STATUS;            /*!< Diagnostics Status */
    __I __C  uint16_t   CHANNEL_ALERT_STATUS;          /*!< Alert Status Summary */
    __I __C  uint8_t    ALERT_DETAIL_CH[13];           /*!< Detailed Error Information */
    __I __C  uint8_t  RESERVED4[11];
    __IO     uint32_t   EXTERNAL_REFERENCE1;           /*!< External Reference Information */
    __IO     uint32_t   EXTERNAL_REFERENCE2;           /*!< External Reference Information */
    __IO     uint8_t    DIAGNOSTICS_CONTROL;           /*!< Diagnostic Control */
    __IO     uint8_t    DIAGNOSTICS_EXTRA;             /*!< Extra Diagnostics Control */
    __I __C  uint8_t  RESERVED5[6];
    __I __C  uint64_t   DATA_FIFO;                     /*!< FIFO of Sensor Results */
    __I __C  uint8_t  RESERVED6[8];
    __IO     uint8_t    LUT_SELECT;                    /*!< Pointer to Custom Lookup Table or Polynomial */
    __I __C  uint8_t  RESERVED7;
    __IO     uint16_t   LUT_OFFSET;                    /*!< Offset into Selected LUT */
    __IO     uint8_t    LUT_DATA;                      /*!< Data to Read/Write from Addressed LUT Entry */
    __I __C  uint8_t  RESERVED8[3];
    __IO     uint8_t    CAL_SELECT;                    /*!< Pointer to Calibration Values */
    __I __C  uint8_t  RESERVED9;
    __IO     uint16_t   CAL_OFFSET;                    /*!< Offset into Selected Calibration Values */
    __IO     uint8_t    CAL_DATA;                      /*!< Data to Read/Write from Addressed Calibration Values */
    __I __C  uint8_t  RESERVED10[15];
    __I __C  uint32_t   REVISION;                      /*!< Hardware, Firmware Revision */
    __I __C  uint8_t  RESERVED11[16];
    __IO     uint8_t    CHANNEL_COUNT[11];             /*!< Number of Channel Occurrences per Measurement Cycle */
} ADI_SENSE_CORE_TypeDef;

/*!@}*/

/** @defgroup TEST Test  (TEST) Module
 *  Test 
 *  @{
 */

/*! ==========================================================================
 *  \struct ADI_TEST_TypeDef
 *  \brief  Test 
 *  ========================================================================== */
typedef struct _ADI_SENSE_TEST_TypeDef
{
    __IO     uint8_t    TEST_REG_0;                    /*!< Test Register 0 */
} ADI_SENSE_TEST_TypeDef;

/*!@}*/

/* ******************************************************************************
 *    Peripheral Memory Map Declarations
 * *****************************************************************************/
/*!    @defgroup PMEMMAPDEC Peripheral Memory Map Declarations
 *     \addtogroup PMEMMAPDEC
 *     @{ */
#define ADI_SENSE_SPI_BASE                   0x00000000    /*!<  Base address of SPI */
#define ADI_SENSE_CORE_BASE                  0x00000010    /*!<  Base address of CORE */
#define ADI_SENSE_TEST_BASE                  0x00000400    /*!<  Base address of TEST */

/*!    @} */

/* ******************************************************************************
 *    Peripheral Pointer Declarations
 * *****************************************************************************/
/*!    @Defgroup Pptrdec Peripheral Pointer Declarations
 *     \Addtogroup Pptrdec
 *     @{ */
#define pADI_SENSE_SPI                       ((ADI_SENSE_SPI_TypeDef      *) ADI_SPI_BASE        ) /*!<  Pointer to  (SPI) */
#define pADI_SENSE_CORE                      ((ADI_SENSE_CORE_TypeDef     *) ADI_CORE_BASE       ) /*!<  Pointer to ADISENSE1000 Core  (CORE) */
#define pADI_SENSE_TEST                      ((ADI_SENSE_TEST_TypeDef     *) ADI_TEST_BASE       ) /*!<  Pointer to Test  (TEST) */

/*!    @} */


#if defined (__CC_ARM)
#pragma pop
#endif 

#endif