Diff: targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c

Revision:

84:f54042cbc282

Parent:

70:c1fbde68b492

--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c	Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c	Mon Feb 03 09:30:05 2014 +0000
@@ -30,41 +30,29 @@
 #include "sleep_api.h"
 #include "cmsis.h"
 
-// This function is only necessary if the HSE is used.
-/*
-static void SYSCLKConfig_STOP(void)
-{
-    ErrorStatus HSEStartUpStatus;
-  
-    RCC_HSEConfig(RCC_HSE_ON); // Enable HSE
-  
-    HSEStartUpStatus = RCC_WaitForHSEStartUp(); // Wait till HSE is ready
-
-    if (HSEStartUpStatus == SUCCESS) {
-        RCC_PLLCmd(ENABLE); // Enable PLL
-        while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} // Wait till PLL is ready
-        RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); // Select PLL as system clock source
-        while(RCC_GetSYSCLKSource() != 0x08) {} // Wait till PLL is used as system clock source
-    }
-}
-*/
-
 void sleep(void)
 {
+    // Disable us_ticker update interrupt
+    TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
+  
     SCB->SCR = 0; // Normal sleep mode for ARM core
     __WFI();
+  
+    // Re-enable us_ticker update interrupt
+    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);  
 }
 
 void deepsleep(void)
-{    
+{
+    // Disable us_ticker update interrupt
+    TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
+  
     // Enable PWR clock
     RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
     
     // Request to enter STOP mode with regulator in low power mode
-    PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);  
-    
-    // At this stage the system has resumed from STOP mode.
-    // Re-configure the system clock: enable HSE, PLL and select 
-    // PLL as system clock source (because HSE and PLL are disabled in STOP mode).
-    //SYSCLKConfig_STOP();
+    PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
+
+    // Re-enable us_ticker update interrupt
+    TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);  
 }