SDI lab / Mbed 2 deprecated RAM_Burst_test

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Dependencies:   mbed

main.cpp@0:3cf5359a87e8, 2014-01-17 (annotated)

Committer:
cillino
Date:
Fri Jan 17 20:33:26 2014 +0000
Revision:
0:3cf5359a87e8
RAM Burst test for SPI slave.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cillino 0:3cf5359a87e8 1 #include "mbed.h"
cillino 0:3cf5359a87e8 2
cillino 0:3cf5359a87e8 3 DigitalOut redLed( LED_RED ); // Led used to signal errors
cillino 0:3cf5359a87e8 4 DigitalOut spiSS( PTD0 ); // Slave select is handled by GPIO
cillino 0:3cf5359a87e8 5
cillino 0:3cf5359a87e8 6 int main() {
cillino 0:3cf5359a87e8 7 redLed = 0;
cillino 0:3cf5359a87e8 8 // Create SPI master instance, 8bit, CPOL=0, CPHA=1, 100kHz
cillino 0:3cf5359a87e8 9 SPI spiMaster( PTD2, PTD3, PTD1 ); // mosi, miso, sclk
cillino 0:3cf5359a87e8 10 spiMaster.format( 8, 1 );
cillino 0:3cf5359a87e8 11 spiMaster.frequency( 10000 );
cillino 0:3cf5359a87e8 12 // Deselect slave
cillino 0:3cf5359a87e8 13 spiSS = 1;
cillino 0:3cf5359a87e8 14 // Forever
cillino 0:3cf5359a87e8 15 wait(1);
cillino 0:3cf5359a87e8 16
cillino 0:3cf5359a87e8 17 while( 1 ) {
cillino 0:3cf5359a87e8 18 int rx, dd1, dd2;
cillino 0:3cf5359a87e8 19 // Burst write
cillino 0:3cf5359a87e8 20 spiSS = 0;
cillino 0:3cf5359a87e8 21 spiMaster.write( '#' );
cillino 0:3cf5359a87e8 22 spiMaster.write( 0x07 ); // write RAM burst
cillino 0:3cf5359a87e8 23 spiMaster.write( 0x01 ); // AA1
cillino 0:3cf5359a87e8 24 spiMaster.write( 0x02 ); // AA2
cillino 0:3cf5359a87e8 25 spiMaster.write( 0x03 ); // AA3
cillino 0:3cf5359a87e8 26
cillino 0:3cf5359a87e8 27
cillino 0:3cf5359a87e8 28 for(int i = 0; i < 100; i++ ){
cillino 0:3cf5359a87e8 29 spiMaster.write( i ); // DD1
cillino 0:3cf5359a87e8 30 spiMaster.write( i+1 ); // DD2
cillino 0:3cf5359a87e8 31
cillino 0:3cf5359a87e8 32 do{
cillino 0:3cf5359a87e8 33 rx = spiMaster.write( 0x55 );
cillino 0:3cf5359a87e8 34 }while( rx != '@' );
cillino 0:3cf5359a87e8 35 rx = 0;
cillino 0:3cf5359a87e8 36 }
cillino 0:3cf5359a87e8 37
cillino 0:3cf5359a87e8 38 spiMaster.write( '#' ); // termina burst
cillino 0:3cf5359a87e8 39
cillino 0:3cf5359a87e8 40
cillino 0:3cf5359a87e8 41 spiSS = 1;
cillino 0:3cf5359a87e8 42 wait( 1 );
cillino 0:3cf5359a87e8 43
cillino 0:3cf5359a87e8 44 // Burst Read
cillino 0:3cf5359a87e8 45 spiSS = 0;
cillino 0:3cf5359a87e8 46 spiMaster.write( '#' );
cillino 0:3cf5359a87e8 47 spiMaster.write( 0x05 ); // burst read RAM
cillino 0:3cf5359a87e8 48 spiMaster.write( 0x01 ); // AA1
cillino 0:3cf5359a87e8 49 spiMaster.write( 0x02 ); // AA2
cillino 0:3cf5359a87e8 50 spiMaster.write( 0x03 ); // AA3
cillino 0:3cf5359a87e8 51
cillino 0:3cf5359a87e8 52 for(int i = 0; i < 100; i++ ){
cillino 0:3cf5359a87e8 53 do{
cillino 0:3cf5359a87e8 54 rx = spiMaster.write( 0x55 );
cillino 0:3cf5359a87e8 55 }while( rx != '@' );
cillino 0:3cf5359a87e8 56 rx = 0;
cillino 0:3cf5359a87e8 57
cillino 0:3cf5359a87e8 58 dd1 = spiMaster.write( 0x55 );
cillino 0:3cf5359a87e8 59 dd2 = spiMaster.write( 0x55 );
cillino 0:3cf5359a87e8 60
cillino 0:3cf5359a87e8 61 //if( (dd1 == i) && (dd2 == (i+2))){
cillino 0:3cf5359a87e8 62 // redLed = 1;
cillino 0:3cf5359a87e8 63 //}
cillino 0:3cf5359a87e8 64
cillino 0:3cf5359a87e8 65 if(( dd1 != i ) or (dd2 != (i+1) )){
cillino 0:3cf5359a87e8 66 redLed = 0; // NON DEVE SBAGLIARE
cillino 0:3cf5359a87e8 67 //wait( 0.5 );
cillino 0:3cf5359a87e8 68 }
cillino 0:3cf5359a87e8 69 redLed = 1;
cillino 0:3cf5359a87e8 70
cillino 0:3cf5359a87e8 71 //redLed = 0;
cillino 0:3cf5359a87e8 72 //wait( 0.5 );
cillino 0:3cf5359a87e8 73 }
cillino 0:3cf5359a87e8 74
cillino 0:3cf5359a87e8 75 spiSS = 1;
cillino 0:3cf5359a87e8 76 }
cillino 0:3cf5359a87e8 77 }