S5_mbed / MMA8452

library mma8452

Dependents:   APP3_Capteur_V2

Fork of MMA8452 by Ashley Mills

MMA8452.cpp@22:9faeeb5b104d, 2017-09-29 (annotated)

Committer:
EtienneB
Date:
Fri Sep 29 19:54:58 2017 +0000
Revision:
22:9faeeb5b104d
Parent:
21:a92a632a0cc7 
removed the init printf;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ashleymills 14:0602b45ca70f 1 // Authors: Ashley Mills, Nicholas Herriot
nherriot 0:bcf2aa85d7f9 2 /* Copyright (c) 2013 Vodafone, MIT License
nherriot 0:bcf2aa85d7f9 3 *
nherriot 0:bcf2aa85d7f9 4 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
nherriot 0:bcf2aa85d7f9 5 * and associated documentation files (the "Software"), to deal in the Software without restriction,
nherriot 0:bcf2aa85d7f9 6 * including without limitation the rights to use, copy, modify, merge, publish, distribute,
nherriot 0:bcf2aa85d7f9 7 * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
nherriot 0:bcf2aa85d7f9 8 * furnished to do so, subject to the following conditions:
nherriot 0:bcf2aa85d7f9 9 *
nherriot 0:bcf2aa85d7f9 10 * The above copyright notice and this permission notice shall be included in all copies or
nherriot 0:bcf2aa85d7f9 11 * substantial portions of the Software.
nherriot 0:bcf2aa85d7f9 12 *
nherriot 0:bcf2aa85d7f9 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
nherriot 0:bcf2aa85d7f9 14 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
nherriot 0:bcf2aa85d7f9 15 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
nherriot 0:bcf2aa85d7f9 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
nherriot 0:bcf2aa85d7f9 17 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
nherriot 0:bcf2aa85d7f9 18 */
nherriot 0:bcf2aa85d7f9 19
ashleymills 11:dfd1e0afcb7b 20 #include "MMA8452.h"
ashleymills 11:dfd1e0afcb7b 21 #include "mbed.h"
ashleymills 11:dfd1e0afcb7b 22
ashleymills 17:6e4232c421c0 23 #ifdef MMA8452_DEBUG
ashleymills 19:4d6cd7140a71 24 // you need to define Serial pc(USBTX,USBRX) somewhere for the below line to make sense
ashleymills 11:dfd1e0afcb7b 25 extern Serial pc;
ashleymills 17:6e4232c421c0 26 #define MMA8452_DBG(...) pc.printf(__VA_ARGS__); pc.printf("\r\n");
ashleymills 17:6e4232c421c0 27 #else
ashleymills 17:6e4232c421c0 28 #define MMA8452_DBG(...)
ashleymills 17:6e4232c421c0 29 #endif
nherriot 0:bcf2aa85d7f9 30
nherriot 0:bcf2aa85d7f9 31 // Connect module at I2C address using I2C port pins sda and scl
ashleymills 11:dfd1e0afcb7b 32 MMA8452::MMA8452(PinName sda, PinName scl, int frequency) : _i2c(sda, scl) , _frequency(frequency) {
ashleymills 12:172540ff6b8b 33
ashleymills 12:172540ff6b8b 34 // set I2C frequency
ashleymills 11:dfd1e0afcb7b 35 _i2c.frequency(_frequency);
ashleymills 11:dfd1e0afcb7b 36
ashleymills 12:172540ff6b8b 37 // setup read and write addresses for convenience
ashleymills 11:dfd1e0afcb7b 38 _readAddress = MMA8452_ADDRESS | 0x01;
ashleymills 11:dfd1e0afcb7b 39 _writeAddress = MMA8452_ADDRESS & 0xFE;
ashleymills 12:172540ff6b8b 40
ashleymills 12:172540ff6b8b 41 // set some defaults
ashleymills 12:172540ff6b8b 42 _bitDepth = BIT_DEPTH_UNKNOWN;
ashleymills 12:172540ff6b8b 43 setBitDepth(BIT_DEPTH_12);
ashleymills 13:4bd8b4cd479d 44 _dynamicRange = DYNAMIC_RANGE_UNKNOWN;
ashleymills 13:4bd8b4cd479d 45 setDynamicRange(DYNAMIC_RANGE_2G);
ashleymills 13:4bd8b4cd479d 46
nherriot 0:bcf2aa85d7f9 47 }
nherriot 0:bcf2aa85d7f9 48
nherriot 0:bcf2aa85d7f9 49
nherriot 0:bcf2aa85d7f9 50 // Destroys instance
ashleymills 10:ca9ba7ad4e94 51 MMA8452::~MMA8452() {}
nherriot 0:bcf2aa85d7f9 52
nherriot 0:bcf2aa85d7f9 53 // Setting the control register bit 1 to true to activate the MMA8452
ashleymills 10:ca9ba7ad4e94 54 int MMA8452::activate() {
ashleymills 6:f6bde04bf8be 55 // perform write and return error code
ashleymills 12:172540ff6b8b 56 return logicalORRegister(MMA8452_CTRL_REG_1,MMA8452_ACTIVE_MASK);
nherriot 3:ffb0b1650ca2 57 }
nherriot 3:ffb0b1650ca2 58
ashleymills 11:dfd1e0afcb7b 59 // Setting the control register bit 1 to 0 to standby the MMA8452
ashleymills 11:dfd1e0afcb7b 60 int MMA8452::standby() {
ashleymills 11:dfd1e0afcb7b 61 // perform write and return error code
ashleymills 12:172540ff6b8b 62 return logicalANDRegister(MMA8452_CTRL_REG_1,MMA8452_STANDBY_MASK);
nherriot 5:b3d0abd97e55 63 }
nherriot 5:b3d0abd97e55 64
ashleymills 11:dfd1e0afcb7b 65 // this reads a register, applies a bitmask with logical AND, sets a value with logical OR,
ashleymills 11:dfd1e0afcb7b 66 // and optionally goes into and out of standby at the beginning and end of the function respectively
ashleymills 11:dfd1e0afcb7b 67 int MMA8452::maskAndApplyRegister(char reg, char mask, char value, int toggleActivation) {
ashleymills 11:dfd1e0afcb7b 68 if(toggleActivation) {
ashleymills 11:dfd1e0afcb7b 69 if(standby()) {
ashleymills 11:dfd1e0afcb7b 70 return 1;
ashleymills 11:dfd1e0afcb7b 71 }
ashleymills 11:dfd1e0afcb7b 72 }
ashleymills 11:dfd1e0afcb7b 73
ashleymills 11:dfd1e0afcb7b 74 // read from register
ashleymills 11:dfd1e0afcb7b 75 char oldValue = 0;
ashleymills 11:dfd1e0afcb7b 76 if(readRegister(reg,&oldValue)) {
ashleymills 11:dfd1e0afcb7b 77 return 1;
ashleymills 11:dfd1e0afcb7b 78 }
ashleymills 11:dfd1e0afcb7b 79
ashleymills 11:dfd1e0afcb7b 80 // apply bitmask
ashleymills 11:dfd1e0afcb7b 81 oldValue &= mask;
ashleymills 11:dfd1e0afcb7b 82
ashleymills 11:dfd1e0afcb7b 83 // set value
ashleymills 11:dfd1e0afcb7b 84 oldValue |= value;
ashleymills 11:dfd1e0afcb7b 85
ashleymills 11:dfd1e0afcb7b 86 // write back to register
ashleymills 11:dfd1e0afcb7b 87 if(writeRegister(reg,oldValue)) {
ashleymills 11:dfd1e0afcb7b 88 return 1;
ashleymills 11:dfd1e0afcb7b 89 }
ashleymills 11:dfd1e0afcb7b 90
ashleymills 11:dfd1e0afcb7b 91 if(toggleActivation) {
ashleymills 11:dfd1e0afcb7b 92 if(activate()) {
ashleymills 11:dfd1e0afcb7b 93 return 1;
ashleymills 11:dfd1e0afcb7b 94 }
ashleymills 11:dfd1e0afcb7b 95 }
ashleymills 11:dfd1e0afcb7b 96 return 0;
nherriot 0:bcf2aa85d7f9 97 }
nherriot 0:bcf2aa85d7f9 98
ashleymills 11:dfd1e0afcb7b 99 int MMA8452::setDynamicRange(DynamicRange range, int toggleActivation) {
ashleymills 13:4bd8b4cd479d 100 _dynamicRange = range;
ashleymills 11:dfd1e0afcb7b 101 return maskAndApplyRegister(
ashleymills 11:dfd1e0afcb7b 102 MMA8452_XYZ_DATA_CFG,
ashleymills 11:dfd1e0afcb7b 103 MMA8452_DYNAMIC_RANGE_MASK,
ashleymills 11:dfd1e0afcb7b 104 range,
ashleymills 11:dfd1e0afcb7b 105 toggleActivation
ashleymills 11:dfd1e0afcb7b 106 );
nherriot 0:bcf2aa85d7f9 107 }
nherriot 0:bcf2aa85d7f9 108
ashleymills 11:dfd1e0afcb7b 109 int MMA8452::setDataRate(DataRateHz dataRate, int toggleActivation) {
ashleymills 11:dfd1e0afcb7b 110 return maskAndApplyRegister(
ashleymills 11:dfd1e0afcb7b 111 MMA8452_CTRL_REG_1,
ashleymills 11:dfd1e0afcb7b 112 MMA8452_DATA_RATE_MASK,
ashleymills 11:dfd1e0afcb7b 113 dataRate<<MMA8452_DATA_RATE_MASK_SHIFT,
ashleymills 11:dfd1e0afcb7b 114 toggleActivation
ashleymills 11:dfd1e0afcb7b 115 );
nherriot 3:ffb0b1650ca2 116 }
nherriot 3:ffb0b1650ca2 117
ashleymills 11:dfd1e0afcb7b 118 int MMA8452::setBitDepth(BitDepth depth,int toggleActivation) {
ashleymills 12:172540ff6b8b 119 _bitDepth = depth;
ashleymills 11:dfd1e0afcb7b 120 return maskAndApplyRegister(
ashleymills 11:dfd1e0afcb7b 121 MMA8452_CTRL_REG_1,
ashleymills 11:dfd1e0afcb7b 122 MMA8452_BIT_DEPTH_MASK,
ashleymills 11:dfd1e0afcb7b 123 depth<<MMA8452_BIT_DEPTH_MASK_SHIFT,
ashleymills 11:dfd1e0afcb7b 124 toggleActivation
ashleymills 11:dfd1e0afcb7b 125 );
nherriot 3:ffb0b1650ca2 126 }
nherriot 3:ffb0b1650ca2 127
ashleymills 21:a92a632a0cc7 128 char MMA8452::getMaskedRegister(int addr, char mask) {
ashleymills 12:172540ff6b8b 129 char rval = 0;
ashleymills 21:a92a632a0cc7 130 if(readRegister(addr,&rval)) {
ashleymills 12:172540ff6b8b 131 return 0;
ashleymills 12:172540ff6b8b 132 }
ashleymills 16:d6dde2318edc 133 return (rval&mask);
ashleymills 16:d6dde2318edc 134 }
ashleymills 16:d6dde2318edc 135
ashleymills 16:d6dde2318edc 136 int MMA8452::isXYZReady() {
ashleymills 16:d6dde2318edc 137 return getMaskedRegister(MMA8452_STATUS,MMA8452_STATUS_ZYXDR_MASK)>0;
ashleymills 16:d6dde2318edc 138 }
ashleymills 16:d6dde2318edc 139
ashleymills 16:d6dde2318edc 140 int MMA8452::isXReady() {
ashleymills 16:d6dde2318edc 141 return getMaskedRegister(MMA8452_STATUS,MMA8452_STATUS_XDR_MASK)>0;
nherriot 1:ef026bf28798 142 }
ashleymills 16:d6dde2318edc 143
ashleymills 16:d6dde2318edc 144 int MMA8452::isYReady() {
ashleymills 16:d6dde2318edc 145 return getMaskedRegister(MMA8452_STATUS,MMA8452_STATUS_YDR_MASK)>0;
ashleymills 16:d6dde2318edc 146 }
ashleymills 16:d6dde2318edc 147
ashleymills 16:d6dde2318edc 148 int MMA8452::isZReady() {
ashleymills 16:d6dde2318edc 149 return getMaskedRegister(MMA8452_STATUS,MMA8452_STATUS_ZDR_MASK)>0;
ashleymills 16:d6dde2318edc 150 }
ashleymills 16:d6dde2318edc 151
ashleymills 16:d6dde2318edc 152
ashleymills 12:172540ff6b8b 153 int MMA8452::getDeviceID(char *dst) {
ashleymills 12:172540ff6b8b 154 return readRegister(MMA8452_WHO_AM_I,dst);
nherriot 3:ffb0b1650ca2 155 }
nherriot 3:ffb0b1650ca2 156
ashleymills 12:172540ff6b8b 157 int MMA8452::getStatus(char* dst) {
ashleymills 12:172540ff6b8b 158 return readRegister(MMA8452_STATUS,dst);
nherriot 3:ffb0b1650ca2 159 }
nherriot 0:bcf2aa85d7f9 160
ashleymills 11:dfd1e0afcb7b 161 MMA8452::DynamicRange MMA8452::getDynamicRange() {
ashleymills 11:dfd1e0afcb7b 162 char rval = 0;
ashleymills 12:172540ff6b8b 163 if(readRegister(MMA8452_XYZ_DATA_CFG,&rval)) {
ashleymills 11:dfd1e0afcb7b 164 return MMA8452::DYNAMIC_RANGE_UNKNOWN;
ashleymills 11:dfd1e0afcb7b 165 }
ashleymills 11:dfd1e0afcb7b 166 rval &= (MMA8452_DYNAMIC_RANGE_MASK^0xFF);
ashleymills 11:dfd1e0afcb7b 167 return (MMA8452::DynamicRange)rval;
ashleymills 11:dfd1e0afcb7b 168 }
ashleymills 11:dfd1e0afcb7b 169
ashleymills 11:dfd1e0afcb7b 170 MMA8452::DataRateHz MMA8452::getDataRate() {
ashleymills 11:dfd1e0afcb7b 171 char rval = 0;
ashleymills 11:dfd1e0afcb7b 172 if(readRegister(MMA8452_CTRL_REG_1,&rval)) {
ashleymills 11:dfd1e0afcb7b 173 return MMA8452::RATE_UNKNOWN;
ashleymills 11:dfd1e0afcb7b 174 }
ashleymills 11:dfd1e0afcb7b 175 // logical AND with inverse of mask
ashleymills 11:dfd1e0afcb7b 176 rval = rval&(MMA8452_DATA_RATE_MASK^0xFF);
ashleymills 11:dfd1e0afcb7b 177 // shift back into position
ashleymills 11:dfd1e0afcb7b 178 rval >>= MMA8452_DATA_RATE_MASK_SHIFT;
ashleymills 11:dfd1e0afcb7b 179 return (MMA8452::DataRateHz)rval;
ashleymills 11:dfd1e0afcb7b 180 }
ashleymills 11:dfd1e0afcb7b 181
nherriot 0:bcf2aa85d7f9 182 // Reads xyz
ashleymills 13:4bd8b4cd479d 183 int MMA8452::readXYZRaw(char *dst) {
ashleymills 12:172540ff6b8b 184 if(_bitDepth==BIT_DEPTH_UNKNOWN) {
ashleymills 12:172540ff6b8b 185 return 1;
ashleymills 12:172540ff6b8b 186 }
ashleymills 12:172540ff6b8b 187 int readLen = 3;
ashleymills 12:172540ff6b8b 188 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 12:172540ff6b8b 189 readLen = 6;
ashleymills 12:172540ff6b8b 190 }
ashleymills 12:172540ff6b8b 191 return readRegister(MMA8452_OUT_X_MSB,dst,readLen);
nherriot 1:ef026bf28798 192 }
nherriot 0:bcf2aa85d7f9 193
ashleymills 19:4d6cd7140a71 194 int MMA8452::readXRaw(char *dst) {
ashleymills 19:4d6cd7140a71 195 if(_bitDepth==BIT_DEPTH_UNKNOWN) {
ashleymills 19:4d6cd7140a71 196 return 1;
ashleymills 19:4d6cd7140a71 197 }
ashleymills 19:4d6cd7140a71 198 int readLen = 1;
ashleymills 19:4d6cd7140a71 199 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 19:4d6cd7140a71 200 readLen = 2;
ashleymills 19:4d6cd7140a71 201 }
ashleymills 19:4d6cd7140a71 202 return readRegister(MMA8452_OUT_X_MSB,dst,readLen);
ashleymills 19:4d6cd7140a71 203 }
ashleymills 19:4d6cd7140a71 204
ashleymills 19:4d6cd7140a71 205 int MMA8452::readYRaw(char *dst) {
ashleymills 19:4d6cd7140a71 206 if(_bitDepth==BIT_DEPTH_UNKNOWN) {
ashleymills 19:4d6cd7140a71 207 return 1;
ashleymills 19:4d6cd7140a71 208 }
ashleymills 19:4d6cd7140a71 209 int readLen = 1;
ashleymills 19:4d6cd7140a71 210 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 19:4d6cd7140a71 211 readLen = 2;
ashleymills 19:4d6cd7140a71 212 }
ashleymills 19:4d6cd7140a71 213 return readRegister(MMA8452_OUT_Y_MSB,dst,readLen);
ashleymills 19:4d6cd7140a71 214 }
ashleymills 19:4d6cd7140a71 215
ashleymills 19:4d6cd7140a71 216 int MMA8452::readZRaw(char *dst) {
ashleymills 19:4d6cd7140a71 217 if(_bitDepth==BIT_DEPTH_UNKNOWN) {
ashleymills 19:4d6cd7140a71 218 return 1;
ashleymills 19:4d6cd7140a71 219 }
ashleymills 19:4d6cd7140a71 220 int readLen = 1;
ashleymills 19:4d6cd7140a71 221 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 19:4d6cd7140a71 222 readLen = 2;
ashleymills 19:4d6cd7140a71 223 }
ashleymills 19:4d6cd7140a71 224 return readRegister(MMA8452_OUT_Z_MSB,dst,readLen);
ashleymills 19:4d6cd7140a71 225 }
ashleymills 19:4d6cd7140a71 226
ashleymills 13:4bd8b4cd479d 227 int MMA8452::readXYZCounts(int *x, int *y, int *z) {
ashleymills 13:4bd8b4cd479d 228 char buf[6];
ashleymills 13:4bd8b4cd479d 229 if(readXYZRaw((char*)&buf)) {
ashleymills 13:4bd8b4cd479d 230 return 1;
ashleymills 13:4bd8b4cd479d 231 }
ashleymills 13:4bd8b4cd479d 232 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 13:4bd8b4cd479d 233 *x = twelveBitToSigned(&buf[0]);
ashleymills 13:4bd8b4cd479d 234 *y = twelveBitToSigned(&buf[2]);
ashleymills 13:4bd8b4cd479d 235 *z = twelveBitToSigned(&buf[4]);
ashleymills 13:4bd8b4cd479d 236 } else {
ashleymills 13:4bd8b4cd479d 237 *x = eightBitToSigned(&buf[0]);
ashleymills 13:4bd8b4cd479d 238 *y = eightBitToSigned(&buf[1]);
ashleymills 13:4bd8b4cd479d 239 *z = eightBitToSigned(&buf[2]);
ashleymills 13:4bd8b4cd479d 240 }
ashleymills 13:4bd8b4cd479d 241
ashleymills 13:4bd8b4cd479d 242 return 0;
ashleymills 13:4bd8b4cd479d 243 }
ashleymills 13:4bd8b4cd479d 244
ashleymills 20:d55e9d7eb17e 245 int MMA8452::readXCount(int *x) {
ashleymills 19:4d6cd7140a71 246 char buf[2];
ashleymills 19:4d6cd7140a71 247 if(readXRaw((char*)&buf)) {
ashleymills 19:4d6cd7140a71 248 return 1;
ashleymills 19:4d6cd7140a71 249 }
ashleymills 19:4d6cd7140a71 250 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 19:4d6cd7140a71 251 *x = twelveBitToSigned(&buf[0]);
ashleymills 19:4d6cd7140a71 252 } else {
ashleymills 19:4d6cd7140a71 253 *x = eightBitToSigned(&buf[0]);
ashleymills 20:d55e9d7eb17e 254 }
ashleymills 20:d55e9d7eb17e 255 return 0;
ashleymills 20:d55e9d7eb17e 256 }
ashleymills 20:d55e9d7eb17e 257
ashleymills 20:d55e9d7eb17e 258 int MMA8452::readYCount(int *y) {
ashleymills 20:d55e9d7eb17e 259 char buf[2];
ashleymills 20:d55e9d7eb17e 260 if(readYRaw((char*)&buf)) {
ashleymills 20:d55e9d7eb17e 261 return 1;
ashleymills 20:d55e9d7eb17e 262 }
ashleymills 20:d55e9d7eb17e 263 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 20:d55e9d7eb17e 264 *y = twelveBitToSigned(&buf[0]);
ashleymills 20:d55e9d7eb17e 265 } else {
ashleymills 20:d55e9d7eb17e 266 *y = eightBitToSigned(&buf[0]);
ashleymills 19:4d6cd7140a71 267 }
ashleymills 20:d55e9d7eb17e 268 return 0;
ashleymills 20:d55e9d7eb17e 269 }
ashleymills 20:d55e9d7eb17e 270
ashleymills 20:d55e9d7eb17e 271 int MMA8452::readZCount(int *z) {
ashleymills 20:d55e9d7eb17e 272 char buf[2];
ashleymills 20:d55e9d7eb17e 273 if(readZRaw((char*)&buf)) {
ashleymills 20:d55e9d7eb17e 274 return 1;
ashleymills 20:d55e9d7eb17e 275 }
ashleymills 20:d55e9d7eb17e 276 if(_bitDepth==BIT_DEPTH_12) {
ashleymills 20:d55e9d7eb17e 277 *z = twelveBitToSigned(&buf[0]);
ashleymills 20:d55e9d7eb17e 278 } else {
ashleymills 20:d55e9d7eb17e 279 *z = eightBitToSigned(&buf[0]);
ashleymills 20:d55e9d7eb17e 280 }
ashleymills 20:d55e9d7eb17e 281 return 0;
ashleymills 19:4d6cd7140a71 282 }
ashleymills 19:4d6cd7140a71 283
ashleymills 13:4bd8b4cd479d 284 double MMA8452::convertCountToGravity(int count, int countsPerG) {
ashleymills 13:4bd8b4cd479d 285 return (double)count/(double)countsPerG;
ashleymills 13:4bd8b4cd479d 286 }
ashleymills 13:4bd8b4cd479d 287
ashleymills 20:d55e9d7eb17e 288 int MMA8452::getCountsPerG() {
ashleymills 20:d55e9d7eb17e 289 // assume starting with DYNAMIC_RANGE_2G and BIT_DEPTH_12
ashleymills 13:4bd8b4cd479d 290 int countsPerG = 1024;
ashleymills 13:4bd8b4cd479d 291 if(_bitDepth==BIT_DEPTH_8) {
ashleymills 13:4bd8b4cd479d 292 countsPerG = 64;
ashleymills 13:4bd8b4cd479d 293 }
ashleymills 13:4bd8b4cd479d 294 switch(_dynamicRange) {
ashleymills 13:4bd8b4cd479d 295 case DYNAMIC_RANGE_4G:
ashleymills 13:4bd8b4cd479d 296 countsPerG /= 2;
ashleymills 13:4bd8b4cd479d 297 break;
ashleymills 13:4bd8b4cd479d 298 case DYNAMIC_RANGE_8G:
ashleymills 13:4bd8b4cd479d 299 countsPerG /= 4;
ashleymills 13:4bd8b4cd479d 300 break;
ashleymills 13:4bd8b4cd479d 301 }
ashleymills 20:d55e9d7eb17e 302 return countsPerG;
ashleymills 20:d55e9d7eb17e 303 }
ashleymills 20:d55e9d7eb17e 304
ashleymills 20:d55e9d7eb17e 305 int MMA8452::readXYZGravity(double *x, double *y, double *z) {
ashleymills 20:d55e9d7eb17e 306 int xCount = 0, yCount = 0, zCount = 0;
ashleymills 20:d55e9d7eb17e 307 if(readXYZCounts(&xCount,&yCount,&zCount)) {
ashleymills 20:d55e9d7eb17e 308 return 1;
ashleymills 20:d55e9d7eb17e 309 }
ashleymills 20:d55e9d7eb17e 310 int countsPerG = getCountsPerG();
ashleymills 13:4bd8b4cd479d 311
ashleymills 13:4bd8b4cd479d 312 *x = convertCountToGravity(xCount,countsPerG);
ashleymills 13:4bd8b4cd479d 313 *y = convertCountToGravity(yCount,countsPerG);
ashleymills 13:4bd8b4cd479d 314 *z = convertCountToGravity(zCount,countsPerG);
ashleymills 13:4bd8b4cd479d 315 return 0;
ashleymills 13:4bd8b4cd479d 316 }
ashleymills 13:4bd8b4cd479d 317
ashleymills 20:d55e9d7eb17e 318 int MMA8452::readXGravity(double *x) {
ashleymills 20:d55e9d7eb17e 319 int xCount = 0;
ashleymills 20:d55e9d7eb17e 320 if(readXCount(&xCount)) {
ashleymills 20:d55e9d7eb17e 321 return 1;
ashleymills 20:d55e9d7eb17e 322 }
ashleymills 20:d55e9d7eb17e 323 int countsPerG = getCountsPerG();
ashleymills 20:d55e9d7eb17e 324
ashleymills 20:d55e9d7eb17e 325 *x = convertCountToGravity(xCount,countsPerG);
ashleymills 20:d55e9d7eb17e 326 return 0;
ashleymills 20:d55e9d7eb17e 327 }
ashleymills 20:d55e9d7eb17e 328
ashleymills 20:d55e9d7eb17e 329 int MMA8452::readYGravity(double *y) {
ashleymills 20:d55e9d7eb17e 330 int yCount = 0;
ashleymills 20:d55e9d7eb17e 331 if(readYCount(&yCount)) {
ashleymills 20:d55e9d7eb17e 332 return 1;
ashleymills 20:d55e9d7eb17e 333 }
ashleymills 20:d55e9d7eb17e 334 int countsPerG = getCountsPerG();
ashleymills 20:d55e9d7eb17e 335
ashleymills 20:d55e9d7eb17e 336 *y = convertCountToGravity(yCount,countsPerG);
ashleymills 20:d55e9d7eb17e 337 return 0;
ashleymills 20:d55e9d7eb17e 338 }
ashleymills 20:d55e9d7eb17e 339
ashleymills 20:d55e9d7eb17e 340 int MMA8452::readZGravity(double *z) {
ashleymills 20:d55e9d7eb17e 341 int zCount = 0;
ashleymills 20:d55e9d7eb17e 342 if(readZCount(&zCount)) {
ashleymills 20:d55e9d7eb17e 343 return 1;
ashleymills 20:d55e9d7eb17e 344 }
ashleymills 20:d55e9d7eb17e 345 int countsPerG = getCountsPerG();
ashleymills 20:d55e9d7eb17e 346
ashleymills 20:d55e9d7eb17e 347 *z = convertCountToGravity(zCount,countsPerG);
ashleymills 20:d55e9d7eb17e 348 return 0;
ashleymills 20:d55e9d7eb17e 349 }
ashleymills 20:d55e9d7eb17e 350
ashleymills 11:dfd1e0afcb7b 351 // apply an AND mask to a register. read register value, apply mask, write it back
ashleymills 11:dfd1e0afcb7b 352 int MMA8452::logicalANDRegister(char addr, char mask) {
ashleymills 11:dfd1e0afcb7b 353 char value = 0;
ashleymills 11:dfd1e0afcb7b 354 // read register value
ashleymills 11:dfd1e0afcb7b 355 if(readRegister(addr,&value)) {
ashleymills 11:dfd1e0afcb7b 356 return 0;
ashleymills 11:dfd1e0afcb7b 357 }
ashleymills 11:dfd1e0afcb7b 358 // apply mask
ashleymills 11:dfd1e0afcb7b 359 value &= mask;
ashleymills 11:dfd1e0afcb7b 360 return writeRegister(addr,value);
ashleymills 11:dfd1e0afcb7b 361 }
ashleymills 11:dfd1e0afcb7b 362
ashleymills 11:dfd1e0afcb7b 363
ashleymills 11:dfd1e0afcb7b 364 // apply an OR mask to a register. read register value, apply mask, write it back
ashleymills 11:dfd1e0afcb7b 365 int MMA8452::logicalORRegister(char addr, char mask) {
ashleymills 11:dfd1e0afcb7b 366 char value = 0;
ashleymills 11:dfd1e0afcb7b 367 // read register value
ashleymills 11:dfd1e0afcb7b 368 if(readRegister(addr,&value)) {
ashleymills 11:dfd1e0afcb7b 369 return 0;
ashleymills 11:dfd1e0afcb7b 370 }
ashleymills 11:dfd1e0afcb7b 371 // apply mask
ashleymills 11:dfd1e0afcb7b 372 value |= mask;
ashleymills 11:dfd1e0afcb7b 373 return writeRegister(addr,value);
ashleymills 11:dfd1e0afcb7b 374 }
ashleymills 11:dfd1e0afcb7b 375
ashleymills 11:dfd1e0afcb7b 376 // apply an OR mask to a register. read register value, apply mask, write it back
ashleymills 11:dfd1e0afcb7b 377 int MMA8452::logicalXORRegister(char addr, char mask) {
ashleymills 11:dfd1e0afcb7b 378 char value = 0;
ashleymills 11:dfd1e0afcb7b 379 // read register value
ashleymills 11:dfd1e0afcb7b 380 if(readRegister(addr,&value)) {
ashleymills 11:dfd1e0afcb7b 381 return 0;
ashleymills 11:dfd1e0afcb7b 382 }
ashleymills 11:dfd1e0afcb7b 383 // apply mask
ashleymills 11:dfd1e0afcb7b 384 value ^= mask;
ashleymills 11:dfd1e0afcb7b 385 return writeRegister(addr,value);
ashleymills 11:dfd1e0afcb7b 386 }
ashleymills 11:dfd1e0afcb7b 387
ashleymills 11:dfd1e0afcb7b 388 // Write register (The device must be placed in Standby Mode to change the value of the registers)
ashleymills 11:dfd1e0afcb7b 389 int MMA8452::writeRegister(char addr, char data) {
ashleymills 11:dfd1e0afcb7b 390 // what this actually does is the following
ashleymills 11:dfd1e0afcb7b 391 // 1. tell I2C bus to start transaction
ashleymills 11:dfd1e0afcb7b 392 // 2. tell slave we want to write (slave address & write flag)
ashleymills 11:dfd1e0afcb7b 393 // 3. send the write address
ashleymills 11:dfd1e0afcb7b 394 // 4. send the data to write
ashleymills 11:dfd1e0afcb7b 395 // 5. tell I2C bus to end transaction
ashleymills 11:dfd1e0afcb7b 396
ashleymills 11:dfd1e0afcb7b 397 // we can wrap this up in the I2C library write function
ashleymills 11:dfd1e0afcb7b 398 char buf[2] = {0,0};
ashleymills 11:dfd1e0afcb7b 399 buf[0] = addr;
ashleymills 11:dfd1e0afcb7b 400 buf[1] = data;
ashleymills 11:dfd1e0afcb7b 401 return _i2c.write(MMA8452_ADDRESS, buf,2);
ashleymills 11:dfd1e0afcb7b 402 // note, could also do return writeRegister(addr,&data,1);
nherriot 0:bcf2aa85d7f9 403 }
nherriot 0:bcf2aa85d7f9 404
ashleymills 13:4bd8b4cd479d 405 int MMA8452::eightBitToSigned(char *buf) {
ashleymills 13:4bd8b4cd479d 406 return (int8_t)*buf;
ashleymills 13:4bd8b4cd479d 407 }
ashleymills 13:4bd8b4cd479d 408
ashleymills 13:4bd8b4cd479d 409 int MMA8452::twelveBitToSigned(char *buf) {
ashleymills 13:4bd8b4cd479d 410 // cheat by using the int16_t internal type
ashleymills 13:4bd8b4cd479d 411 // all we need to do is convert to little-endian format and shift right
ashleymills 13:4bd8b4cd479d 412 int16_t x = 0;
ashleymills 13:4bd8b4cd479d 413 ((char*)&x)[1] = buf[0];
ashleymills 13:4bd8b4cd479d 414 ((char*)&x)[0] = buf[1];
ashleymills 13:4bd8b4cd479d 415 // note this only works because the below is an arithmetic right shift
ashleymills 13:4bd8b4cd479d 416 return x>>4;
ashleymills 13:4bd8b4cd479d 417 }
ashleymills 11:dfd1e0afcb7b 418
ashleymills 11:dfd1e0afcb7b 419 int MMA8452::writeRegister(char addr, char *data, int nbytes) {
ashleymills 11:dfd1e0afcb7b 420 // writing multiple bytes is a little bit annoying because
ashleymills 11:dfd1e0afcb7b 421 // the I2C library doesn't support sending the address separately
ashleymills 11:dfd1e0afcb7b 422 // so we just do it manually
nherriot 0:bcf2aa85d7f9 423
ashleymills 11:dfd1e0afcb7b 424 // 1. tell I2C bus to start transaction
ashleymills 11:dfd1e0afcb7b 425 _i2c.start();
ashleymills 11:dfd1e0afcb7b 426 // 2. tell slave we want to write (slave address & write flag)
ashleymills 11:dfd1e0afcb7b 427 if(_i2c.write(_writeAddress)!=1) {
ashleymills 11:dfd1e0afcb7b 428 return 1;
ashleymills 11:dfd1e0afcb7b 429 }
ashleymills 11:dfd1e0afcb7b 430 // 3. send the write address
ashleymills 11:dfd1e0afcb7b 431 if(_i2c.write(addr)!=1) {
ashleymills 11:dfd1e0afcb7b 432 return 1;
ashleymills 11:dfd1e0afcb7b 433 }
ashleymills 11:dfd1e0afcb7b 434 // 4. send the data to write
ashleymills 11:dfd1e0afcb7b 435 for(int i=0; i<nbytes; i++) {
ashleymills 11:dfd1e0afcb7b 436 if(_i2c.write(data[i])!=1) {
ashleymills 11:dfd1e0afcb7b 437 return 1;
ashleymills 11:dfd1e0afcb7b 438 }
ashleymills 11:dfd1e0afcb7b 439 }
ashleymills 11:dfd1e0afcb7b 440 // 5. tell I2C bus to end transaction
ashleymills 11:dfd1e0afcb7b 441 _i2c.stop();
ashleymills 11:dfd1e0afcb7b 442 return 0;
ashleymills 11:dfd1e0afcb7b 443 }
ashleymills 11:dfd1e0afcb7b 444
ashleymills 11:dfd1e0afcb7b 445 int MMA8452::readRegister(char addr, char *dst, int nbytes) {
ashleymills 11:dfd1e0afcb7b 446 // this is a bit odd, but basically proceeds like this
ashleymills 11:dfd1e0afcb7b 447 // 1. Send a start command
ashleymills 11:dfd1e0afcb7b 448 // 2. Tell the slave we want to write (slave address & write flag)
ashleymills 11:dfd1e0afcb7b 449 // 3. Send the address of the register (addr)
ashleymills 11:dfd1e0afcb7b 450 // 4. Send another start command to delineate read portion
ashleymills 11:dfd1e0afcb7b 451 // 5. Tell the slave we want to read (slave address & read flag)
ashleymills 11:dfd1e0afcb7b 452 // 6. Read the register value bytes
ashleymills 11:dfd1e0afcb7b 453 // 7. Send a stop command
ashleymills 11:dfd1e0afcb7b 454
ashleymills 11:dfd1e0afcb7b 455 // we can wrap this process in the I2C library read and write commands
ashleymills 11:dfd1e0afcb7b 456 if(_i2c.write(MMA8452_ADDRESS,&addr,1,true)) {
ashleymills 11:dfd1e0afcb7b 457 return 1;
ashleymills 8:89272163f395 458 }
ashleymills 11:dfd1e0afcb7b 459 return _i2c.read(MMA8452_ADDRESS,dst,nbytes);
ashleymills 11:dfd1e0afcb7b 460 }
ashleymills 11:dfd1e0afcb7b 461
ashleymills 11:dfd1e0afcb7b 462 // most registers are 1 byte, so here is a convenience function
ashleymills 11:dfd1e0afcb7b 463 int MMA8452::readRegister(char addr, char *dst) {
ashleymills 11:dfd1e0afcb7b 464 return readRegister(addr,dst,1);
nherriot 0:bcf2aa85d7f9 465 }
ashleymills 11:dfd1e0afcb7b 466
ashleymills 19:4d6cd7140a71 467 MMA8452::BitDepth MMA8452::getBitDepth() {
ashleymills 19:4d6cd7140a71 468 return _bitDepth;
ashleymills 19:4d6cd7140a71 469 }
ashleymills 19:4d6cd7140a71 470
ashleymills 17:6e4232c421c0 471 #ifdef MMA8452_DEBUG
ashleymills 11:dfd1e0afcb7b 472 void MMA8452::debugRegister(char reg) {
ashleymills 11:dfd1e0afcb7b 473 // get register value
ashleymills 11:dfd1e0afcb7b 474 char v = 0;
ashleymills 11:dfd1e0afcb7b 475 if(readRegister(reg,&v)) {
ashleymills 17:6e4232c421c0 476 MMA8452_DBG("Error reading specified register");
ashleymills 11:dfd1e0afcb7b 477 return;
ashleymills 11:dfd1e0afcb7b 478 }
ashleymills 11:dfd1e0afcb7b 479 // print out details
ashleymills 11:dfd1e0afcb7b 480 switch(reg) {
ashleymills 11:dfd1e0afcb7b 481 case MMA8452_CTRL_REG_1:
ashleymills 17:6e4232c421c0 482 MMA8452_DBG("CTRL_REG_1 has value: 0x%x",v);
ashleymills 17:6e4232c421c0 483 MMA8452_DBG(" 7 ALSP_RATE_1: %d",(v&0x80)>>7);
ashleymills 17:6e4232c421c0 484 MMA8452_DBG(" 6 ALSP_RATE_0: %d",(v&0x40)>>6);
ashleymills 17:6e4232c421c0 485 MMA8452_DBG(" 5 DR2: %d", (v&0x20)>>5);
ashleymills 17:6e4232c421c0 486 MMA8452_DBG(" 4 DR1: %d", (v&0x10)>>4);
ashleymills 17:6e4232c421c0 487 MMA8452_DBG(" 3 DR0: %d", (v&0x08)>>3);
ashleymills 17:6e4232c421c0 488 MMA8452_DBG(" 2 LNOISE: %d", (v&0x04)>>2);
ashleymills 17:6e4232c421c0 489 MMA8452_DBG(" 1 FREAD: %d", (v&0x02)>>1);
ashleymills 17:6e4232c421c0 490 MMA8452_DBG(" 0 ACTIVE: %d", (v&0x01));
ashleymills 11:dfd1e0afcb7b 491 break;
ashleymills 11:dfd1e0afcb7b 492
ashleymills 11:dfd1e0afcb7b 493 case MMA8452_XYZ_DATA_CFG:
ashleymills 17:6e4232c421c0 494 MMA8452_DBG("XYZ_DATA_CFG has value: 0x%x",v);
ashleymills 17:6e4232c421c0 495 MMA8452_DBG(" 7 Unused: %d", (v&0x80)>>7);
ashleymills 17:6e4232c421c0 496 MMA8452_DBG(" 6 0: %d", (v&0x40)>>6);
ashleymills 17:6e4232c421c0 497 MMA8452_DBG(" 5 0: %d", (v&0x20)>>5);
ashleymills 17:6e4232c421c0 498 MMA8452_DBG(" 4 HPF_Out: %d",(v&0x10)>>4);
ashleymills 17:6e4232c421c0 499 MMA8452_DBG(" 3 0: %d", (v&0x08)>>3);
ashleymills 17:6e4232c421c0 500 MMA8452_DBG(" 2 0: %d", (v&0x04)>>2);
ashleymills 17:6e4232c421c0 501 MMA8452_DBG(" 1 FS1: %d", (v&0x02)>>1);
ashleymills 17:6e4232c421c0 502 MMA8452_DBG(" 0 FS0: %d", (v&0x01));
ashleymills 11:dfd1e0afcb7b 503 switch(v&0x03) {
ashleymills 11:dfd1e0afcb7b 504 case 0:
ashleymills 17:6e4232c421c0 505 MMA8452_DBG("Dynamic range: 2G");
ashleymills 11:dfd1e0afcb7b 506 break;
ashleymills 11:dfd1e0afcb7b 507 case 1:
ashleymills 17:6e4232c421c0 508 MMA8452_DBG("Dynamic range: 4G");
ashleymills 11:dfd1e0afcb7b 509 break;
ashleymills 11:dfd1e0afcb7b 510 case 2:
ashleymills 17:6e4232c421c0 511 MMA8452_DBG("Dynamic range: 8G");
ashleymills 11:dfd1e0afcb7b 512 break;
ashleymills 11:dfd1e0afcb7b 513 default:
ashleymills 17:6e4232c421c0 514 MMA8452_DBG("Unknown dynamic range");
ashleymills 11:dfd1e0afcb7b 515 break;
ashleymills 11:dfd1e0afcb7b 516 }
ashleymills 11:dfd1e0afcb7b 517 break;
ashleymills 11:dfd1e0afcb7b 518
ashleymills 12:172540ff6b8b 519 case MMA8452_STATUS:
ashleymills 17:6e4232c421c0 520 MMA8452_DBG("STATUS has value: 0x%x",v);
ashleymills 17:6e4232c421c0 521 MMA8452_DBG(" 7 ZYXOW: %d",(v&0x80)>>7);
ashleymills 17:6e4232c421c0 522 MMA8452_DBG(" 6 ZOW: %d", (v&0x40)>>6);
ashleymills 17:6e4232c421c0 523 MMA8452_DBG(" 5 YOW: %d", (v&0x20)>>5);
ashleymills 17:6e4232c421c0 524 MMA8452_DBG(" 4 XOW: %d", (v&0x10)>>4);
ashleymills 17:6e4232c421c0 525 MMA8452_DBG(" 3 ZYXDR: %d",(v&0x08)>>3);
ashleymills 17:6e4232c421c0 526 MMA8452_DBG(" 2 ZDR: %d", (v&0x04)>>2);
ashleymills 17:6e4232c421c0 527 MMA8452_DBG(" 1 YDR: %d", (v&0x02)>>1);
ashleymills 17:6e4232c421c0 528 MMA8452_DBG(" 0 XDR: %d", (v&0x01));
ashleymills 12:172540ff6b8b 529 break;
ashleymills 12:172540ff6b8b 530
ashleymills 11:dfd1e0afcb7b 531 default:
ashleymills 17:6e4232c421c0 532 MMA8452_DBG("Unknown register address: 0x%x",reg);
ashleymills 11:dfd1e0afcb7b 533 break;
ashleymills 11:dfd1e0afcb7b 534 }
ashleymills 17:6e4232c421c0 535 }
ashleymills 17:6e4232c421c0 536 #endif