class IMU nucleo

Dependents:   Coupe-Robotique-FIP-Main

Fork of IMU_FIP by Robotique FIP

Committer:
quentin9696
Date:
Thu May 21 11:21:58 2015 +0000
Revision:
5:e2e603447679
Parent:
0:528e23a13fb7

        

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quentin9696 0:528e23a13fb7 1 /**
quentin9696 0:528e23a13fb7 2 ******************************************************************************
quentin9696 0:528e23a13fb7 3 * @file x_cube_mems_lps25.cpp
quentin9696 0:528e23a13fb7 4 * @author AST / EST
quentin9696 0:528e23a13fb7 5 * @version V0.0.1
quentin9696 0:528e23a13fb7 6 * @date 1-December-2014
quentin9696 0:528e23a13fb7 7 * @brief Implementation file for component LPS25H
quentin9696 0:528e23a13fb7 8 ******************************************************************************
quentin9696 0:528e23a13fb7 9 * @attention
quentin9696 0:528e23a13fb7 10 *
quentin9696 0:528e23a13fb7 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
quentin9696 0:528e23a13fb7 12 *
quentin9696 0:528e23a13fb7 13 * Redistribution and use in source and binary forms, with or without modification,
quentin9696 0:528e23a13fb7 14 * are permitted provided that the following conditions are met:
quentin9696 0:528e23a13fb7 15 * 1. Redistributions of source code must retain the above copyright notice,
quentin9696 0:528e23a13fb7 16 * this list of conditions and the following disclaimer.
quentin9696 0:528e23a13fb7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
quentin9696 0:528e23a13fb7 18 * this list of conditions and the following disclaimer in the documentation
quentin9696 0:528e23a13fb7 19 * and/or other materials provided with the distribution.
quentin9696 0:528e23a13fb7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
quentin9696 0:528e23a13fb7 21 * may be used to endorse or promote products derived from this software
quentin9696 0:528e23a13fb7 22 * without specific prior written permission.
quentin9696 0:528e23a13fb7 23 *
quentin9696 0:528e23a13fb7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
quentin9696 0:528e23a13fb7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
quentin9696 0:528e23a13fb7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
quentin9696 0:528e23a13fb7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
quentin9696 0:528e23a13fb7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
quentin9696 0:528e23a13fb7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
quentin9696 0:528e23a13fb7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
quentin9696 0:528e23a13fb7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
quentin9696 0:528e23a13fb7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
quentin9696 0:528e23a13fb7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
quentin9696 0:528e23a13fb7 34 *
quentin9696 0:528e23a13fb7 35 ******************************************************************************
quentin9696 0:528e23a13fb7 36 */
quentin9696 0:528e23a13fb7 37
quentin9696 0:528e23a13fb7 38 /* Includes ------------------------------------------------------------------*/
quentin9696 0:528e23a13fb7 39 #include "mbed.h"
quentin9696 0:528e23a13fb7 40 #include "lps25h.h"
quentin9696 0:528e23a13fb7 41 #include "lps25h_platform.h"
quentin9696 0:528e23a13fb7 42
quentin9696 0:528e23a13fb7 43 /* Methods -------------------------------------------------------------------*/
quentin9696 0:528e23a13fb7 44
quentin9696 0:528e23a13fb7 45 /**
quentin9696 0:528e23a13fb7 46 * @brief Read LPS25H output register, and calculate the pressure in mbar.
quentin9696 0:528e23a13fb7 47 * @param float *pressure. Pressure value in mbar.
quentin9696 0:528e23a13fb7 48 * @retval LPS25H_ERROR or LPS25H_OK.
quentin9696 0:528e23a13fb7 49 */
quentin9696 0:528e23a13fb7 50 void LPS25H::GetPressure(float* pfData)
quentin9696 0:528e23a13fb7 51 {
quentin9696 0:528e23a13fb7 52
quentin9696 0:528e23a13fb7 53 uint32_t raw_press = 0;
quentin9696 0:528e23a13fb7 54
quentin9696 0:528e23a13fb7 55 if(isInitialized()==0)
quentin9696 0:528e23a13fb7 56 {
quentin9696 0:528e23a13fb7 57 pfData = 0;
quentin9696 0:528e23a13fb7 58 return;
quentin9696 0:528e23a13fb7 59 }
quentin9696 0:528e23a13fb7 60
quentin9696 0:528e23a13fb7 61 ReadRawPressure(&raw_press);
quentin9696 0:528e23a13fb7 62
quentin9696 0:528e23a13fb7 63 /* return the built value */
quentin9696 0:528e23a13fb7 64 //tempInt = raw_press / 4096;
quentin9696 0:528e23a13fb7 65
quentin9696 0:528e23a13fb7 66 *pfData = (float)raw_press /4096.0f;
quentin9696 0:528e23a13fb7 67 }
quentin9696 0:528e23a13fb7 68
quentin9696 0:528e23a13fb7 69 /**
quentin9696 0:528e23a13fb7 70 * @brief Read LPS25H output register, and calculate the raw pressure.
quentin9696 0:528e23a13fb7 71 * @param uint32_t: raw_press. Pressure raw value.
quentin9696 0:528e23a13fb7 72 * @retval LPS25H_ERROR or LPS25H_OK.
quentin9696 0:528e23a13fb7 73 */
quentin9696 0:528e23a13fb7 74 void LPS25H::ReadRawPressure(uint32_t *raw_press)
quentin9696 0:528e23a13fb7 75 {
quentin9696 0:528e23a13fb7 76 uint8_t buffer[3], i;
quentin9696 0:528e23a13fb7 77 uint32_t tempVal=0;
quentin9696 0:528e23a13fb7 78 int ret;
quentin9696 0:528e23a13fb7 79
quentin9696 0:528e23a13fb7 80 /* Read the register content */
quentin9696 0:528e23a13fb7 81 //PRESSURE_IO_Read(buffer, LPS25H_SlaveAddress, LPS25H_PRESS_POUT_XL_ADDR+0x80, 3);
quentin9696 0:528e23a13fb7 82 ret = dev_i2c.i2c_read(buffer, LPS25H_ADDRESS_HIGH, LPS25H_PRESS_POUT_XL_ADDR+0x80, 3);
quentin9696 0:528e23a13fb7 83
quentin9696 0:528e23a13fb7 84 if (ret == 0)
quentin9696 0:528e23a13fb7 85 {
quentin9696 0:528e23a13fb7 86 /* Build the raw data */
quentin9696 0:528e23a13fb7 87 for (i = 0 ; i < 3 ; i++)
quentin9696 0:528e23a13fb7 88 tempVal |= (((uint32_t) buffer[i]) << (8 * i));
quentin9696 0:528e23a13fb7 89
quentin9696 0:528e23a13fb7 90 /* convert the 2's complement 24 bit to 2's complement 32 bit */
quentin9696 0:528e23a13fb7 91 if (tempVal & 0x00800000)
quentin9696 0:528e23a13fb7 92 tempVal |= 0xFF000000;
quentin9696 0:528e23a13fb7 93
quentin9696 0:528e23a13fb7 94 /* return the built value */
quentin9696 0:528e23a13fb7 95 *raw_press = ((uint32_t) tempVal);
quentin9696 0:528e23a13fb7 96 }
quentin9696 0:528e23a13fb7 97 }
quentin9696 0:528e23a13fb7 98
quentin9696 0:528e23a13fb7 99 /**
quentin9696 0:528e23a13fb7 100 * @brief Read ID address of HTS221
quentin9696 0:528e23a13fb7 101 * @param Device ID address
quentin9696 0:528e23a13fb7 102 * @retval ID name
quentin9696 0:528e23a13fb7 103 */
quentin9696 0:528e23a13fb7 104 uint8_t LPS25H::ReadID(void)
quentin9696 0:528e23a13fb7 105 {
quentin9696 0:528e23a13fb7 106 uint8_t tmp;
quentin9696 0:528e23a13fb7 107
quentin9696 0:528e23a13fb7 108 /* Read the register content */
quentin9696 0:528e23a13fb7 109 int ret;
quentin9696 0:528e23a13fb7 110 //PRESSURE_IO_Read(&tmp, LPS25H_SlaveAddress, LPS25H_WHO_AM_I_ADDR, 1);
quentin9696 0:528e23a13fb7 111 ret = dev_i2c.i2c_read(&tmp, LPS25H_ADDRESS_HIGH, LPS25H_WHO_AM_I_ADDR, 1);
quentin9696 0:528e23a13fb7 112
quentin9696 0:528e23a13fb7 113 /* Return the ID */
quentin9696 0:528e23a13fb7 114 return ((ret == 0) ? (uint8_t)tmp : 0);
quentin9696 0:528e23a13fb7 115 }
quentin9696 0:528e23a13fb7 116
quentin9696 0:528e23a13fb7 117 /**
quentin9696 0:528e23a13fb7 118 * @brief Set HTS221 Initialization.
quentin9696 0:528e23a13fb7 119 * @param InitStruct: it contains the configuration setting for the HTS221.
quentin9696 0:528e23a13fb7 120 * @retval None
quentin9696 0:528e23a13fb7 121 */
quentin9696 0:528e23a13fb7 122 void LPS25H::Init() {
quentin9696 0:528e23a13fb7 123 int ret;
quentin9696 0:528e23a13fb7 124 uint8_t tmp1 = 0x00;
quentin9696 0:528e23a13fb7 125
quentin9696 0:528e23a13fb7 126 Power_ON();
quentin9696 0:528e23a13fb7 127
quentin9696 0:528e23a13fb7 128 //PRESSURE_IO_Read(&tmp1, LPS25H_SlaveAddress, LPS25H_CTRL_REG1_ADDR, 1);
quentin9696 0:528e23a13fb7 129 ret = dev_i2c.i2c_read(&tmp1, LPS25H_ADDRESS_HIGH, LPS25H_CTRL_REG1_ADDR, 1);
quentin9696 0:528e23a13fb7 130
quentin9696 0:528e23a13fb7 131 if (ret == 0)
quentin9696 0:528e23a13fb7 132 {
quentin9696 0:528e23a13fb7 133 /* Output Data Rate selection */
quentin9696 0:528e23a13fb7 134 tmp1 &= ~(LPS25H_ODR_MASK);
quentin9696 0:528e23a13fb7 135 tmp1 |= LPS25H_ODR_1Hz;
quentin9696 0:528e23a13fb7 136
quentin9696 0:528e23a13fb7 137 /* Interrupt circuit selection */
quentin9696 0:528e23a13fb7 138 tmp1 &= ~(LPS25H_DIFF_EN_MASK);
quentin9696 0:528e23a13fb7 139 tmp1 |= LPS25H_DIFF_ENABLE;
quentin9696 0:528e23a13fb7 140
quentin9696 0:528e23a13fb7 141 /* Block Data Update selection */
quentin9696 0:528e23a13fb7 142 tmp1 &= ~(LPS25H_BDU_MASK);
quentin9696 0:528e23a13fb7 143 tmp1 |= LPS25H_BDU_CONT;
quentin9696 0:528e23a13fb7 144
quentin9696 0:528e23a13fb7 145 /* Serial Interface Mode selection */
quentin9696 0:528e23a13fb7 146 tmp1 &= ~(LPS25H_SPI_SIM_MASK);
quentin9696 0:528e23a13fb7 147 tmp1 |= LPS25H_SPI_SIM_3W;
quentin9696 0:528e23a13fb7 148
quentin9696 0:528e23a13fb7 149 //PRESSURE_IO_Write(&tmp1, LPS25H_SlaveAddress, LPS25H_CTRL_REG1_ADDR, 1);
quentin9696 0:528e23a13fb7 150 ret = dev_i2c.i2c_write(&tmp1, LPS25H_ADDRESS_HIGH, LPS25H_CTRL_REG1_ADDR, 1);
quentin9696 0:528e23a13fb7 151 }
quentin9696 0:528e23a13fb7 152
quentin9696 0:528e23a13fb7 153 if (ret == 0)
quentin9696 0:528e23a13fb7 154 {
quentin9696 0:528e23a13fb7 155 //PRESSURE_IO_Read(&tmp1, LPS25H_SlaveAddress, LPS25H_RES_CONF_ADDR, 1);
quentin9696 0:528e23a13fb7 156 ret = dev_i2c.i2c_read(&tmp1, LPS25H_ADDRESS_HIGH, LPS25H_RES_CONF_ADDR, 1);
quentin9696 0:528e23a13fb7 157 }
quentin9696 0:528e23a13fb7 158
quentin9696 0:528e23a13fb7 159 if (ret == 0)
quentin9696 0:528e23a13fb7 160 {
quentin9696 0:528e23a13fb7 161 /* Pressure Res selection */
quentin9696 0:528e23a13fb7 162 tmp1 &= ~(LPS25H_P_RES_MASK);
quentin9696 0:528e23a13fb7 163 tmp1 |= LPS25H_P_RES_AVG_32;
quentin9696 0:528e23a13fb7 164
quentin9696 0:528e23a13fb7 165 /* Temperature Res selection */
quentin9696 0:528e23a13fb7 166 tmp1 &= ~(LPS25H_T_RES_MASK);
quentin9696 0:528e23a13fb7 167 tmp1 |= LPS25H_T_RES_AVG_16;
quentin9696 0:528e23a13fb7 168
quentin9696 0:528e23a13fb7 169 //PRESSURE_IO_Write(&tmp1, LPS25H_SlaveAddress, LPS25H_RES_CONF_ADDR, 1);
quentin9696 0:528e23a13fb7 170 ret = dev_i2c.i2c_write(&tmp1, LPS25H_ADDRESS_HIGH, LPS25H_RES_CONF_ADDR, 1);
quentin9696 0:528e23a13fb7 171 }
quentin9696 0:528e23a13fb7 172
quentin9696 0:528e23a13fb7 173 if (ret == 0)
quentin9696 0:528e23a13fb7 174 {
quentin9696 0:528e23a13fb7 175 if(ReadID() == I_AM_LPS25H)
quentin9696 0:528e23a13fb7 176 {
quentin9696 0:528e23a13fb7 177 Lps25hInitialized = 1;
quentin9696 0:528e23a13fb7 178 //ret = HUM_TEMP_OK;
quentin9696 0:528e23a13fb7 179 }
quentin9696 0:528e23a13fb7 180 }
quentin9696 0:528e23a13fb7 181
quentin9696 0:528e23a13fb7 182 return;
quentin9696 0:528e23a13fb7 183 }
quentin9696 0:528e23a13fb7 184
quentin9696 0:528e23a13fb7 185 int LPS25H::Power_ON() {
quentin9696 0:528e23a13fb7 186 uint8_t tmpreg;
quentin9696 0:528e23a13fb7 187 int ret;
quentin9696 0:528e23a13fb7 188
quentin9696 0:528e23a13fb7 189 /* Read the register content */
quentin9696 0:528e23a13fb7 190 //PRESSURE_IO_Read(&tmpreg, LPS25H_SlaveAddress, LPS25H_CTRL_REG1_ADDR, 1);
quentin9696 0:528e23a13fb7 191 ret = dev_i2c.i2c_read(&tmpreg, 0xBA, 0x20, 1);
quentin9696 0:528e23a13fb7 192
quentin9696 0:528e23a13fb7 193 /* Set the power down bit */
quentin9696 0:528e23a13fb7 194 tmpreg |= LPS25H_MODE_ACTIVE;
quentin9696 0:528e23a13fb7 195
quentin9696 0:528e23a13fb7 196 /* Write register */
quentin9696 0:528e23a13fb7 197 //PRESSURE_IO_Write(&tmpreg, LPS25H_SlaveAddress, LPS25H_CTRL_REG1_ADDR, 1);
quentin9696 0:528e23a13fb7 198 ret = dev_i2c.i2c_write(&tmpreg, LPS25H_ADDRESS_HIGH, LPS25H_CTRL_REG1_ADDR, 1);
quentin9696 0:528e23a13fb7 199 return ret;
quentin9696 0:528e23a13fb7 200
quentin9696 0:528e23a13fb7 201 }
quentin9696 0:528e23a13fb7 202
quentin9696 0:528e23a13fb7 203 int LPS25H::LPS25H_Calibration() {
quentin9696 0:528e23a13fb7 204
quentin9696 0:528e23a13fb7 205 int ret = 0;
quentin9696 0:528e23a13fb7 206
quentin9696 0:528e23a13fb7 207 if(Lps25hInitialized == 1)
quentin9696 0:528e23a13fb7 208 {
quentin9696 0:528e23a13fb7 209 return 1; //TODO: Error Codes definitions
quentin9696 0:528e23a13fb7 210 }
quentin9696 0:528e23a13fb7 211
quentin9696 0:528e23a13fb7 212 return ret;
quentin9696 0:528e23a13fb7 213 }