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Components/x_cube_mems_i2c.h@5:e2e603447679, 2015-05-21 (annotated)

Committer:: quentin9696
Date:: Thu May 21 11:21:58 2015 +0000
Revision:: 5:e2e603447679
Parent:: 0:528e23a13fb7

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User	Revision	Line number	New contents of line
quentin9696	0:528e23a13fb7	1	/**
quentin9696	0:528e23a13fb7	2	******************************************************************************
quentin9696	0:528e23a13fb7	3	* @file x_cube_mems_i2c.h
quentin9696	0:528e23a13fb7	4	* @author AST / EST
quentin9696	0:528e23a13fb7	5	* @version V0.0.1
quentin9696	0:528e23a13fb7	6	* @date 28-November-2014
quentin9696	0:528e23a13fb7	7	* @brief Header file for a special I2C class DevI2C which provides some
quentin9696	0:528e23a13fb7	8	* helper function for on-board communication
quentin9696	0:528e23a13fb7	9	******************************************************************************
quentin9696	0:528e23a13fb7	10	* @attention
quentin9696	0:528e23a13fb7	11	*
quentin9696	0:528e23a13fb7	12	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
quentin9696	0:528e23a13fb7	13	*
quentin9696	0:528e23a13fb7	14	* Redistribution and use in source and binary forms, with or without modification,
quentin9696	0:528e23a13fb7	15	* are permitted provided that the following conditions are met:
quentin9696	0:528e23a13fb7	16	* 1. Redistributions of source code must retain the above copyright notice,
quentin9696	0:528e23a13fb7	17	* this list of conditions and the following disclaimer.
quentin9696	0:528e23a13fb7	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
quentin9696	0:528e23a13fb7	19	* this list of conditions and the following disclaimer in the documentation
quentin9696	0:528e23a13fb7	20	* and/or other materials provided with the distribution.
quentin9696	0:528e23a13fb7	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
quentin9696	0:528e23a13fb7	22	* may be used to endorse or promote products derived from this software
quentin9696	0:528e23a13fb7	23	* without specific prior written permission.
quentin9696	0:528e23a13fb7	24	*
quentin9696	0:528e23a13fb7	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
quentin9696	0:528e23a13fb7	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
quentin9696	0:528e23a13fb7	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
quentin9696	0:528e23a13fb7	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
quentin9696	0:528e23a13fb7	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
quentin9696	0:528e23a13fb7	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
quentin9696	0:528e23a13fb7	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
quentin9696	0:528e23a13fb7	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
quentin9696	0:528e23a13fb7	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
quentin9696	0:528e23a13fb7	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
quentin9696	0:528e23a13fb7	35	*
quentin9696	0:528e23a13fb7	36	******************************************************************************
quentin9696	0:528e23a13fb7	37	*/
quentin9696	0:528e23a13fb7	38
quentin9696	0:528e23a13fb7	39	/* Define to prevent from recursive inclusion --------------------------------*/
quentin9696	0:528e23a13fb7	40	#ifndef __X_CUBE_MEMS_I2C_H
quentin9696	0:528e23a13fb7	41	#define __X_CUBE_MEMS_I2C_H
quentin9696	0:528e23a13fb7	42
quentin9696	0:528e23a13fb7	43	/* Includes ------------------------------------------------------------------*/
quentin9696	0:528e23a13fb7	44	#include "mbed.h"
quentin9696	0:528e23a13fb7	45
quentin9696	0:528e23a13fb7	46	typedef struct {
quentin9696	0:528e23a13fb7	47	int32_t AXIS_X;
quentin9696	0:528e23a13fb7	48	int32_t AXIS_Y;
quentin9696	0:528e23a13fb7	49	int32_t AXIS_Z;
quentin9696	0:528e23a13fb7	50	} AxesRaw_TypeDef;
quentin9696	0:528e23a13fb7	51
quentin9696	0:528e23a13fb7	52	/* Classes -------------------------------------------------------------------*/
quentin9696	0:528e23a13fb7	53	/** Helper class DevI2C providing some common functionality useful for on-board
quentin9696	0:528e23a13fb7	54	* communication.
quentin9696	0:528e23a13fb7	55	*/
quentin9696	0:528e23a13fb7	56	class DevI2C : public I2C
quentin9696	0:528e23a13fb7	57	{
quentin9696	0:528e23a13fb7	58	public:
quentin9696	0:528e23a13fb7	59	/** Create a DevI2C Master interface, connected to the specified pins
quentin9696	0:528e23a13fb7	60	*
quentin9696	0:528e23a13fb7	61	* @param sda I2C data line pin
quentin9696	0:528e23a13fb7	62	* @param scl I2C clock line pin
quentin9696	0:528e23a13fb7	63	*/
quentin9696	0:528e23a13fb7	64	DevI2C(PinName sda, PinName scl) : I2C(sda, scl) {};
quentin9696	0:528e23a13fb7	65
quentin9696	0:528e23a13fb7	66	/**
quentin9696	0:528e23a13fb7	67	* @brief Writes a buffer from the I2C peripheral device.
quentin9696	0:528e23a13fb7	68	* @param pBuffer pointer to data to be read.
quentin9696	0:528e23a13fb7	69	* @param DeviceAddr specifies the peripheral device slave address
quentin9696	0:528e23a13fb7	70	* (correctly masked).
quentin9696	0:528e23a13fb7	71	* @param RegisterAddr specifies internal address register to read from.
quentin9696	0:528e23a13fb7	72	* @param NumByteToWrite number of bytes to be written.
quentin9696	0:528e23a13fb7	73	* @retval 0 if ok, -1 if an I2C error has occured
quentin9696	0:528e23a13fb7	74	* @note on some devices if NumByteToWrite is greater
quentin9696	0:528e23a13fb7	75	* than one, the DeviceAddr must be masked correctly
quentin9696	0:528e23a13fb7	76	*/
quentin9696	0:528e23a13fb7	77	int i2c_write(uint8_t* pBuffer, uint8_t DeviceAddr, uint8_t RegisterAddr,
quentin9696	0:528e23a13fb7	78	uint16_t NumByteToWrite)
quentin9696	0:528e23a13fb7	79	{
quentin9696	0:528e23a13fb7	80	int ret;
quentin9696	0:528e23a13fb7	81	uint8_t tmp[32];
quentin9696	0:528e23a13fb7	82
quentin9696	0:528e23a13fb7	83	//Acquire mbed mutex/semaphore/lock?
quentin9696	0:528e23a13fb7	84
quentin9696	0:528e23a13fb7	85	/* First, send device address. Then, send data and STOP condition */
quentin9696	0:528e23a13fb7	86	tmp[0] = RegisterAddr;
quentin9696	0:528e23a13fb7	87	memcpy(tmp+1, pBuffer, NumByteToWrite);
quentin9696	0:528e23a13fb7	88
quentin9696	0:528e23a13fb7	89	ret = write(DeviceAddr, (const char*)tmp, NumByteToWrite+1, 0);
quentin9696	0:528e23a13fb7	90
quentin9696	0:528e23a13fb7	91	//Release mbed mutex/semaphore/lock?
quentin9696	0:528e23a13fb7	92
quentin9696	0:528e23a13fb7	93	if(ret) {
quentin9696	0:528e23a13fb7	94	error("%s: dev = %d, reg = %d, num = %d\n",
quentin9696	0:528e23a13fb7	95	__func__, DeviceAddr, RegisterAddr, NumByteToWrite);
quentin9696	0:528e23a13fb7	96	return -1;
quentin9696	0:528e23a13fb7	97	}
quentin9696	0:528e23a13fb7	98	return 0;
quentin9696	0:528e23a13fb7	99	}
quentin9696	0:528e23a13fb7	100
quentin9696	0:528e23a13fb7	101	/**
quentin9696	0:528e23a13fb7	102	* @brief Reads a buffer from the I2C peripheral device.
quentin9696	0:528e23a13fb7	103	* @param pBuffer pointer to data to be read.
quentin9696	0:528e23a13fb7	104	* @param DaviceAddr specifies the peripheral device slave address
quentin9696	0:528e23a13fb7	105	* (correctly masked)..
quentin9696	0:528e23a13fb7	106	* @param RegisterAddr specifies internal address register to read from.
quentin9696	0:528e23a13fb7	107	* @param NumByteToRead number of bytes to be read.
quentin9696	0:528e23a13fb7	108	* @retval 0 if ok, -1 if an I2C error has occured
quentin9696	0:528e23a13fb7	109	* @note on some devices if NumByteToRead is greater
quentin9696	0:528e23a13fb7	110	* than one, the DeviceAddr must be masked correctly
quentin9696	0:528e23a13fb7	111	*/
quentin9696	0:528e23a13fb7	112	int i2c_read(uint8_t* pBuffer, uint8_t DeviceAddr, uint8_t RegisterAddr,
quentin9696	0:528e23a13fb7	113	uint16_t NumByteToRead)
quentin9696	0:528e23a13fb7	114	{
quentin9696	0:528e23a13fb7	115	int ret;
quentin9696	0:528e23a13fb7	116
quentin9696	0:528e23a13fb7	117	//Acquire mbed mutex/semaphore/lock?
quentin9696	0:528e23a13fb7	118
quentin9696	0:528e23a13fb7	119	/* Send device address, with no STOP condition */
quentin9696	0:528e23a13fb7	120	ret = write(DeviceAddr, (const char*)&RegisterAddr, 1, 1);
quentin9696	0:528e23a13fb7	121	if(!ret) {
quentin9696	0:528e23a13fb7	122	/* Read data, with STOP condition */
quentin9696	0:528e23a13fb7	123	ret = read(DeviceAddr, (char*)pBuffer, NumByteToRead, 0);
quentin9696	0:528e23a13fb7	124	}
quentin9696	0:528e23a13fb7	125
quentin9696	0:528e23a13fb7	126	//Release mbed mutex/semaphore/lock?
quentin9696	0:528e23a13fb7	127
quentin9696	0:528e23a13fb7	128	if(ret) {
quentin9696	0:528e23a13fb7	129	error("%s: dev = %d, reg = %d, num = %d\n",
quentin9696	0:528e23a13fb7	130	__func__, DeviceAddr, RegisterAddr, NumByteToRead);
quentin9696	0:528e23a13fb7	131	return -1;
quentin9696	0:528e23a13fb7	132	}
quentin9696	0:528e23a13fb7	133	return 0;
quentin9696	0:528e23a13fb7	134	}
quentin9696	0:528e23a13fb7	135	};
quentin9696	0:528e23a13fb7	136
quentin9696	0:528e23a13fb7	137	#endif /* __X_CUBE_MEMS_I2C_H */

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Type:	Program
Created:	27 Sep 2015
Imports:	2
Forks:	0
Commits:	6
Dependents:	2
Dependencies:	0
Followers:	10

Components/x_cube_mems_i2c.h@5:e2e603447679, 2015-05-21 (annotated)

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