mbed-src updated for BMD-200 evaluation board. Just pin numbers are updated.
Dependents: mbed_blinky-bmd-200 bmd-200_accel_demo firstRig
Fork of mbed-src by
Replacement for the "mbed" or "mbed-src" library when using the BMD-200 Evaluation kit. This library only remaps the pin names (i.e. LED1 points to p0.01 instead of p0.18, etc) as used by the BMD-200 Evaluation board (select the nRF51822_mkit platform). All other code is untouched.
targets/hal/TARGET_STM/TARGET_STM32F1/pinmap.c@592:5e2eb8beba71, 2015-07-10 (annotated)
- Committer:
- dcnichols
- Date:
- Fri Jul 10 17:36:27 2015 +0000
- Revision:
- 592:5e2eb8beba71
- Parent:
- 541:c61a9ac6f5c2
updating to latest mbed-src
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 52:a51c77007319 | 1 | /* mbed Microcontroller Library |
mbed_official | 70:c1fbde68b492 | 2 | ******************************************************************************* |
mbed_official | 70:c1fbde68b492 | 3 | * Copyright (c) 2014, STMicroelectronics |
mbed_official | 70:c1fbde68b492 | 4 | * All rights reserved. |
mbed_official | 52:a51c77007319 | 5 | * |
mbed_official | 70:c1fbde68b492 | 6 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 70:c1fbde68b492 | 7 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 52:a51c77007319 | 8 | * |
mbed_official | 70:c1fbde68b492 | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 70:c1fbde68b492 | 10 | * this list of conditions and the following disclaimer. |
mbed_official | 70:c1fbde68b492 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 70:c1fbde68b492 | 12 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 70:c1fbde68b492 | 13 | * and/or other materials provided with the distribution. |
mbed_official | 70:c1fbde68b492 | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 70:c1fbde68b492 | 15 | * may be used to endorse or promote products derived from this software |
mbed_official | 70:c1fbde68b492 | 16 | * without specific prior written permission. |
mbed_official | 52:a51c77007319 | 17 | * |
mbed_official | 70:c1fbde68b492 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 70:c1fbde68b492 | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 70:c1fbde68b492 | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 70:c1fbde68b492 | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 70:c1fbde68b492 | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 70:c1fbde68b492 | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 70:c1fbde68b492 | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 70:c1fbde68b492 | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 70:c1fbde68b492 | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 70:c1fbde68b492 | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 70:c1fbde68b492 | 28 | ******************************************************************************* |
mbed_official | 52:a51c77007319 | 29 | */ |
mbed_official | 227:7bd0639b8911 | 30 | #include "mbed_assert.h" |
mbed_official | 52:a51c77007319 | 31 | #include "pinmap.h" |
mbed_official | 145:cfacfb0a9e19 | 32 | #include "PortNames.h" |
mbed_official | 285:31249416b6f9 | 33 | #include "mbed_error.h" |
mbed_official | 52:a51c77007319 | 34 | |
mbed_official | 492:119543c9f674 | 35 | // GPIO mode look-up table |
mbed_official | 492:119543c9f674 | 36 | // Warning: the elements order must be the same as the one defined in PinNames.h |
mbed_official | 492:119543c9f674 | 37 | static const uint32_t gpio_mode[13] = { |
mbed_official | 492:119543c9f674 | 38 | GPIO_MODE_INPUT, // 0 = STM_MODE_INPUT |
mbed_official | 492:119543c9f674 | 39 | GPIO_MODE_OUTPUT_PP, // 1 = STM_MODE_OUTPUT_PP |
mbed_official | 492:119543c9f674 | 40 | GPIO_MODE_OUTPUT_OD, // 2 = STM_MODE_OUTPUT_OD |
mbed_official | 492:119543c9f674 | 41 | GPIO_MODE_AF_PP, // 3 = STM_MODE_AF_PP |
mbed_official | 492:119543c9f674 | 42 | GPIO_MODE_AF_OD, // 4 = STM_MODE_AF_OD |
mbed_official | 492:119543c9f674 | 43 | GPIO_MODE_ANALOG, // 5 = STM_MODE_ANALOG |
mbed_official | 492:119543c9f674 | 44 | GPIO_MODE_IT_RISING, // 6 = STM_MODE_IT_RISING |
mbed_official | 492:119543c9f674 | 45 | GPIO_MODE_IT_FALLING, // 7 = STM_MODE_IT_FALLING |
mbed_official | 492:119543c9f674 | 46 | GPIO_MODE_IT_RISING_FALLING, // 8 = STM_MODE_IT_RISING_FALLING |
mbed_official | 492:119543c9f674 | 47 | GPIO_MODE_EVT_RISING, // 9 = STM_MODE_EVT_RISING |
mbed_official | 492:119543c9f674 | 48 | GPIO_MODE_EVT_FALLING, // 10 = STM_MODE_EVT_FALLING |
mbed_official | 492:119543c9f674 | 49 | GPIO_MODE_EVT_RISING_FALLING, // 11 = STM_MODE_EVT_RISING_FALLING |
mbed_official | 492:119543c9f674 | 50 | 0x10000000 // 12 = STM_MODE_IT_EVT_RESET (not in STM32Cube HAL) |
mbed_official | 52:a51c77007319 | 51 | }; |
mbed_official | 52:a51c77007319 | 52 | |
mbed_official | 76:aeb1df146756 | 53 | // Enable GPIO clock and return GPIO base address |
mbed_official | 403:09075a3b15e3 | 54 | uint32_t Set_GPIO_Clock(uint32_t port_idx) |
mbed_official | 403:09075a3b15e3 | 55 | { |
mbed_official | 76:aeb1df146756 | 56 | uint32_t gpio_add = 0; |
mbed_official | 76:aeb1df146756 | 57 | switch (port_idx) { |
mbed_official | 76:aeb1df146756 | 58 | case PortA: |
mbed_official | 76:aeb1df146756 | 59 | gpio_add = GPIOA_BASE; |
mbed_official | 492:119543c9f674 | 60 | __GPIOA_CLK_ENABLE(); |
mbed_official | 76:aeb1df146756 | 61 | break; |
mbed_official | 76:aeb1df146756 | 62 | case PortB: |
mbed_official | 76:aeb1df146756 | 63 | gpio_add = GPIOB_BASE; |
mbed_official | 492:119543c9f674 | 64 | __GPIOB_CLK_ENABLE(); |
mbed_official | 76:aeb1df146756 | 65 | break; |
mbed_official | 76:aeb1df146756 | 66 | case PortC: |
mbed_official | 76:aeb1df146756 | 67 | gpio_add = GPIOC_BASE; |
mbed_official | 492:119543c9f674 | 68 | __GPIOC_CLK_ENABLE(); |
mbed_official | 76:aeb1df146756 | 69 | break; |
mbed_official | 76:aeb1df146756 | 70 | case PortD: |
mbed_official | 76:aeb1df146756 | 71 | gpio_add = GPIOD_BASE; |
mbed_official | 492:119543c9f674 | 72 | __GPIOD_CLK_ENABLE(); |
mbed_official | 76:aeb1df146756 | 73 | break; |
mbed_official | 76:aeb1df146756 | 74 | default: |
mbed_official | 492:119543c9f674 | 75 | error("Pinmap error: wrong port number."); |
mbed_official | 76:aeb1df146756 | 76 | break; |
mbed_official | 76:aeb1df146756 | 77 | } |
mbed_official | 76:aeb1df146756 | 78 | return gpio_add; |
mbed_official | 76:aeb1df146756 | 79 | } |
mbed_official | 76:aeb1df146756 | 80 | |
mbed_official | 52:a51c77007319 | 81 | /** |
mbed_official | 76:aeb1df146756 | 82 | * Configure pin (input, output, alternate function or analog) + output speed + AF |
mbed_official | 52:a51c77007319 | 83 | */ |
mbed_official | 403:09075a3b15e3 | 84 | void pin_function(PinName pin, int data) |
mbed_official | 403:09075a3b15e3 | 85 | { |
mbed_official | 227:7bd0639b8911 | 86 | MBED_ASSERT(pin != (PinName)NC); |
mbed_official | 76:aeb1df146756 | 87 | // Get the pin informations |
mbed_official | 52:a51c77007319 | 88 | uint32_t mode = STM_PIN_MODE(data); |
mbed_official | 492:119543c9f674 | 89 | uint32_t pupd = STM_PIN_PUPD(data); |
mbed_official | 52:a51c77007319 | 90 | uint32_t afnum = STM_PIN_AFNUM(data); |
mbed_official | 52:a51c77007319 | 91 | |
mbed_official | 76:aeb1df146756 | 92 | uint32_t port_index = STM_PORT(pin); |
mbed_official | 76:aeb1df146756 | 93 | uint32_t pin_index = STM_PIN(pin); |
mbed_official | 52:a51c77007319 | 94 | |
mbed_official | 76:aeb1df146756 | 95 | // Enable GPIO clock |
mbed_official | 76:aeb1df146756 | 96 | uint32_t gpio_add = Set_GPIO_Clock(port_index); |
mbed_official | 84:f54042cbc282 | 97 | GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; |
mbed_official | 80:66393a7b209d | 98 | |
mbed_official | 76:aeb1df146756 | 99 | // Enable AFIO clock |
mbed_official | 492:119543c9f674 | 100 | __HAL_RCC_AFIO_CLK_ENABLE(); |
mbed_official | 80:66393a7b209d | 101 | |
mbed_official | 80:66393a7b209d | 102 | // Configure Alternate Function |
mbed_official | 80:66393a7b209d | 103 | // Warning: Must be done before the GPIO is initialized |
mbed_official | 492:119543c9f674 | 104 | if (afnum > 0) { |
mbed_official | 492:119543c9f674 | 105 | switch (afnum) { |
mbed_official | 492:119543c9f674 | 106 | case 1: // Remap SPI1 |
mbed_official | 492:119543c9f674 | 107 | __HAL_AFIO_REMAP_SPI1_ENABLE(); |
mbed_official | 492:119543c9f674 | 108 | break; |
mbed_official | 492:119543c9f674 | 109 | case 2: // Remap I2C1 |
mbed_official | 492:119543c9f674 | 110 | __HAL_AFIO_REMAP_I2C1_ENABLE(); |
mbed_official | 492:119543c9f674 | 111 | break; |
mbed_official | 492:119543c9f674 | 112 | case 3: // Remap USART1 |
mbed_official | 492:119543c9f674 | 113 | __HAL_AFIO_REMAP_USART1_ENABLE(); |
mbed_official | 492:119543c9f674 | 114 | break; |
mbed_official | 492:119543c9f674 | 115 | case 4: // Remap USART2 |
mbed_official | 492:119543c9f674 | 116 | __HAL_AFIO_REMAP_USART2_ENABLE(); |
mbed_official | 492:119543c9f674 | 117 | break; |
mbed_official | 492:119543c9f674 | 118 | case 5: // Partial Remap USART3 |
mbed_official | 492:119543c9f674 | 119 | __HAL_AFIO_REMAP_USART3_PARTIAL(); |
mbed_official | 492:119543c9f674 | 120 | break; |
mbed_official | 492:119543c9f674 | 121 | case 6: // Partial Remap TIM1 |
mbed_official | 492:119543c9f674 | 122 | __HAL_AFIO_REMAP_TIM1_PARTIAL(); |
mbed_official | 492:119543c9f674 | 123 | break; |
mbed_official | 492:119543c9f674 | 124 | case 7: // Partial Remap TIM3 |
mbed_official | 492:119543c9f674 | 125 | __HAL_AFIO_REMAP_TIM3_PARTIAL(); |
mbed_official | 492:119543c9f674 | 126 | break; |
mbed_official | 492:119543c9f674 | 127 | case 8: // Full Remap TIM2 |
mbed_official | 492:119543c9f674 | 128 | __HAL_AFIO_REMAP_TIM2_ENABLE(); |
mbed_official | 492:119543c9f674 | 129 | break; |
mbed_official | 492:119543c9f674 | 130 | case 9: // Full Remap TIM3 |
mbed_official | 492:119543c9f674 | 131 | __HAL_AFIO_REMAP_TIM3_ENABLE(); |
mbed_official | 492:119543c9f674 | 132 | break; |
mbed_official | 492:119543c9f674 | 133 | default: |
mbed_official | 492:119543c9f674 | 134 | break; |
mbed_official | 492:119543c9f674 | 135 | } |
mbed_official | 80:66393a7b209d | 136 | } |
mbed_official | 174:8bb9f3a33240 | 137 | |
mbed_official | 52:a51c77007319 | 138 | // Configure GPIO |
mbed_official | 84:f54042cbc282 | 139 | GPIO_InitTypeDef GPIO_InitStructure; |
mbed_official | 492:119543c9f674 | 140 | GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index); |
mbed_official | 492:119543c9f674 | 141 | GPIO_InitStructure.Mode = gpio_mode[mode]; |
mbed_official | 492:119543c9f674 | 142 | GPIO_InitStructure.Pull = pupd; |
mbed_official | 492:119543c9f674 | 143 | GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; |
mbed_official | 492:119543c9f674 | 144 | HAL_GPIO_Init(gpio, &GPIO_InitStructure); |
mbed_official | 174:8bb9f3a33240 | 145 | |
mbed_official | 52:a51c77007319 | 146 | // Disconnect JTAG-DP + SW-DP signals. |
mbed_official | 52:a51c77007319 | 147 | // Warning: Need to reconnect under reset |
mbed_official | 52:a51c77007319 | 148 | if ((pin == PA_13) || (pin == PA_14)) { |
mbed_official | 492:119543c9f674 | 149 | __HAL_AFIO_REMAP_SWJ_DISABLE(); // JTAG-DP Disabled and SW-DP Disabled |
mbed_official | 52:a51c77007319 | 150 | } |
mbed_official | 52:a51c77007319 | 151 | if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) { |
mbed_official | 492:119543c9f674 | 152 | __HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled |
mbed_official | 174:8bb9f3a33240 | 153 | } |
mbed_official | 52:a51c77007319 | 154 | } |
mbed_official | 52:a51c77007319 | 155 | |
mbed_official | 52:a51c77007319 | 156 | /** |
mbed_official | 76:aeb1df146756 | 157 | * Configure pin pull-up/pull-down |
mbed_official | 52:a51c77007319 | 158 | */ |
mbed_official | 403:09075a3b15e3 | 159 | void pin_mode(PinName pin, PinMode mode) |
mbed_official | 403:09075a3b15e3 | 160 | { |
mbed_official | 227:7bd0639b8911 | 161 | MBED_ASSERT(pin != (PinName)NC); |
mbed_official | 174:8bb9f3a33240 | 162 | |
mbed_official | 76:aeb1df146756 | 163 | uint32_t port_index = STM_PORT(pin); |
mbed_official | 76:aeb1df146756 | 164 | uint32_t pin_index = STM_PIN(pin); |
mbed_official | 52:a51c77007319 | 165 | |
mbed_official | 52:a51c77007319 | 166 | // Enable GPIO clock |
mbed_official | 76:aeb1df146756 | 167 | uint32_t gpio_add = Set_GPIO_Clock(port_index); |
mbed_official | 84:f54042cbc282 | 168 | GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; |
mbed_official | 174:8bb9f3a33240 | 169 | |
mbed_official | 52:a51c77007319 | 170 | // Configure open-drain and pull-up/down |
mbed_official | 52:a51c77007319 | 171 | switch (mode) { |
mbed_official | 174:8bb9f3a33240 | 172 | case PullNone: |
mbed_official | 492:119543c9f674 | 173 | break; |
mbed_official | 174:8bb9f3a33240 | 174 | case PullUp: |
mbed_official | 174:8bb9f3a33240 | 175 | case PullDown: |
mbed_official | 492:119543c9f674 | 176 | // Set pull-up / pull-down for Input mode |
mbed_official | 492:119543c9f674 | 177 | if (pin_index < 8) { |
mbed_official | 492:119543c9f674 | 178 | if ((gpio->CRL & (0x03 << (pin_index * 4))) == 0) { // MODE bits = Input mode |
mbed_official | 492:119543c9f674 | 179 | gpio->CRL |= (0x08 << (pin_index * 4)); // Set pull-up / pull-down |
mbed_official | 541:c61a9ac6f5c2 | 180 | gpio->CRL &= ~(0x08 << ((pin_index * 4)-1)); // ENSURES GPIOx_CRL.CNFx.bit0 = 0 |
mbed_official | 492:119543c9f674 | 181 | } |
mbed_official | 492:119543c9f674 | 182 | } else { |
mbed_official | 492:119543c9f674 | 183 | if ((gpio->CRH & (0x03 << ((pin_index % 8) * 4))) == 0) { // MODE bits = Input mode |
mbed_official | 492:119543c9f674 | 184 | gpio->CRH |= (0x08 << ((pin_index % 8) * 4)); // Set pull-up / pull-down |
mbed_official | 541:c61a9ac6f5c2 | 185 | gpio->CRH &= ~(0x08 << (((pin_index % 8) * 4)-1)); // ENSURES GPIOx_CRH.CNFx.bit0 = 0 |
mbed_official | 492:119543c9f674 | 186 | } |
mbed_official | 492:119543c9f674 | 187 | } |
mbed_official | 541:c61a9ac6f5c2 | 188 | // Now it's time to setup properly if pullup or pulldown. This is done in ODR register: |
mbed_official | 541:c61a9ac6f5c2 | 189 | // set pull-up => bit=1, set pull-down => bit = 0 |
mbed_official | 541:c61a9ac6f5c2 | 190 | if (mode == PullUp) { |
mbed_official | 541:c61a9ac6f5c2 | 191 | gpio->ODR |= (0x01 << (pin_index)); // Set pull-up |
mbed_official | 541:c61a9ac6f5c2 | 192 | } else{ |
mbed_official | 541:c61a9ac6f5c2 | 193 | gpio->ODR &= ~(0x01 << (pin_index)); // Set pull-down |
mbed_official | 541:c61a9ac6f5c2 | 194 | } |
mbed_official | 174:8bb9f3a33240 | 195 | break; |
mbed_official | 174:8bb9f3a33240 | 196 | case OpenDrain: |
mbed_official | 492:119543c9f674 | 197 | // Set open-drain for Output mode (General Purpose or Alternate Function) |
mbed_official | 174:8bb9f3a33240 | 198 | if (pin_index < 8) { |
mbed_official | 174:8bb9f3a33240 | 199 | if ((gpio->CRL & (0x03 << (pin_index * 4))) > 0) { // MODE bits = Output mode |
mbed_official | 174:8bb9f3a33240 | 200 | gpio->CRL |= (0x04 << (pin_index * 4)); // Set open-drain |
mbed_official | 174:8bb9f3a33240 | 201 | } |
mbed_official | 174:8bb9f3a33240 | 202 | } else { |
mbed_official | 174:8bb9f3a33240 | 203 | if ((gpio->CRH & (0x03 << ((pin_index % 8) * 4))) > 0) { // MODE bits = Output mode |
mbed_official | 174:8bb9f3a33240 | 204 | gpio->CRH |= (0x04 << ((pin_index % 8) * 4)); // Set open-drain |
mbed_official | 174:8bb9f3a33240 | 205 | } |
mbed_official | 52:a51c77007319 | 206 | } |
mbed_official | 492:119543c9f674 | 207 | break; |
mbed_official | 174:8bb9f3a33240 | 208 | default: |
mbed_official | 174:8bb9f3a33240 | 209 | break; |
mbed_official | 52:a51c77007319 | 210 | } |
mbed_official | 52:a51c77007319 | 211 | } |