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targets/hal/TARGET_STM/TARGET_DISCO_F401VC/gpio_irq_api.c@443:d2c15dda23c1, 2015-01-06 (annotated)

Committer:
mbed_official
Date:
Tue Jan 06 16:15:36 2015 +0000
Revision:
443:d2c15dda23c1
Synchronized with git revision 245a60b29caabb42eabdd19658eeac7c3f68313b



Full URL: https://github.com/mbedmicro/mbed/commit/245a60b29caabb42eabdd19658eeac7c3f68313b/



NUCLEO_F072RB/F091RC - adding target to rtos lib and exporter for coide and gcc_arm

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 443:d2c15dda23c1 1 /* mbed Microcontroller Library
mbed_official 443:d2c15dda23c1 2 *******************************************************************************
mbed_official 443:d2c15dda23c1 3 * Copyright (c) 2014, STMicroelectronics
mbed_official 443:d2c15dda23c1 4 * All rights reserved.
mbed_official 443:d2c15dda23c1 5 *
mbed_official 443:d2c15dda23c1 6 * Redistribution and use in source and binary forms, with or without
mbed_official 443:d2c15dda23c1 7 * modification, are permitted provided that the following conditions are met:
mbed_official 443:d2c15dda23c1 8 *
mbed_official 443:d2c15dda23c1 9 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 443:d2c15dda23c1 10 * this list of conditions and the following disclaimer.
mbed_official 443:d2c15dda23c1 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 443:d2c15dda23c1 12 * this list of conditions and the following disclaimer in the documentation
mbed_official 443:d2c15dda23c1 13 * and/or other materials provided with the distribution.
mbed_official 443:d2c15dda23c1 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 443:d2c15dda23c1 15 * may be used to endorse or promote products derived from this software
mbed_official 443:d2c15dda23c1 16 * without specific prior written permission.
mbed_official 443:d2c15dda23c1 17 *
mbed_official 443:d2c15dda23c1 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 443:d2c15dda23c1 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 443:d2c15dda23c1 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 443:d2c15dda23c1 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 443:d2c15dda23c1 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 443:d2c15dda23c1 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 443:d2c15dda23c1 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 443:d2c15dda23c1 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 443:d2c15dda23c1 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 443:d2c15dda23c1 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 443:d2c15dda23c1 28 *******************************************************************************
mbed_official 443:d2c15dda23c1 29 */
mbed_official 443:d2c15dda23c1 30 #include <stddef.h>
mbed_official 443:d2c15dda23c1 31 #include "cmsis.h"
mbed_official 443:d2c15dda23c1 32 #include "gpio_irq_api.h"
mbed_official 443:d2c15dda23c1 33 #include "pinmap.h"
mbed_official 443:d2c15dda23c1 34 #include "mbed_error.h"
mbed_official 443:d2c15dda23c1 35
mbed_official 443:d2c15dda23c1 36 #define EDGE_NONE (0)
mbed_official 443:d2c15dda23c1 37 #define EDGE_RISE (1)
mbed_official 443:d2c15dda23c1 38 #define EDGE_FALL (2)
mbed_official 443:d2c15dda23c1 39 #define EDGE_BOTH (3)
mbed_official 443:d2c15dda23c1 40
mbed_official 443:d2c15dda23c1 41 // Number of EXTI irq vectors (EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5_9, EXTI10_15)
mbed_official 443:d2c15dda23c1 42 #define CHANNEL_NUM (7)
mbed_official 443:d2c15dda23c1 43
mbed_official 443:d2c15dda23c1 44 // Max pins for one line (max with EXTI10_15)
mbed_official 443:d2c15dda23c1 45 #define MAX_PIN_LINE (6)
mbed_official 443:d2c15dda23c1 46
mbed_official 443:d2c15dda23c1 47 typedef struct gpio_channel {
mbed_official 443:d2c15dda23c1 48 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
mbed_official 443:d2c15dda23c1 49 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
mbed_official 443:d2c15dda23c1 50 uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
mbed_official 443:d2c15dda23c1 51 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
mbed_official 443:d2c15dda23c1 52 } gpio_channel_t;
mbed_official 443:d2c15dda23c1 53
mbed_official 443:d2c15dda23c1 54 static gpio_channel_t channels[CHANNEL_NUM] = {
mbed_official 443:d2c15dda23c1 55 {.pin_mask = 0},
mbed_official 443:d2c15dda23c1 56 {.pin_mask = 0},
mbed_official 443:d2c15dda23c1 57 {.pin_mask = 0},
mbed_official 443:d2c15dda23c1 58 {.pin_mask = 0},
mbed_official 443:d2c15dda23c1 59 {.pin_mask = 0},
mbed_official 443:d2c15dda23c1 60 {.pin_mask = 0},
mbed_official 443:d2c15dda23c1 61 {.pin_mask = 0}
mbed_official 443:d2c15dda23c1 62 };
mbed_official 443:d2c15dda23c1 63
mbed_official 443:d2c15dda23c1 64 // Used to return the index for channels array.
mbed_official 443:d2c15dda23c1 65 static uint32_t pin_base_nr[16] = {
mbed_official 443:d2c15dda23c1 66 // EXTI0
mbed_official 443:d2c15dda23c1 67 0, // pin 0
mbed_official 443:d2c15dda23c1 68 // EXTI1
mbed_official 443:d2c15dda23c1 69 0, // pin 1
mbed_official 443:d2c15dda23c1 70 // EXTI2
mbed_official 443:d2c15dda23c1 71 0, // pin 2
mbed_official 443:d2c15dda23c1 72 // EXTI3
mbed_official 443:d2c15dda23c1 73 0, // pin 3
mbed_official 443:d2c15dda23c1 74 // EXTI4
mbed_official 443:d2c15dda23c1 75 0, // pin 4
mbed_official 443:d2c15dda23c1 76 // EXTI5_9
mbed_official 443:d2c15dda23c1 77 0, // pin 5
mbed_official 443:d2c15dda23c1 78 1, // pin 6
mbed_official 443:d2c15dda23c1 79 2, // pin 7
mbed_official 443:d2c15dda23c1 80 3, // pin 8
mbed_official 443:d2c15dda23c1 81 4, // pin 9
mbed_official 443:d2c15dda23c1 82 // EXTI10_15
mbed_official 443:d2c15dda23c1 83 0, // pin 10
mbed_official 443:d2c15dda23c1 84 1, // pin 11
mbed_official 443:d2c15dda23c1 85 2, // pin 12
mbed_official 443:d2c15dda23c1 86 3, // pin 13
mbed_official 443:d2c15dda23c1 87 4, // pin 14
mbed_official 443:d2c15dda23c1 88 5 // pin 15
mbed_official 443:d2c15dda23c1 89 };
mbed_official 443:d2c15dda23c1 90
mbed_official 443:d2c15dda23c1 91 static gpio_irq_handler irq_handler;
mbed_official 443:d2c15dda23c1 92
mbed_official 443:d2c15dda23c1 93 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
mbed_official 443:d2c15dda23c1 94 {
mbed_official 443:d2c15dda23c1 95 gpio_channel_t *gpio_channel = &channels[irq_index];
mbed_official 443:d2c15dda23c1 96 uint32_t gpio_idx;
mbed_official 443:d2c15dda23c1 97
mbed_official 443:d2c15dda23c1 98 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
mbed_official 443:d2c15dda23c1 99 uint32_t current_mask = (1 << gpio_idx);
mbed_official 443:d2c15dda23c1 100
mbed_official 443:d2c15dda23c1 101 if (gpio_channel->pin_mask & current_mask) {
mbed_official 443:d2c15dda23c1 102 // Retrieve the gpio and pin that generate the irq
mbed_official 443:d2c15dda23c1 103 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
mbed_official 443:d2c15dda23c1 104 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
mbed_official 443:d2c15dda23c1 105
mbed_official 443:d2c15dda23c1 106 // Clear interrupt flag
mbed_official 443:d2c15dda23c1 107 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
mbed_official 443:d2c15dda23c1 108 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
mbed_official 443:d2c15dda23c1 109
mbed_official 443:d2c15dda23c1 110 if (gpio_channel->channel_ids[gpio_idx] == 0) continue;
mbed_official 443:d2c15dda23c1 111
mbed_official 443:d2c15dda23c1 112 // Check which edge has generated the irq
mbed_official 443:d2c15dda23c1 113 if ((gpio->IDR & pin) == 0) {
mbed_official 443:d2c15dda23c1 114 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
mbed_official 443:d2c15dda23c1 115 } else {
mbed_official 443:d2c15dda23c1 116 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
mbed_official 443:d2c15dda23c1 117 }
mbed_official 443:d2c15dda23c1 118 }
mbed_official 443:d2c15dda23c1 119 }
mbed_official 443:d2c15dda23c1 120 }
mbed_official 443:d2c15dda23c1 121 }
mbed_official 443:d2c15dda23c1 122
mbed_official 443:d2c15dda23c1 123 // EXTI line 0
mbed_official 443:d2c15dda23c1 124 static void gpio_irq0(void)
mbed_official 443:d2c15dda23c1 125 {
mbed_official 443:d2c15dda23c1 126 handle_interrupt_in(0, 1);
mbed_official 443:d2c15dda23c1 127 }
mbed_official 443:d2c15dda23c1 128
mbed_official 443:d2c15dda23c1 129 // EXTI line 1
mbed_official 443:d2c15dda23c1 130 static void gpio_irq1(void)
mbed_official 443:d2c15dda23c1 131 {
mbed_official 443:d2c15dda23c1 132 handle_interrupt_in(1, 1);
mbed_official 443:d2c15dda23c1 133 }
mbed_official 443:d2c15dda23c1 134
mbed_official 443:d2c15dda23c1 135 // EXTI line 2
mbed_official 443:d2c15dda23c1 136 static void gpio_irq2(void)
mbed_official 443:d2c15dda23c1 137 {
mbed_official 443:d2c15dda23c1 138 handle_interrupt_in(2, 1);
mbed_official 443:d2c15dda23c1 139 }
mbed_official 443:d2c15dda23c1 140
mbed_official 443:d2c15dda23c1 141 // EXTI line 3
mbed_official 443:d2c15dda23c1 142 static void gpio_irq3(void)
mbed_official 443:d2c15dda23c1 143 {
mbed_official 443:d2c15dda23c1 144 handle_interrupt_in(3, 1);
mbed_official 443:d2c15dda23c1 145 }
mbed_official 443:d2c15dda23c1 146
mbed_official 443:d2c15dda23c1 147 // EXTI line 4
mbed_official 443:d2c15dda23c1 148 static void gpio_irq4(void)
mbed_official 443:d2c15dda23c1 149 {
mbed_official 443:d2c15dda23c1 150 handle_interrupt_in(4, 1);
mbed_official 443:d2c15dda23c1 151 }
mbed_official 443:d2c15dda23c1 152
mbed_official 443:d2c15dda23c1 153 // EXTI lines 5 to 9
mbed_official 443:d2c15dda23c1 154 static void gpio_irq5(void)
mbed_official 443:d2c15dda23c1 155 {
mbed_official 443:d2c15dda23c1 156 handle_interrupt_in(5, 5);
mbed_official 443:d2c15dda23c1 157 }
mbed_official 443:d2c15dda23c1 158
mbed_official 443:d2c15dda23c1 159 // EXTI lines 10 to 15
mbed_official 443:d2c15dda23c1 160 static void gpio_irq6(void)
mbed_official 443:d2c15dda23c1 161 {
mbed_official 443:d2c15dda23c1 162 handle_interrupt_in(6, 6);
mbed_official 443:d2c15dda23c1 163 }
mbed_official 443:d2c15dda23c1 164
mbed_official 443:d2c15dda23c1 165 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
mbed_official 443:d2c15dda23c1 166
mbed_official 443:d2c15dda23c1 167 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
mbed_official 443:d2c15dda23c1 168 {
mbed_official 443:d2c15dda23c1 169 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 443:d2c15dda23c1 170 uint32_t vector = 0;
mbed_official 443:d2c15dda23c1 171 uint32_t irq_index;
mbed_official 443:d2c15dda23c1 172 gpio_channel_t *gpio_channel;
mbed_official 443:d2c15dda23c1 173 uint32_t gpio_idx;
mbed_official 443:d2c15dda23c1 174
mbed_official 443:d2c15dda23c1 175 if (pin == NC) return -1;
mbed_official 443:d2c15dda23c1 176
mbed_official 443:d2c15dda23c1 177 uint32_t port_index = STM_PORT(pin);
mbed_official 443:d2c15dda23c1 178 uint32_t pin_index = STM_PIN(pin);
mbed_official 443:d2c15dda23c1 179
mbed_official 443:d2c15dda23c1 180 // Select irq number and interrupt routine
mbed_official 443:d2c15dda23c1 181 switch (pin_index) {
mbed_official 443:d2c15dda23c1 182 case 0:
mbed_official 443:d2c15dda23c1 183 irq_n = EXTI0_IRQn;
mbed_official 443:d2c15dda23c1 184 vector = (uint32_t)&gpio_irq0;
mbed_official 443:d2c15dda23c1 185 irq_index = 0;
mbed_official 443:d2c15dda23c1 186 break;
mbed_official 443:d2c15dda23c1 187 case 1:
mbed_official 443:d2c15dda23c1 188 irq_n = EXTI1_IRQn;
mbed_official 443:d2c15dda23c1 189 vector = (uint32_t)&gpio_irq1;
mbed_official 443:d2c15dda23c1 190 irq_index = 1;
mbed_official 443:d2c15dda23c1 191 break;
mbed_official 443:d2c15dda23c1 192 case 2:
mbed_official 443:d2c15dda23c1 193 irq_n = EXTI2_IRQn;
mbed_official 443:d2c15dda23c1 194 vector = (uint32_t)&gpio_irq2;
mbed_official 443:d2c15dda23c1 195 irq_index = 2;
mbed_official 443:d2c15dda23c1 196 break;
mbed_official 443:d2c15dda23c1 197 case 3:
mbed_official 443:d2c15dda23c1 198 irq_n = EXTI3_IRQn;
mbed_official 443:d2c15dda23c1 199 vector = (uint32_t)&gpio_irq3;
mbed_official 443:d2c15dda23c1 200 irq_index = 3;
mbed_official 443:d2c15dda23c1 201 break;
mbed_official 443:d2c15dda23c1 202 case 4:
mbed_official 443:d2c15dda23c1 203 irq_n = EXTI4_IRQn;
mbed_official 443:d2c15dda23c1 204 vector = (uint32_t)&gpio_irq4;
mbed_official 443:d2c15dda23c1 205 irq_index = 4;
mbed_official 443:d2c15dda23c1 206 break;
mbed_official 443:d2c15dda23c1 207 case 5:
mbed_official 443:d2c15dda23c1 208 case 6:
mbed_official 443:d2c15dda23c1 209 case 7:
mbed_official 443:d2c15dda23c1 210 case 8:
mbed_official 443:d2c15dda23c1 211 case 9:
mbed_official 443:d2c15dda23c1 212 irq_n = EXTI9_5_IRQn;
mbed_official 443:d2c15dda23c1 213 vector = (uint32_t)&gpio_irq5;
mbed_official 443:d2c15dda23c1 214 irq_index = 5;
mbed_official 443:d2c15dda23c1 215 break;
mbed_official 443:d2c15dda23c1 216 case 10:
mbed_official 443:d2c15dda23c1 217 case 11:
mbed_official 443:d2c15dda23c1 218 case 12:
mbed_official 443:d2c15dda23c1 219 case 13:
mbed_official 443:d2c15dda23c1 220 case 14:
mbed_official 443:d2c15dda23c1 221 case 15:
mbed_official 443:d2c15dda23c1 222 irq_n = EXTI15_10_IRQn;
mbed_official 443:d2c15dda23c1 223 vector = (uint32_t)&gpio_irq6;
mbed_official 443:d2c15dda23c1 224 irq_index = 6;
mbed_official 443:d2c15dda23c1 225 break;
mbed_official 443:d2c15dda23c1 226 default:
mbed_official 443:d2c15dda23c1 227 error("InterruptIn error: pin not supported.\n");
mbed_official 443:d2c15dda23c1 228 return -1;
mbed_official 443:d2c15dda23c1 229 }
mbed_official 443:d2c15dda23c1 230
mbed_official 443:d2c15dda23c1 231 // Enable GPIO clock
mbed_official 443:d2c15dda23c1 232 uint32_t gpio_add = Set_GPIO_Clock(port_index);
mbed_official 443:d2c15dda23c1 233
mbed_official 443:d2c15dda23c1 234 // Configure GPIO
mbed_official 443:d2c15dda23c1 235 pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0));
mbed_official 443:d2c15dda23c1 236
mbed_official 443:d2c15dda23c1 237 // Enable EXTI interrupt
mbed_official 443:d2c15dda23c1 238 NVIC_SetVector(irq_n, vector);
mbed_official 443:d2c15dda23c1 239 NVIC_EnableIRQ(irq_n);
mbed_official 443:d2c15dda23c1 240
mbed_official 443:d2c15dda23c1 241 // Save informations for future use
mbed_official 443:d2c15dda23c1 242 obj->irq_n = irq_n;
mbed_official 443:d2c15dda23c1 243 obj->irq_index = irq_index;
mbed_official 443:d2c15dda23c1 244 obj->event = EDGE_NONE;
mbed_official 443:d2c15dda23c1 245 obj->pin = pin;
mbed_official 443:d2c15dda23c1 246
mbed_official 443:d2c15dda23c1 247 gpio_channel = &channels[irq_index];
mbed_official 443:d2c15dda23c1 248 gpio_idx = pin_base_nr[pin_index];
mbed_official 443:d2c15dda23c1 249 gpio_channel->pin_mask |= (1 << gpio_idx);
mbed_official 443:d2c15dda23c1 250 gpio_channel->channel_ids[gpio_idx] = id;
mbed_official 443:d2c15dda23c1 251 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
mbed_official 443:d2c15dda23c1 252 gpio_channel->channel_pin[gpio_idx] = pin_index;
mbed_official 443:d2c15dda23c1 253
mbed_official 443:d2c15dda23c1 254 irq_handler = handler;
mbed_official 443:d2c15dda23c1 255
mbed_official 443:d2c15dda23c1 256 return 0;
mbed_official 443:d2c15dda23c1 257 }
mbed_official 443:d2c15dda23c1 258
mbed_official 443:d2c15dda23c1 259 void gpio_irq_free(gpio_irq_t *obj)
mbed_official 443:d2c15dda23c1 260 {
mbed_official 443:d2c15dda23c1 261 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
mbed_official 443:d2c15dda23c1 262 uint32_t pin_index = STM_PIN(obj->pin);
mbed_official 443:d2c15dda23c1 263 uint32_t gpio_idx = pin_base_nr[pin_index];
mbed_official 443:d2c15dda23c1 264
mbed_official 443:d2c15dda23c1 265 gpio_channel->pin_mask &= ~(1 << gpio_idx);
mbed_official 443:d2c15dda23c1 266 gpio_channel->channel_ids[gpio_idx] = 0;
mbed_official 443:d2c15dda23c1 267 gpio_channel->channel_gpio[gpio_idx] = 0;
mbed_official 443:d2c15dda23c1 268 gpio_channel->channel_pin[gpio_idx] = 0;
mbed_official 443:d2c15dda23c1 269
mbed_official 443:d2c15dda23c1 270 // Disable EXTI line
mbed_official 443:d2c15dda23c1 271 pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
mbed_official 443:d2c15dda23c1 272 obj->event = EDGE_NONE;
mbed_official 443:d2c15dda23c1 273 }
mbed_official 443:d2c15dda23c1 274
mbed_official 443:d2c15dda23c1 275 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
mbed_official 443:d2c15dda23c1 276 {
mbed_official 443:d2c15dda23c1 277 uint32_t mode = STM_MODE_IT_EVT_RESET;
mbed_official 443:d2c15dda23c1 278 uint32_t pull = GPIO_NOPULL;
mbed_official 443:d2c15dda23c1 279
mbed_official 443:d2c15dda23c1 280 if (enable) {
mbed_official 443:d2c15dda23c1 281 if (event == IRQ_RISE) {
mbed_official 443:d2c15dda23c1 282 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
mbed_official 443:d2c15dda23c1 283 mode = STM_MODE_IT_RISING_FALLING;
mbed_official 443:d2c15dda23c1 284 obj->event = EDGE_BOTH;
mbed_official 443:d2c15dda23c1 285 } else { // NONE or RISE
mbed_official 443:d2c15dda23c1 286 mode = STM_MODE_IT_RISING;
mbed_official 443:d2c15dda23c1 287 obj->event = EDGE_RISE;
mbed_official 443:d2c15dda23c1 288 }
mbed_official 443:d2c15dda23c1 289 }
mbed_official 443:d2c15dda23c1 290 if (event == IRQ_FALL) {
mbed_official 443:d2c15dda23c1 291 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
mbed_official 443:d2c15dda23c1 292 mode = STM_MODE_IT_RISING_FALLING;
mbed_official 443:d2c15dda23c1 293 obj->event = EDGE_BOTH;
mbed_official 443:d2c15dda23c1 294 } else { // NONE or FALL
mbed_official 443:d2c15dda23c1 295 mode = STM_MODE_IT_FALLING;
mbed_official 443:d2c15dda23c1 296 obj->event = EDGE_FALL;
mbed_official 443:d2c15dda23c1 297 }
mbed_official 443:d2c15dda23c1 298 }
mbed_official 443:d2c15dda23c1 299 } else { // Disable
mbed_official 443:d2c15dda23c1 300 if (event == IRQ_RISE) {
mbed_official 443:d2c15dda23c1 301 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
mbed_official 443:d2c15dda23c1 302 mode = STM_MODE_IT_FALLING;
mbed_official 443:d2c15dda23c1 303 obj->event = EDGE_FALL;
mbed_official 443:d2c15dda23c1 304 } else { // NONE or RISE
mbed_official 443:d2c15dda23c1 305 mode = STM_MODE_IT_EVT_RESET;
mbed_official 443:d2c15dda23c1 306 obj->event = EDGE_NONE;
mbed_official 443:d2c15dda23c1 307 }
mbed_official 443:d2c15dda23c1 308 }
mbed_official 443:d2c15dda23c1 309 if (event == IRQ_FALL) {
mbed_official 443:d2c15dda23c1 310 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
mbed_official 443:d2c15dda23c1 311 mode = STM_MODE_IT_RISING;
mbed_official 443:d2c15dda23c1 312 obj->event = EDGE_RISE;
mbed_official 443:d2c15dda23c1 313 } else { // NONE or FALL
mbed_official 443:d2c15dda23c1 314 mode = STM_MODE_IT_EVT_RESET;
mbed_official 443:d2c15dda23c1 315 obj->event = EDGE_NONE;
mbed_official 443:d2c15dda23c1 316 }
mbed_official 443:d2c15dda23c1 317 }
mbed_official 443:d2c15dda23c1 318 }
mbed_official 443:d2c15dda23c1 319
mbed_official 443:d2c15dda23c1 320 pin_function(obj->pin, STM_PIN_DATA(mode, pull, 0));
mbed_official 443:d2c15dda23c1 321 }
mbed_official 443:d2c15dda23c1 322
mbed_official 443:d2c15dda23c1 323 void gpio_irq_enable(gpio_irq_t *obj)
mbed_official 443:d2c15dda23c1 324 {
mbed_official 443:d2c15dda23c1 325 NVIC_EnableIRQ(obj->irq_n);
mbed_official 443:d2c15dda23c1 326 }
mbed_official 443:d2c15dda23c1 327
mbed_official 443:d2c15dda23c1 328 void gpio_irq_disable(gpio_irq_t *obj)
mbed_official 443:d2c15dda23c1 329 {
mbed_official 443:d2c15dda23c1 330 NVIC_DisableIRQ(obj->irq_n);
mbed_official 443:d2c15dda23c1 331 obj->event = EDGE_NONE;
mbed_official 443:d2c15dda23c1 332 }