Renesas / mbed-src_GR-PEACH_rev_b

mbed library sources for GR-PEACH rev.B.

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11U6X/spi_api.c@174:8bb9f3a33240, 2014-04-29 (annotated)

Committer:
mbed_official
Date:
Tue Apr 29 11:15:07 2014 +0100
Revision:
174:8bb9f3a33240
Child:
227:7bd0639b8911
Synchronized with git revision 5bf985ebc651a2c31cefabd9d62c51dc465ef60a



Full URL: https://github.com/mbedmicro/mbed/commit/5bf985ebc651a2c31cefabd9d62c51dc465ef60a/



[NUCLEO_L152RE/F103RB] Add LSE configuration for RTC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 174:8bb9f3a33240 1 /* mbed Microcontroller Library
mbed_official 174:8bb9f3a33240 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 174:8bb9f3a33240 3 *
mbed_official 174:8bb9f3a33240 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 174:8bb9f3a33240 5 * you may not use this file except in compliance with the License.
mbed_official 174:8bb9f3a33240 6 * You may obtain a copy of the License at
mbed_official 174:8bb9f3a33240 7 *
mbed_official 174:8bb9f3a33240 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 174:8bb9f3a33240 9 *
mbed_official 174:8bb9f3a33240 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 174:8bb9f3a33240 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 174:8bb9f3a33240 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 174:8bb9f3a33240 13 * See the License for the specific language governing permissions and
mbed_official 174:8bb9f3a33240 14 * limitations under the License.
mbed_official 174:8bb9f3a33240 15 */
mbed_official 174:8bb9f3a33240 16 #include <math.h>
mbed_official 174:8bb9f3a33240 17
mbed_official 174:8bb9f3a33240 18 #include "spi_api.h"
mbed_official 174:8bb9f3a33240 19 #include "cmsis.h"
mbed_official 174:8bb9f3a33240 20 #include "pinmap.h"
mbed_official 174:8bb9f3a33240 21 #include "error.h"
mbed_official 174:8bb9f3a33240 22
mbed_official 174:8bb9f3a33240 23 #if DEVICE_SPI
mbed_official 174:8bb9f3a33240 24
mbed_official 174:8bb9f3a33240 25 static const PinMap PinMap_SPI_SCLK[] = {
mbed_official 174:8bb9f3a33240 26 {P0_6 , SPI_0, 0x02},
mbed_official 174:8bb9f3a33240 27 {P1_29, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 28 {P2_7 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 29 {P1_20, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 30 {P1_27, SPI_1, 0x04},
mbed_official 174:8bb9f3a33240 31 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 32 };
mbed_official 174:8bb9f3a33240 33
mbed_official 174:8bb9f3a33240 34 static const PinMap PinMap_SPI_MOSI[] = {
mbed_official 174:8bb9f3a33240 35 {P0_9 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 36 {P1_12, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 37 {P0_21, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 38 {P1_22, SPI_1, 0x01},
mbed_official 174:8bb9f3a33240 39 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 40 };
mbed_official 174:8bb9f3a33240 41
mbed_official 174:8bb9f3a33240 42 static const PinMap PinMap_SPI_MISO[] = {
mbed_official 174:8bb9f3a33240 43 {P0_8 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 44 {P1_16, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 45 {P0_22, SPI_1, 0x03},
mbed_official 174:8bb9f3a33240 46 {P1_21, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 47 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 48 };
mbed_official 174:8bb9f3a33240 49
mbed_official 174:8bb9f3a33240 50 static const PinMap PinMap_SPI_SSEL[] = {
mbed_official 174:8bb9f3a33240 51 {P0_2 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 52 {P1_15, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 53 {P0_23, SPI_1, 0x04},
mbed_official 174:8bb9f3a33240 54 {P1_23, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 55 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 56 };
mbed_official 174:8bb9f3a33240 57
mbed_official 174:8bb9f3a33240 58 static inline int ssp_disable(spi_t *obj);
mbed_official 174:8bb9f3a33240 59 static inline int ssp_enable(spi_t *obj);
mbed_official 174:8bb9f3a33240 60
mbed_official 174:8bb9f3a33240 61 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
mbed_official 174:8bb9f3a33240 62 // determine the SPI to use
mbed_official 174:8bb9f3a33240 63 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
mbed_official 174:8bb9f3a33240 64 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
mbed_official 174:8bb9f3a33240 65 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
mbed_official 174:8bb9f3a33240 66 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
mbed_official 174:8bb9f3a33240 67 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
mbed_official 174:8bb9f3a33240 68 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
mbed_official 174:8bb9f3a33240 69
mbed_official 174:8bb9f3a33240 70 obj->spi = (LPC_SSP0_Type*)pinmap_merge(spi_data, spi_cntl);
mbed_official 174:8bb9f3a33240 71
mbed_official 174:8bb9f3a33240 72 if ((int)obj->spi == NC) {
mbed_official 174:8bb9f3a33240 73 error("SPI pinout mapping failed");
mbed_official 174:8bb9f3a33240 74 }
mbed_official 174:8bb9f3a33240 75
mbed_official 174:8bb9f3a33240 76 // enable power and clocking
mbed_official 174:8bb9f3a33240 77 switch ((int)obj->spi) {
mbed_official 174:8bb9f3a33240 78 case SPI_0:
mbed_official 174:8bb9f3a33240 79 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
mbed_official 174:8bb9f3a33240 80 LPC_SYSCON->SSP0CLKDIV = 0x01;
mbed_official 174:8bb9f3a33240 81 LPC_SYSCON->PRESETCTRL |= 1 << 0;
mbed_official 174:8bb9f3a33240 82 break;
mbed_official 174:8bb9f3a33240 83 case SPI_1:
mbed_official 174:8bb9f3a33240 84 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
mbed_official 174:8bb9f3a33240 85 LPC_SYSCON->SSP1CLKDIV = 0x01;
mbed_official 174:8bb9f3a33240 86 LPC_SYSCON->PRESETCTRL |= 1 << 2;
mbed_official 174:8bb9f3a33240 87 break;
mbed_official 174:8bb9f3a33240 88 }
mbed_official 174:8bb9f3a33240 89
mbed_official 174:8bb9f3a33240 90 // set default format and frequency
mbed_official 174:8bb9f3a33240 91 if (ssel == NC) {
mbed_official 174:8bb9f3a33240 92 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
mbed_official 174:8bb9f3a33240 93 } else {
mbed_official 174:8bb9f3a33240 94 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
mbed_official 174:8bb9f3a33240 95 }
mbed_official 174:8bb9f3a33240 96 spi_frequency(obj, 1000000);
mbed_official 174:8bb9f3a33240 97
mbed_official 174:8bb9f3a33240 98 // enable the ssp channel
mbed_official 174:8bb9f3a33240 99 ssp_enable(obj);
mbed_official 174:8bb9f3a33240 100
mbed_official 174:8bb9f3a33240 101 // pin out the spi pins
mbed_official 174:8bb9f3a33240 102 pinmap_pinout(mosi, PinMap_SPI_MOSI);
mbed_official 174:8bb9f3a33240 103 pinmap_pinout(miso, PinMap_SPI_MISO);
mbed_official 174:8bb9f3a33240 104 pinmap_pinout(sclk, PinMap_SPI_SCLK);
mbed_official 174:8bb9f3a33240 105 if (ssel != NC) {
mbed_official 174:8bb9f3a33240 106 pinmap_pinout(ssel, PinMap_SPI_SSEL);
mbed_official 174:8bb9f3a33240 107 }
mbed_official 174:8bb9f3a33240 108 }
mbed_official 174:8bb9f3a33240 109
mbed_official 174:8bb9f3a33240 110 void spi_free(spi_t *obj) {}
mbed_official 174:8bb9f3a33240 111
mbed_official 174:8bb9f3a33240 112 void spi_format(spi_t *obj, int bits, int mode, int slave) {
mbed_official 174:8bb9f3a33240 113 ssp_disable(obj);
mbed_official 174:8bb9f3a33240 114
mbed_official 174:8bb9f3a33240 115 if (!(bits >= 4 && bits <= 16) || !(mode >= 0 && mode <= 3)) {
mbed_official 174:8bb9f3a33240 116 error("SPI format error");
mbed_official 174:8bb9f3a33240 117 }
mbed_official 174:8bb9f3a33240 118
mbed_official 174:8bb9f3a33240 119 int polarity = (mode & 0x2) ? 1 : 0;
mbed_official 174:8bb9f3a33240 120 int phase = (mode & 0x1) ? 1 : 0;
mbed_official 174:8bb9f3a33240 121
mbed_official 174:8bb9f3a33240 122 // set it up
mbed_official 174:8bb9f3a33240 123 int DSS = bits - 1; // DSS (data select size)
mbed_official 174:8bb9f3a33240 124 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
mbed_official 174:8bb9f3a33240 125 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
mbed_official 174:8bb9f3a33240 126
mbed_official 174:8bb9f3a33240 127 int FRF = 0; // FRF (frame format) = SPI
mbed_official 174:8bb9f3a33240 128 uint32_t tmp = obj->spi->CR0;
mbed_official 174:8bb9f3a33240 129 tmp &= ~(0xFFFF);
mbed_official 174:8bb9f3a33240 130 tmp |= DSS << 0
mbed_official 174:8bb9f3a33240 131 | FRF << 4
mbed_official 174:8bb9f3a33240 132 | SPO << 6
mbed_official 174:8bb9f3a33240 133 | SPH << 7;
mbed_official 174:8bb9f3a33240 134 obj->spi->CR0 = tmp;
mbed_official 174:8bb9f3a33240 135
mbed_official 174:8bb9f3a33240 136 tmp = obj->spi->CR1;
mbed_official 174:8bb9f3a33240 137 tmp &= ~(0xD);
mbed_official 174:8bb9f3a33240 138 tmp |= 0 << 0 // LBM - loop back mode - off
mbed_official 174:8bb9f3a33240 139 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
mbed_official 174:8bb9f3a33240 140 | 0 << 3; // SOD - slave output disable - na
mbed_official 174:8bb9f3a33240 141 obj->spi->CR1 = tmp;
mbed_official 174:8bb9f3a33240 142
mbed_official 174:8bb9f3a33240 143 ssp_enable(obj);
mbed_official 174:8bb9f3a33240 144 }
mbed_official 174:8bb9f3a33240 145
mbed_official 174:8bb9f3a33240 146 void spi_frequency(spi_t *obj, int hz) {
mbed_official 174:8bb9f3a33240 147 ssp_disable(obj);
mbed_official 174:8bb9f3a33240 148
mbed_official 174:8bb9f3a33240 149 uint32_t PCLK = SystemCoreClock;
mbed_official 174:8bb9f3a33240 150
mbed_official 174:8bb9f3a33240 151 int prescaler;
mbed_official 174:8bb9f3a33240 152
mbed_official 174:8bb9f3a33240 153 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
mbed_official 174:8bb9f3a33240 154 int prescale_hz = PCLK / prescaler;
mbed_official 174:8bb9f3a33240 155
mbed_official 174:8bb9f3a33240 156 // calculate the divider
mbed_official 174:8bb9f3a33240 157 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
mbed_official 174:8bb9f3a33240 158
mbed_official 174:8bb9f3a33240 159 // check we can support the divider
mbed_official 174:8bb9f3a33240 160 if (divider < 256) {
mbed_official 174:8bb9f3a33240 161 // prescaler
mbed_official 174:8bb9f3a33240 162 obj->spi->CPSR = prescaler;
mbed_official 174:8bb9f3a33240 163
mbed_official 174:8bb9f3a33240 164 // divider
mbed_official 174:8bb9f3a33240 165 obj->spi->CR0 &= ~(0xFFFF << 8);
mbed_official 174:8bb9f3a33240 166 obj->spi->CR0 |= (divider - 1) << 8;
mbed_official 174:8bb9f3a33240 167 ssp_enable(obj);
mbed_official 174:8bb9f3a33240 168 return;
mbed_official 174:8bb9f3a33240 169 }
mbed_official 174:8bb9f3a33240 170 }
mbed_official 174:8bb9f3a33240 171 error("Couldn't setup requested SPI frequency");
mbed_official 174:8bb9f3a33240 172 }
mbed_official 174:8bb9f3a33240 173
mbed_official 174:8bb9f3a33240 174 static inline int ssp_disable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 175 return obj->spi->CR1 &= ~(1 << 1);
mbed_official 174:8bb9f3a33240 176 }
mbed_official 174:8bb9f3a33240 177
mbed_official 174:8bb9f3a33240 178 static inline int ssp_enable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 179 return obj->spi->CR1 |= (1 << 1);
mbed_official 174:8bb9f3a33240 180 }
mbed_official 174:8bb9f3a33240 181
mbed_official 174:8bb9f3a33240 182 static inline int ssp_readable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 183 return obj->spi->SR & (1 << 2);
mbed_official 174:8bb9f3a33240 184 }
mbed_official 174:8bb9f3a33240 185
mbed_official 174:8bb9f3a33240 186 static inline int ssp_writeable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 187 return obj->spi->SR & (1 << 1);
mbed_official 174:8bb9f3a33240 188 }
mbed_official 174:8bb9f3a33240 189
mbed_official 174:8bb9f3a33240 190 static inline void ssp_write(spi_t *obj, int value) {
mbed_official 174:8bb9f3a33240 191 while (!ssp_writeable(obj));
mbed_official 174:8bb9f3a33240 192 obj->spi->DR = value;
mbed_official 174:8bb9f3a33240 193 }
mbed_official 174:8bb9f3a33240 194
mbed_official 174:8bb9f3a33240 195 static inline int ssp_read(spi_t *obj) {
mbed_official 174:8bb9f3a33240 196 while (!ssp_readable(obj));
mbed_official 174:8bb9f3a33240 197 return obj->spi->DR;
mbed_official 174:8bb9f3a33240 198 }
mbed_official 174:8bb9f3a33240 199
mbed_official 174:8bb9f3a33240 200 static inline int ssp_busy(spi_t *obj) {
mbed_official 174:8bb9f3a33240 201 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
mbed_official 174:8bb9f3a33240 202 }
mbed_official 174:8bb9f3a33240 203
mbed_official 174:8bb9f3a33240 204 int spi_master_write(spi_t *obj, int value) {
mbed_official 174:8bb9f3a33240 205 ssp_write(obj, value);
mbed_official 174:8bb9f3a33240 206 return ssp_read(obj);
mbed_official 174:8bb9f3a33240 207 }
mbed_official 174:8bb9f3a33240 208
mbed_official 174:8bb9f3a33240 209 int spi_slave_receive(spi_t *obj) {
mbed_official 174:8bb9f3a33240 210 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
mbed_official 174:8bb9f3a33240 211 }
mbed_official 174:8bb9f3a33240 212
mbed_official 174:8bb9f3a33240 213 int spi_slave_read(spi_t *obj) {
mbed_official 174:8bb9f3a33240 214 return obj->spi->DR;
mbed_official 174:8bb9f3a33240 215 }
mbed_official 174:8bb9f3a33240 216
mbed_official 174:8bb9f3a33240 217 void spi_slave_write(spi_t *obj, int value) {
mbed_official 174:8bb9f3a33240 218 while (ssp_writeable(obj) == 0) ;
mbed_official 174:8bb9f3a33240 219 obj->spi->DR = value;
mbed_official 174:8bb9f3a33240 220 }
mbed_official 174:8bb9f3a33240 221
mbed_official 174:8bb9f3a33240 222 int spi_busy(spi_t *obj) {
mbed_official 174:8bb9f3a33240 223 return ssp_busy(obj);
mbed_official 174:8bb9f3a33240 224 }
mbed_official 174:8bb9f3a33240 225
mbed_official 174:8bb9f3a33240 226 #endif