Renesas / mbed-src_GR-PEACH_rev_b

mbed library sources for GR-PEACH rev.B.

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11U6X/spi_api.c@227:7bd0639b8911, 2014-06-11 (annotated)

Committer:
mbed_official
Date:
Wed Jun 11 16:00:09 2014 +0100
Revision:
227:7bd0639b8911
Parent:
174:8bb9f3a33240
Child:
250:a49055e7a707
Synchronized with git revision d58d532ebc0e0a96f4fffb8edefc082b71b964af



Full URL: https://github.com/mbedmicro/mbed/commit/d58d532ebc0e0a96f4fffb8edefc082b71b964af/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 174:8bb9f3a33240 1 /* mbed Microcontroller Library
mbed_official 174:8bb9f3a33240 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 174:8bb9f3a33240 3 *
mbed_official 174:8bb9f3a33240 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 174:8bb9f3a33240 5 * you may not use this file except in compliance with the License.
mbed_official 174:8bb9f3a33240 6 * You may obtain a copy of the License at
mbed_official 174:8bb9f3a33240 7 *
mbed_official 174:8bb9f3a33240 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 174:8bb9f3a33240 9 *
mbed_official 174:8bb9f3a33240 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 174:8bb9f3a33240 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 174:8bb9f3a33240 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 174:8bb9f3a33240 13 * See the License for the specific language governing permissions and
mbed_official 174:8bb9f3a33240 14 * limitations under the License.
mbed_official 174:8bb9f3a33240 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
mbed_official 174:8bb9f3a33240 17 #include <math.h>
mbed_official 174:8bb9f3a33240 18
mbed_official 174:8bb9f3a33240 19 #include "spi_api.h"
mbed_official 174:8bb9f3a33240 20 #include "cmsis.h"
mbed_official 174:8bb9f3a33240 21 #include "pinmap.h"
mbed_official 174:8bb9f3a33240 22 #include "error.h"
mbed_official 174:8bb9f3a33240 23
mbed_official 174:8bb9f3a33240 24 #if DEVICE_SPI
mbed_official 174:8bb9f3a33240 25
mbed_official 174:8bb9f3a33240 26 static const PinMap PinMap_SPI_SCLK[] = {
mbed_official 174:8bb9f3a33240 27 {P0_6 , SPI_0, 0x02},
mbed_official 174:8bb9f3a33240 28 {P1_29, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 29 {P2_7 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 30 {P1_20, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 31 {P1_27, SPI_1, 0x04},
mbed_official 174:8bb9f3a33240 32 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 33 };
mbed_official 174:8bb9f3a33240 34
mbed_official 174:8bb9f3a33240 35 static const PinMap PinMap_SPI_MOSI[] = {
mbed_official 174:8bb9f3a33240 36 {P0_9 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 37 {P1_12, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 38 {P0_21, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 39 {P1_22, SPI_1, 0x01},
mbed_official 174:8bb9f3a33240 40 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 41 };
mbed_official 174:8bb9f3a33240 42
mbed_official 174:8bb9f3a33240 43 static const PinMap PinMap_SPI_MISO[] = {
mbed_official 174:8bb9f3a33240 44 {P0_8 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 45 {P1_16, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 46 {P0_22, SPI_1, 0x03},
mbed_official 174:8bb9f3a33240 47 {P1_21, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 48 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 49 };
mbed_official 174:8bb9f3a33240 50
mbed_official 174:8bb9f3a33240 51 static const PinMap PinMap_SPI_SSEL[] = {
mbed_official 174:8bb9f3a33240 52 {P0_2 , SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 53 {P1_15, SPI_0, 0x01},
mbed_official 174:8bb9f3a33240 54 {P0_23, SPI_1, 0x04},
mbed_official 174:8bb9f3a33240 55 {P1_23, SPI_1, 0x02},
mbed_official 174:8bb9f3a33240 56 {NC , NC , 0}
mbed_official 174:8bb9f3a33240 57 };
mbed_official 174:8bb9f3a33240 58
mbed_official 174:8bb9f3a33240 59 static inline int ssp_disable(spi_t *obj);
mbed_official 174:8bb9f3a33240 60 static inline int ssp_enable(spi_t *obj);
mbed_official 174:8bb9f3a33240 61
mbed_official 174:8bb9f3a33240 62 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
mbed_official 174:8bb9f3a33240 63 // determine the SPI to use
mbed_official 174:8bb9f3a33240 64 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
mbed_official 174:8bb9f3a33240 65 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
mbed_official 174:8bb9f3a33240 66 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
mbed_official 174:8bb9f3a33240 67 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
mbed_official 174:8bb9f3a33240 68 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
mbed_official 174:8bb9f3a33240 69 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
mbed_official 174:8bb9f3a33240 70
mbed_official 174:8bb9f3a33240 71 obj->spi = (LPC_SSP0_Type*)pinmap_merge(spi_data, spi_cntl);
mbed_official 227:7bd0639b8911 72 MBED_ASSERT((int)obj->spi != NC);
mbed_official 174:8bb9f3a33240 73
mbed_official 174:8bb9f3a33240 74 // enable power and clocking
mbed_official 174:8bb9f3a33240 75 switch ((int)obj->spi) {
mbed_official 174:8bb9f3a33240 76 case SPI_0:
mbed_official 174:8bb9f3a33240 77 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
mbed_official 174:8bb9f3a33240 78 LPC_SYSCON->SSP0CLKDIV = 0x01;
mbed_official 174:8bb9f3a33240 79 LPC_SYSCON->PRESETCTRL |= 1 << 0;
mbed_official 174:8bb9f3a33240 80 break;
mbed_official 174:8bb9f3a33240 81 case SPI_1:
mbed_official 174:8bb9f3a33240 82 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
mbed_official 174:8bb9f3a33240 83 LPC_SYSCON->SSP1CLKDIV = 0x01;
mbed_official 174:8bb9f3a33240 84 LPC_SYSCON->PRESETCTRL |= 1 << 2;
mbed_official 174:8bb9f3a33240 85 break;
mbed_official 174:8bb9f3a33240 86 }
mbed_official 174:8bb9f3a33240 87
mbed_official 174:8bb9f3a33240 88 // set default format and frequency
mbed_official 174:8bb9f3a33240 89 if (ssel == NC) {
mbed_official 174:8bb9f3a33240 90 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
mbed_official 174:8bb9f3a33240 91 } else {
mbed_official 174:8bb9f3a33240 92 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
mbed_official 174:8bb9f3a33240 93 }
mbed_official 174:8bb9f3a33240 94 spi_frequency(obj, 1000000);
mbed_official 174:8bb9f3a33240 95
mbed_official 174:8bb9f3a33240 96 // enable the ssp channel
mbed_official 174:8bb9f3a33240 97 ssp_enable(obj);
mbed_official 174:8bb9f3a33240 98
mbed_official 174:8bb9f3a33240 99 // pin out the spi pins
mbed_official 174:8bb9f3a33240 100 pinmap_pinout(mosi, PinMap_SPI_MOSI);
mbed_official 174:8bb9f3a33240 101 pinmap_pinout(miso, PinMap_SPI_MISO);
mbed_official 174:8bb9f3a33240 102 pinmap_pinout(sclk, PinMap_SPI_SCLK);
mbed_official 174:8bb9f3a33240 103 if (ssel != NC) {
mbed_official 174:8bb9f3a33240 104 pinmap_pinout(ssel, PinMap_SPI_SSEL);
mbed_official 174:8bb9f3a33240 105 }
mbed_official 174:8bb9f3a33240 106 }
mbed_official 174:8bb9f3a33240 107
mbed_official 174:8bb9f3a33240 108 void spi_free(spi_t *obj) {}
mbed_official 174:8bb9f3a33240 109
mbed_official 174:8bb9f3a33240 110 void spi_format(spi_t *obj, int bits, int mode, int slave) {
mbed_official 174:8bb9f3a33240 111 ssp_disable(obj);
mbed_official 227:7bd0639b8911 112 MBED_ASSERT(((bits >= 4) && (bits <= 16)) || ((mode >= 0) && (mode <= 3)));
mbed_official 174:8bb9f3a33240 113
mbed_official 174:8bb9f3a33240 114 int polarity = (mode & 0x2) ? 1 : 0;
mbed_official 174:8bb9f3a33240 115 int phase = (mode & 0x1) ? 1 : 0;
mbed_official 174:8bb9f3a33240 116
mbed_official 174:8bb9f3a33240 117 // set it up
mbed_official 174:8bb9f3a33240 118 int DSS = bits - 1; // DSS (data select size)
mbed_official 174:8bb9f3a33240 119 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
mbed_official 174:8bb9f3a33240 120 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
mbed_official 174:8bb9f3a33240 121
mbed_official 174:8bb9f3a33240 122 int FRF = 0; // FRF (frame format) = SPI
mbed_official 174:8bb9f3a33240 123 uint32_t tmp = obj->spi->CR0;
mbed_official 174:8bb9f3a33240 124 tmp &= ~(0xFFFF);
mbed_official 174:8bb9f3a33240 125 tmp |= DSS << 0
mbed_official 174:8bb9f3a33240 126 | FRF << 4
mbed_official 174:8bb9f3a33240 127 | SPO << 6
mbed_official 174:8bb9f3a33240 128 | SPH << 7;
mbed_official 174:8bb9f3a33240 129 obj->spi->CR0 = tmp;
mbed_official 174:8bb9f3a33240 130
mbed_official 174:8bb9f3a33240 131 tmp = obj->spi->CR1;
mbed_official 174:8bb9f3a33240 132 tmp &= ~(0xD);
mbed_official 174:8bb9f3a33240 133 tmp |= 0 << 0 // LBM - loop back mode - off
mbed_official 174:8bb9f3a33240 134 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
mbed_official 174:8bb9f3a33240 135 | 0 << 3; // SOD - slave output disable - na
mbed_official 174:8bb9f3a33240 136 obj->spi->CR1 = tmp;
mbed_official 174:8bb9f3a33240 137
mbed_official 174:8bb9f3a33240 138 ssp_enable(obj);
mbed_official 174:8bb9f3a33240 139 }
mbed_official 174:8bb9f3a33240 140
mbed_official 174:8bb9f3a33240 141 void spi_frequency(spi_t *obj, int hz) {
mbed_official 174:8bb9f3a33240 142 ssp_disable(obj);
mbed_official 174:8bb9f3a33240 143
mbed_official 174:8bb9f3a33240 144 uint32_t PCLK = SystemCoreClock;
mbed_official 174:8bb9f3a33240 145
mbed_official 174:8bb9f3a33240 146 int prescaler;
mbed_official 174:8bb9f3a33240 147
mbed_official 174:8bb9f3a33240 148 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
mbed_official 174:8bb9f3a33240 149 int prescale_hz = PCLK / prescaler;
mbed_official 174:8bb9f3a33240 150
mbed_official 174:8bb9f3a33240 151 // calculate the divider
mbed_official 174:8bb9f3a33240 152 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
mbed_official 174:8bb9f3a33240 153
mbed_official 174:8bb9f3a33240 154 // check we can support the divider
mbed_official 174:8bb9f3a33240 155 if (divider < 256) {
mbed_official 174:8bb9f3a33240 156 // prescaler
mbed_official 174:8bb9f3a33240 157 obj->spi->CPSR = prescaler;
mbed_official 174:8bb9f3a33240 158
mbed_official 174:8bb9f3a33240 159 // divider
mbed_official 174:8bb9f3a33240 160 obj->spi->CR0 &= ~(0xFFFF << 8);
mbed_official 174:8bb9f3a33240 161 obj->spi->CR0 |= (divider - 1) << 8;
mbed_official 174:8bb9f3a33240 162 ssp_enable(obj);
mbed_official 174:8bb9f3a33240 163 return;
mbed_official 174:8bb9f3a33240 164 }
mbed_official 174:8bb9f3a33240 165 }
mbed_official 174:8bb9f3a33240 166 error("Couldn't setup requested SPI frequency");
mbed_official 174:8bb9f3a33240 167 }
mbed_official 174:8bb9f3a33240 168
mbed_official 174:8bb9f3a33240 169 static inline int ssp_disable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 170 return obj->spi->CR1 &= ~(1 << 1);
mbed_official 174:8bb9f3a33240 171 }
mbed_official 174:8bb9f3a33240 172
mbed_official 174:8bb9f3a33240 173 static inline int ssp_enable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 174 return obj->spi->CR1 |= (1 << 1);
mbed_official 174:8bb9f3a33240 175 }
mbed_official 174:8bb9f3a33240 176
mbed_official 174:8bb9f3a33240 177 static inline int ssp_readable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 178 return obj->spi->SR & (1 << 2);
mbed_official 174:8bb9f3a33240 179 }
mbed_official 174:8bb9f3a33240 180
mbed_official 174:8bb9f3a33240 181 static inline int ssp_writeable(spi_t *obj) {
mbed_official 174:8bb9f3a33240 182 return obj->spi->SR & (1 << 1);
mbed_official 174:8bb9f3a33240 183 }
mbed_official 174:8bb9f3a33240 184
mbed_official 174:8bb9f3a33240 185 static inline void ssp_write(spi_t *obj, int value) {
mbed_official 174:8bb9f3a33240 186 while (!ssp_writeable(obj));
mbed_official 174:8bb9f3a33240 187 obj->spi->DR = value;
mbed_official 174:8bb9f3a33240 188 }
mbed_official 174:8bb9f3a33240 189
mbed_official 174:8bb9f3a33240 190 static inline int ssp_read(spi_t *obj) {
mbed_official 174:8bb9f3a33240 191 while (!ssp_readable(obj));
mbed_official 174:8bb9f3a33240 192 return obj->spi->DR;
mbed_official 174:8bb9f3a33240 193 }
mbed_official 174:8bb9f3a33240 194
mbed_official 174:8bb9f3a33240 195 static inline int ssp_busy(spi_t *obj) {
mbed_official 174:8bb9f3a33240 196 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
mbed_official 174:8bb9f3a33240 197 }
mbed_official 174:8bb9f3a33240 198
mbed_official 174:8bb9f3a33240 199 int spi_master_write(spi_t *obj, int value) {
mbed_official 174:8bb9f3a33240 200 ssp_write(obj, value);
mbed_official 174:8bb9f3a33240 201 return ssp_read(obj);
mbed_official 174:8bb9f3a33240 202 }
mbed_official 174:8bb9f3a33240 203
mbed_official 174:8bb9f3a33240 204 int spi_slave_receive(spi_t *obj) {
mbed_official 174:8bb9f3a33240 205 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
mbed_official 174:8bb9f3a33240 206 }
mbed_official 174:8bb9f3a33240 207
mbed_official 174:8bb9f3a33240 208 int spi_slave_read(spi_t *obj) {
mbed_official 174:8bb9f3a33240 209 return obj->spi->DR;
mbed_official 174:8bb9f3a33240 210 }
mbed_official 174:8bb9f3a33240 211
mbed_official 174:8bb9f3a33240 212 void spi_slave_write(spi_t *obj, int value) {
mbed_official 174:8bb9f3a33240 213 while (ssp_writeable(obj) == 0) ;
mbed_official 174:8bb9f3a33240 214 obj->spi->DR = value;
mbed_official 174:8bb9f3a33240 215 }
mbed_official 174:8bb9f3a33240 216
mbed_official 174:8bb9f3a33240 217 int spi_busy(spi_t *obj) {
mbed_official 174:8bb9f3a33240 218 return ssp_busy(obj);
mbed_official 174:8bb9f3a33240 219 }
mbed_official 174:8bb9f3a33240 220
mbed_official 174:8bb9f3a33240 221 #endif