Fork of mbed-dsp. CMSIS-DSP library of supporting NEON
Dependents: mbed-os-example-cmsis_dsp_neon
Fork of mbed-dsp by
Information
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このページの後半に日本語版が用意されています.
CMSIS-DSP of supporting NEON
What is this ?
A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.
Library Creation environment
CMSIS-DSP library of supporting NEON was created by the following environment.
- Compiler
ARMCC Version 5.03 - Compile option switch[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- Compile option switch[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
Effects of NEON support
In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.
NEON対応CMSIS-DSP
概要
NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。
ライブラリ作成環境
NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。
- コンパイラ
ARMCC Version 5.03 - コンパイルオプションスイッチ[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- コンパイルオプションスイッチ[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
NEON対応による効果について
CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。
cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c@2:da51fb522205, 2013-05-30 (annotated)
- Committer:
- emilmont
- Date:
- Thu May 30 17:10:11 2013 +0100
- Revision:
- 2:da51fb522205
- Parent:
- 1:fdd22bb7aa52
- Child:
- 3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- |
emilmont | 1:fdd22bb7aa52 | 2 | * Copyright (C) 2010 ARM Limited. All rights reserved. |
emilmont | 1:fdd22bb7aa52 | 3 | * |
emilmont | 1:fdd22bb7aa52 | 4 | * $Date: 15. February 2012 |
emilmont | 2:da51fb522205 | 5 | * $Revision: V1.1.0 |
emilmont | 1:fdd22bb7aa52 | 6 | * |
emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library |
emilmont | 2:da51fb522205 | 8 | * Title: arm_dot_prod_q7.c |
emilmont | 1:fdd22bb7aa52 | 9 | * |
emilmont | 2:da51fb522205 | 10 | * Description: Q7 dot product. |
emilmont | 1:fdd22bb7aa52 | 11 | * |
emilmont | 1:fdd22bb7aa52 | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
emilmont | 1:fdd22bb7aa52 | 13 | * |
emilmont | 1:fdd22bb7aa52 | 14 | * Version 1.1.0 2012/02/15 |
emilmont | 1:fdd22bb7aa52 | 15 | * Updated with more optimizations, bug fixes and minor API changes. |
emilmont | 1:fdd22bb7aa52 | 16 | * |
emilmont | 1:fdd22bb7aa52 | 17 | * Version 1.0.10 2011/7/15 |
emilmont | 1:fdd22bb7aa52 | 18 | * Big Endian support added and Merged M0 and M3/M4 Source code. |
emilmont | 1:fdd22bb7aa52 | 19 | * |
emilmont | 1:fdd22bb7aa52 | 20 | * Version 1.0.3 2010/11/29 |
emilmont | 1:fdd22bb7aa52 | 21 | * Re-organized the CMSIS folders and updated documentation. |
emilmont | 1:fdd22bb7aa52 | 22 | * |
emilmont | 1:fdd22bb7aa52 | 23 | * Version 1.0.2 2010/11/11 |
emilmont | 1:fdd22bb7aa52 | 24 | * Documentation updated. |
emilmont | 1:fdd22bb7aa52 | 25 | * |
emilmont | 1:fdd22bb7aa52 | 26 | * Version 1.0.1 2010/10/05 |
emilmont | 1:fdd22bb7aa52 | 27 | * Production release and review comments incorporated. |
emilmont | 1:fdd22bb7aa52 | 28 | * |
emilmont | 1:fdd22bb7aa52 | 29 | * Version 1.0.0 2010/09/20 |
emilmont | 1:fdd22bb7aa52 | 30 | * Production release and review comments incorporated. |
emilmont | 1:fdd22bb7aa52 | 31 | * |
emilmont | 1:fdd22bb7aa52 | 32 | * Version 0.0.7 2010/06/10 |
emilmont | 1:fdd22bb7aa52 | 33 | * Misra-C changes done |
emilmont | 1:fdd22bb7aa52 | 34 | * -------------------------------------------------------------------- */ |
emilmont | 1:fdd22bb7aa52 | 35 | |
emilmont | 1:fdd22bb7aa52 | 36 | #include "arm_math.h" |
emilmont | 1:fdd22bb7aa52 | 37 | |
emilmont | 1:fdd22bb7aa52 | 38 | /** |
emilmont | 1:fdd22bb7aa52 | 39 | * @ingroup groupMath |
emilmont | 1:fdd22bb7aa52 | 40 | */ |
emilmont | 1:fdd22bb7aa52 | 41 | |
emilmont | 1:fdd22bb7aa52 | 42 | /** |
emilmont | 1:fdd22bb7aa52 | 43 | * @addtogroup dot_prod |
emilmont | 1:fdd22bb7aa52 | 44 | * @{ |
emilmont | 1:fdd22bb7aa52 | 45 | */ |
emilmont | 1:fdd22bb7aa52 | 46 | |
emilmont | 1:fdd22bb7aa52 | 47 | /** |
emilmont | 1:fdd22bb7aa52 | 48 | * @brief Dot product of Q7 vectors. |
emilmont | 1:fdd22bb7aa52 | 49 | * @param[in] *pSrcA points to the first input vector |
emilmont | 1:fdd22bb7aa52 | 50 | * @param[in] *pSrcB points to the second input vector |
emilmont | 1:fdd22bb7aa52 | 51 | * @param[in] blockSize number of samples in each vector |
emilmont | 1:fdd22bb7aa52 | 52 | * @param[out] *result output result returned here |
emilmont | 1:fdd22bb7aa52 | 53 | * @return none. |
emilmont | 1:fdd22bb7aa52 | 54 | * |
emilmont | 1:fdd22bb7aa52 | 55 | * <b>Scaling and Overflow Behavior:</b> |
emilmont | 1:fdd22bb7aa52 | 56 | * \par |
emilmont | 1:fdd22bb7aa52 | 57 | * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these |
emilmont | 1:fdd22bb7aa52 | 58 | * results are added to an accumulator in 18.14 format. |
emilmont | 1:fdd22bb7aa52 | 59 | * Nonsaturating additions are used and there is no danger of wrap around as long as |
emilmont | 1:fdd22bb7aa52 | 60 | * the vectors are less than 2^18 elements long. |
emilmont | 1:fdd22bb7aa52 | 61 | * The return result is in 18.14 format. |
emilmont | 1:fdd22bb7aa52 | 62 | */ |
emilmont | 1:fdd22bb7aa52 | 63 | |
emilmont | 1:fdd22bb7aa52 | 64 | void arm_dot_prod_q7( |
emilmont | 1:fdd22bb7aa52 | 65 | q7_t * pSrcA, |
emilmont | 1:fdd22bb7aa52 | 66 | q7_t * pSrcB, |
emilmont | 1:fdd22bb7aa52 | 67 | uint32_t blockSize, |
emilmont | 1:fdd22bb7aa52 | 68 | q31_t * result) |
emilmont | 1:fdd22bb7aa52 | 69 | { |
emilmont | 1:fdd22bb7aa52 | 70 | uint32_t blkCnt; /* loop counter */ |
emilmont | 1:fdd22bb7aa52 | 71 | |
emilmont | 1:fdd22bb7aa52 | 72 | q31_t sum = 0; /* Temporary variables to store output */ |
emilmont | 1:fdd22bb7aa52 | 73 | |
emilmont | 1:fdd22bb7aa52 | 74 | #ifndef ARM_MATH_CM0 |
emilmont | 1:fdd22bb7aa52 | 75 | |
emilmont | 1:fdd22bb7aa52 | 76 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
emilmont | 1:fdd22bb7aa52 | 77 | |
emilmont | 1:fdd22bb7aa52 | 78 | q31_t input1, input2; /* Temporary variables to store input */ |
emilmont | 1:fdd22bb7aa52 | 79 | q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */ |
emilmont | 1:fdd22bb7aa52 | 80 | |
emilmont | 1:fdd22bb7aa52 | 81 | |
emilmont | 1:fdd22bb7aa52 | 82 | |
emilmont | 1:fdd22bb7aa52 | 83 | /*loop Unrolling */ |
emilmont | 1:fdd22bb7aa52 | 84 | blkCnt = blockSize >> 2u; |
emilmont | 1:fdd22bb7aa52 | 85 | |
emilmont | 1:fdd22bb7aa52 | 86 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
emilmont | 1:fdd22bb7aa52 | 87 | ** a second loop below computes the remaining 1 to 3 samples. */ |
emilmont | 1:fdd22bb7aa52 | 88 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 89 | { |
emilmont | 1:fdd22bb7aa52 | 90 | /* read 4 samples at a time from sourceA */ |
emilmont | 1:fdd22bb7aa52 | 91 | input1 = *__SIMD32(pSrcA)++; |
emilmont | 1:fdd22bb7aa52 | 92 | /* read 4 samples at a time from sourceB */ |
emilmont | 1:fdd22bb7aa52 | 93 | input2 = *__SIMD32(pSrcB)++; |
emilmont | 1:fdd22bb7aa52 | 94 | |
emilmont | 1:fdd22bb7aa52 | 95 | /* extract two q7_t samples to q15_t samples */ |
emilmont | 1:fdd22bb7aa52 | 96 | inA1 = __SXTB16(__ROR(input1, 8)); |
emilmont | 1:fdd22bb7aa52 | 97 | /* extract reminaing two samples */ |
emilmont | 1:fdd22bb7aa52 | 98 | inA2 = __SXTB16(input1); |
emilmont | 1:fdd22bb7aa52 | 99 | /* extract two q7_t samples to q15_t samples */ |
emilmont | 1:fdd22bb7aa52 | 100 | inB1 = __SXTB16(__ROR(input2, 8)); |
emilmont | 1:fdd22bb7aa52 | 101 | /* extract reminaing two samples */ |
emilmont | 1:fdd22bb7aa52 | 102 | inB2 = __SXTB16(input2); |
emilmont | 1:fdd22bb7aa52 | 103 | |
emilmont | 1:fdd22bb7aa52 | 104 | /* multiply and accumulate two samples at a time */ |
emilmont | 1:fdd22bb7aa52 | 105 | sum = __SMLAD(inA1, inB1, sum); |
emilmont | 1:fdd22bb7aa52 | 106 | sum = __SMLAD(inA2, inB2, sum); |
emilmont | 1:fdd22bb7aa52 | 107 | |
emilmont | 1:fdd22bb7aa52 | 108 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 109 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 110 | } |
emilmont | 1:fdd22bb7aa52 | 111 | |
emilmont | 1:fdd22bb7aa52 | 112 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
emilmont | 1:fdd22bb7aa52 | 113 | ** No loop unrolling is used. */ |
emilmont | 1:fdd22bb7aa52 | 114 | blkCnt = blockSize % 0x4u; |
emilmont | 1:fdd22bb7aa52 | 115 | |
emilmont | 1:fdd22bb7aa52 | 116 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 117 | { |
emilmont | 1:fdd22bb7aa52 | 118 | /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
emilmont | 1:fdd22bb7aa52 | 119 | /* Dot product and then store the results in a temporary buffer. */ |
emilmont | 1:fdd22bb7aa52 | 120 | sum = __SMLAD(*pSrcA++, *pSrcB++, sum); |
emilmont | 1:fdd22bb7aa52 | 121 | |
emilmont | 1:fdd22bb7aa52 | 122 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 123 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 124 | } |
emilmont | 1:fdd22bb7aa52 | 125 | |
emilmont | 1:fdd22bb7aa52 | 126 | #else |
emilmont | 1:fdd22bb7aa52 | 127 | |
emilmont | 1:fdd22bb7aa52 | 128 | /* Run the below code for Cortex-M0 */ |
emilmont | 1:fdd22bb7aa52 | 129 | |
emilmont | 1:fdd22bb7aa52 | 130 | |
emilmont | 1:fdd22bb7aa52 | 131 | |
emilmont | 1:fdd22bb7aa52 | 132 | /* Initialize blkCnt with number of samples */ |
emilmont | 1:fdd22bb7aa52 | 133 | blkCnt = blockSize; |
emilmont | 1:fdd22bb7aa52 | 134 | |
emilmont | 1:fdd22bb7aa52 | 135 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 136 | { |
emilmont | 1:fdd22bb7aa52 | 137 | /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
emilmont | 1:fdd22bb7aa52 | 138 | /* Dot product and then store the results in a temporary buffer. */ |
emilmont | 1:fdd22bb7aa52 | 139 | sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++); |
emilmont | 1:fdd22bb7aa52 | 140 | |
emilmont | 1:fdd22bb7aa52 | 141 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 142 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 143 | } |
emilmont | 1:fdd22bb7aa52 | 144 | |
emilmont | 1:fdd22bb7aa52 | 145 | #endif /* #ifndef ARM_MATH_CM0 */ |
emilmont | 1:fdd22bb7aa52 | 146 | |
emilmont | 1:fdd22bb7aa52 | 147 | |
emilmont | 1:fdd22bb7aa52 | 148 | /* Store the result in the destination buffer in 18.14 format */ |
emilmont | 1:fdd22bb7aa52 | 149 | *result = sum; |
emilmont | 1:fdd22bb7aa52 | 150 | } |
emilmont | 1:fdd22bb7aa52 | 151 | |
emilmont | 1:fdd22bb7aa52 | 152 | /** |
emilmont | 1:fdd22bb7aa52 | 153 | * @} end of dot_prod group |
emilmont | 1:fdd22bb7aa52 | 154 | */ |