Fork of mbed-dsp. CMSIS-DSP library of supporting NEON
Dependents: mbed-os-example-cmsis_dsp_neon
Fork of mbed-dsp by
Information
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CMSIS-DSP of supporting NEON
What is this ?
A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.
Library Creation environment
CMSIS-DSP library of supporting NEON was created by the following environment.
- Compiler
ARMCC Version 5.03 - Compile option switch[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- Compile option switch[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
Effects of NEON support
In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.
NEON対応CMSIS-DSP
概要
NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。
ライブラリ作成環境
NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。
- コンパイラ
ARMCC Version 5.03 - コンパイルオプションスイッチ[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- コンパイルオプションスイッチ[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
NEON対応による効果について
CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。
cmsis_dsp/BasicMathFunctions/arm_add_q31.c@4:9cee975aadce, 2014-06-23 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Jun 23 09:30:09 2014 +0100
- Revision:
- 4:9cee975aadce
- Parent:
- 3:7a284390b0ce
Synchronized with git revision 6e7c7bcec41226f536474daae3c13d49e4c0e865
Full URL: https://github.com/mbedmicro/mbed/commit/6e7c7bcec41226f536474daae3c13d49e4c0e865/
Fix signed unsigned compare in dsp library
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- |
mbed_official | 3:7a284390b0ce | 2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved. |
emilmont | 1:fdd22bb7aa52 | 3 | * |
mbed_official | 3:7a284390b0ce | 4 | * $Date: 17. January 2013 |
mbed_official | 3:7a284390b0ce | 5 | * $Revision: V1.4.1 |
emilmont | 1:fdd22bb7aa52 | 6 | * |
emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library |
emilmont | 2:da51fb522205 | 8 | * Title: arm_add_q31.c |
emilmont | 1:fdd22bb7aa52 | 9 | * |
emilmont | 2:da51fb522205 | 10 | * Description: Q31 vector addition. |
emilmont | 1:fdd22bb7aa52 | 11 | * |
emilmont | 1:fdd22bb7aa52 | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
emilmont | 1:fdd22bb7aa52 | 13 | * |
mbed_official | 3:7a284390b0ce | 14 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 3:7a284390b0ce | 15 | * modification, are permitted provided that the following conditions |
mbed_official | 3:7a284390b0ce | 16 | * are met: |
mbed_official | 3:7a284390b0ce | 17 | * - Redistributions of source code must retain the above copyright |
mbed_official | 3:7a284390b0ce | 18 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 3:7a284390b0ce | 19 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 3:7a284390b0ce | 20 | * notice, this list of conditions and the following disclaimer in |
mbed_official | 3:7a284390b0ce | 21 | * the documentation and/or other materials provided with the |
mbed_official | 3:7a284390b0ce | 22 | * distribution. |
mbed_official | 3:7a284390b0ce | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
mbed_official | 3:7a284390b0ce | 24 | * may be used to endorse or promote products derived from this |
mbed_official | 3:7a284390b0ce | 25 | * software without specific prior written permission. |
mbed_official | 3:7a284390b0ce | 26 | * |
mbed_official | 3:7a284390b0ce | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
mbed_official | 3:7a284390b0ce | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
mbed_official | 3:7a284390b0ce | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
mbed_official | 3:7a284390b0ce | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
mbed_official | 3:7a284390b0ce | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
mbed_official | 3:7a284390b0ce | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
mbed_official | 3:7a284390b0ce | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
mbed_official | 3:7a284390b0ce | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 3:7a284390b0ce | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
mbed_official | 3:7a284390b0ce | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
mbed_official | 3:7a284390b0ce | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 3:7a284390b0ce | 38 | * POSSIBILITY OF SUCH DAMAGE. |
emilmont | 1:fdd22bb7aa52 | 39 | * -------------------------------------------------------------------- */ |
emilmont | 1:fdd22bb7aa52 | 40 | |
emilmont | 1:fdd22bb7aa52 | 41 | #include "arm_math.h" |
emilmont | 1:fdd22bb7aa52 | 42 | |
emilmont | 1:fdd22bb7aa52 | 43 | /** |
emilmont | 1:fdd22bb7aa52 | 44 | * @ingroup groupMath |
emilmont | 1:fdd22bb7aa52 | 45 | */ |
emilmont | 1:fdd22bb7aa52 | 46 | |
emilmont | 1:fdd22bb7aa52 | 47 | /** |
emilmont | 1:fdd22bb7aa52 | 48 | * @addtogroup BasicAdd |
emilmont | 1:fdd22bb7aa52 | 49 | * @{ |
emilmont | 1:fdd22bb7aa52 | 50 | */ |
emilmont | 1:fdd22bb7aa52 | 51 | |
emilmont | 1:fdd22bb7aa52 | 52 | |
emilmont | 1:fdd22bb7aa52 | 53 | /** |
emilmont | 1:fdd22bb7aa52 | 54 | * @brief Q31 vector addition. |
emilmont | 1:fdd22bb7aa52 | 55 | * @param[in] *pSrcA points to the first input vector |
emilmont | 1:fdd22bb7aa52 | 56 | * @param[in] *pSrcB points to the second input vector |
emilmont | 1:fdd22bb7aa52 | 57 | * @param[out] *pDst points to the output vector |
emilmont | 1:fdd22bb7aa52 | 58 | * @param[in] blockSize number of samples in each vector |
emilmont | 1:fdd22bb7aa52 | 59 | * @return none. |
emilmont | 1:fdd22bb7aa52 | 60 | * |
emilmont | 1:fdd22bb7aa52 | 61 | * <b>Scaling and Overflow Behavior:</b> |
emilmont | 1:fdd22bb7aa52 | 62 | * \par |
emilmont | 1:fdd22bb7aa52 | 63 | * The function uses saturating arithmetic. |
emilmont | 1:fdd22bb7aa52 | 64 | * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. |
emilmont | 1:fdd22bb7aa52 | 65 | */ |
emilmont | 1:fdd22bb7aa52 | 66 | |
emilmont | 1:fdd22bb7aa52 | 67 | void arm_add_q31( |
emilmont | 1:fdd22bb7aa52 | 68 | q31_t * pSrcA, |
emilmont | 1:fdd22bb7aa52 | 69 | q31_t * pSrcB, |
emilmont | 1:fdd22bb7aa52 | 70 | q31_t * pDst, |
emilmont | 1:fdd22bb7aa52 | 71 | uint32_t blockSize) |
emilmont | 1:fdd22bb7aa52 | 72 | { |
emilmont | 1:fdd22bb7aa52 | 73 | uint32_t blkCnt; /* loop counter */ |
emilmont | 1:fdd22bb7aa52 | 74 | |
mbed_official | 3:7a284390b0ce | 75 | #ifndef ARM_MATH_CM0_FAMILY |
emilmont | 1:fdd22bb7aa52 | 76 | |
emilmont | 1:fdd22bb7aa52 | 77 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
emilmont | 1:fdd22bb7aa52 | 78 | q31_t inA1, inA2, inA3, inA4; |
emilmont | 1:fdd22bb7aa52 | 79 | q31_t inB1, inB2, inB3, inB4; |
emilmont | 1:fdd22bb7aa52 | 80 | |
emilmont | 1:fdd22bb7aa52 | 81 | /*loop Unrolling */ |
emilmont | 1:fdd22bb7aa52 | 82 | blkCnt = blockSize >> 2u; |
emilmont | 1:fdd22bb7aa52 | 83 | |
emilmont | 1:fdd22bb7aa52 | 84 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
emilmont | 1:fdd22bb7aa52 | 85 | ** a second loop below computes the remaining 1 to 3 samples. */ |
emilmont | 1:fdd22bb7aa52 | 86 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 87 | { |
emilmont | 1:fdd22bb7aa52 | 88 | /* C = A + B */ |
emilmont | 1:fdd22bb7aa52 | 89 | /* Add and then store the results in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 90 | inA1 = *pSrcA++; |
emilmont | 1:fdd22bb7aa52 | 91 | inA2 = *pSrcA++; |
emilmont | 1:fdd22bb7aa52 | 92 | inB1 = *pSrcB++; |
emilmont | 1:fdd22bb7aa52 | 93 | inB2 = *pSrcB++; |
emilmont | 1:fdd22bb7aa52 | 94 | |
emilmont | 1:fdd22bb7aa52 | 95 | inA3 = *pSrcA++; |
emilmont | 1:fdd22bb7aa52 | 96 | inA4 = *pSrcA++; |
emilmont | 1:fdd22bb7aa52 | 97 | inB3 = *pSrcB++; |
emilmont | 1:fdd22bb7aa52 | 98 | inB4 = *pSrcB++; |
emilmont | 1:fdd22bb7aa52 | 99 | |
emilmont | 1:fdd22bb7aa52 | 100 | *pDst++ = __QADD(inA1, inB1); |
emilmont | 1:fdd22bb7aa52 | 101 | *pDst++ = __QADD(inA2, inB2); |
emilmont | 1:fdd22bb7aa52 | 102 | *pDst++ = __QADD(inA3, inB3); |
emilmont | 1:fdd22bb7aa52 | 103 | *pDst++ = __QADD(inA4, inB4); |
emilmont | 1:fdd22bb7aa52 | 104 | |
emilmont | 1:fdd22bb7aa52 | 105 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 106 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 107 | } |
emilmont | 1:fdd22bb7aa52 | 108 | |
emilmont | 1:fdd22bb7aa52 | 109 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
emilmont | 1:fdd22bb7aa52 | 110 | ** No loop unrolling is used. */ |
emilmont | 1:fdd22bb7aa52 | 111 | blkCnt = blockSize % 0x4u; |
emilmont | 1:fdd22bb7aa52 | 112 | |
emilmont | 1:fdd22bb7aa52 | 113 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 114 | { |
emilmont | 1:fdd22bb7aa52 | 115 | /* C = A + B */ |
emilmont | 1:fdd22bb7aa52 | 116 | /* Add and then store the results in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 117 | *pDst++ = __QADD(*pSrcA++, *pSrcB++); |
emilmont | 1:fdd22bb7aa52 | 118 | |
emilmont | 1:fdd22bb7aa52 | 119 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 120 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 121 | } |
emilmont | 1:fdd22bb7aa52 | 122 | |
emilmont | 1:fdd22bb7aa52 | 123 | #else |
emilmont | 1:fdd22bb7aa52 | 124 | |
emilmont | 1:fdd22bb7aa52 | 125 | /* Run the below code for Cortex-M0 */ |
emilmont | 1:fdd22bb7aa52 | 126 | |
emilmont | 1:fdd22bb7aa52 | 127 | |
emilmont | 1:fdd22bb7aa52 | 128 | |
emilmont | 1:fdd22bb7aa52 | 129 | /* Initialize blkCnt with number of samples */ |
emilmont | 1:fdd22bb7aa52 | 130 | blkCnt = blockSize; |
emilmont | 1:fdd22bb7aa52 | 131 | |
emilmont | 1:fdd22bb7aa52 | 132 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 133 | { |
emilmont | 1:fdd22bb7aa52 | 134 | /* C = A + B */ |
emilmont | 1:fdd22bb7aa52 | 135 | /* Add and then store the results in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 136 | *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++); |
emilmont | 1:fdd22bb7aa52 | 137 | |
emilmont | 1:fdd22bb7aa52 | 138 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 139 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 140 | } |
emilmont | 1:fdd22bb7aa52 | 141 | |
mbed_official | 3:7a284390b0ce | 142 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
emilmont | 1:fdd22bb7aa52 | 143 | |
emilmont | 1:fdd22bb7aa52 | 144 | } |
emilmont | 1:fdd22bb7aa52 | 145 | |
emilmont | 1:fdd22bb7aa52 | 146 | /** |
emilmont | 1:fdd22bb7aa52 | 147 | * @} end of BasicAdd group |
emilmont | 1:fdd22bb7aa52 | 148 | */ |