Fork of mbed-dsp. CMSIS-DSP library of supporting NEON
Dependents: mbed-os-example-cmsis_dsp_neon
Fork of mbed-dsp by
Information
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CMSIS-DSP of supporting NEON
What is this ?
A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.
Library Creation environment
CMSIS-DSP library of supporting NEON was created by the following environment.
- Compiler
ARMCC Version 5.03 - Compile option switch[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- Compile option switch[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
Effects of NEON support
In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.
NEON対応CMSIS-DSP
概要
NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。
ライブラリ作成環境
NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。
- コンパイラ
ARMCC Version 5.03 - コンパイルオプションスイッチ[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- コンパイルオプションスイッチ[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
NEON対応による効果について
CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。
cmsis_dsp/StatisticsFunctions/arm_var_q15.c
- Committer:
- mbed_official
- Date:
- 2013-11-08
- Revision:
- 3:7a284390b0ce
- Parent:
- 2:da51fb522205
File content as of revision 3:7a284390b0ce:
/* ---------------------------------------------------------------------- * Copyright (C) 2010-2013 ARM Limited. All rights reserved. * * $Date: 17. January 2013 * $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_var_q15.c * * Description: Variance of an array of Q15 type. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * - Neither the name of ARM LIMITED nor the names of its contributors * may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupStats */ /** * @addtogroup variance * @{ */ /** * @brief Variance of the elements of a Q15 vector. * @param[in] *pSrc points to the input vector * @param[in] blockSize length of the input vector * @param[out] *pResult variance value returned here * @return none. * * @details * <b>Scaling and Overflow Behavior:</b> * * \par * The function is implemented using a 64-bit internal accumulator. * The input is represented in 1.15 format. * Intermediate multiplication yields a 2.30 format, and this * result is added without saturation to a 64-bit accumulator in 34.30 format. * With 33 guard bits in the accumulator, there is no risk of overflow, and the * full precision of the intermediate multiplication is preserved. * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower * 15 bits, and then saturated to yield a result in 1.15 format. * */ void arm_var_q15( q15_t * pSrc, uint32_t blockSize, q31_t * pResult) { q31_t sum = 0; /* Accumulator */ q31_t meanOfSquares, squareOfMean; /* Mean of square and square of mean */ q15_t mean; /* mean */ uint32_t blkCnt; /* loop counter */ q15_t t; /* Temporary variable */ q63_t sumOfSquares = 0; /* Accumulator */ #ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t in; /* Input variable */ q15_t in1; /* Temporary variable */ /*loop Unrolling */ blkCnt = blockSize >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ /* Compute Sum of squares of the input samples * and then store the result in a temporary variable, sum. */ in = *__SIMD32(pSrc)++; sum += ((in << 16) >> 16); sum += (in >> 16); sumOfSquares = __SMLALD(in, in, sumOfSquares); in = *__SIMD32(pSrc)++; sum += ((in << 16) >> 16); sum += (in >> 16); sumOfSquares = __SMLALD(in, in, sumOfSquares); /* Decrement the loop counter */ blkCnt--; } /* If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = blockSize % 0x4u; while(blkCnt > 0u) { /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ /* Compute Sum of squares of the input samples * and then store the result in a temporary variable, sum. */ in1 = *pSrc++; sum += in1; sumOfSquares = __SMLALD(in1, in1, sumOfSquares); /* Decrement the loop counter */ blkCnt--; } /* Compute Mean of squares of the input samples * and then store the result in a temporary variable, meanOfSquares. */ t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384); sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u); meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u); #else /* Run the below code for Cortex-M0 */ q15_t in; /* Temporary variable */ /* Loop over blockSize number of values */ blkCnt = blockSize; while(blkCnt > 0u) { /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ /* Compute Sum of squares of the input samples * and then store the result in a temporary variable, sumOfSquares. */ in = *pSrc++; sumOfSquares += (in * in); /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ /* Compute sum of all input values and then store the result in a temporary variable, sum. */ sum += in; /* Decrement the loop counter */ blkCnt--; } /* Compute Mean of squares of the input samples * and then store the result in a temporary variable, meanOfSquares. */ t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384); sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u); meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u); #endif /* #ifndef ARM_MATH_CM0_FAMILY */ /* Compute mean of all input values */ t = (q15_t) ((1.0f / (float32_t) (blockSize * (blockSize - 1u))) * 32768); mean = __SSAT(sum, 16u); /* Compute square of mean */ squareOfMean = ((q31_t) mean * mean) >> 15; squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15); /* Compute variance and then store the result to the destination */ *pResult = (meanOfSquares - squareOfMean); } /** * @} end of variance group */