Fork of mbed-dsp. CMSIS-DSP library of supporting NEON

Dependents:   mbed-os-example-cmsis_dsp_neon

Fork of mbed-dsp by mbed official

Information

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CMSIS-DSP of supporting NEON

What is this ?

A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.

Library Creation environment

CMSIS-DSP library of supporting NEON was created by the following environment.

  • Compiler
    ARMCC Version 5.03
  • Compile option switch[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • Compile option switch[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


Effects of NEON support

In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.


NEON対応CMSIS-DSP

概要

NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。

ライブラリ作成環境

NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。

  • コンパイラ
    ARMCC Version 5.03
  • コンパイルオプションスイッチ[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • コンパイルオプションスイッチ[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


NEON対応による効果について

CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。


Revision:
3:7a284390b0ce
Parent:
2:da51fb522205
--- a/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c	Thu May 30 17:10:11 2013 +0100
+++ b/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c	Fri Nov 08 13:45:10 2013 +0000
@@ -1,62 +1,67 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010 ARM Limited. All rights reserved.
-*
-* $Date:        15. May 2012
-* $Revision: 	V1.1.0
-*
-* Project: 	    CMSIS DSP Library
-* Title:		arm_scale_q31.c
-*
-* Description:	Multiplies a Q31 vector by a scalar.
-*
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
+*    
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_scale_q31.c    
+*    
+* Description:	Multiplies a Q31 vector by a scalar.    
+*    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Version 1.1.0 2012/02/15
-*    Updated with more optimizations, bug fixes and minor API changes.
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15
-*    Big Endian support added and Merged M0 and M3/M4 Source code.
-*
-* Version 1.0.3 2010/11/29
-*    Re-organized the CMSIS folders and updated documentation.
-*
-* Version 1.0.2 2010/11/11
-*    Documentation updated.
-*
-* Version 1.0.1 2010/10/05
-*    Production release and review comments incorporated.
-*
-* Version 1.0.0 2010/09/20
-*    Production release and review comments incorporated
-*
-* Version 0.0.7  2010/06/10
-*    Misra-C changes done
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
-/**
- * @ingroup groupMath
+/**       
+ * @ingroup groupMath       
  */
 
-/**
- * @addtogroup scale
- * @{
+/**       
+ * @addtogroup scale       
+ * @{       
  */
 
-/**
- * @brief Multiplies a Q31 vector by a scalar.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       scaleFract fractional portion of the scale value
- * @param[in]       shift number of bits to shift the result by
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+/**       
+ * @brief Multiplies a Q31 vector by a scalar.       
+ * @param[in]       *pSrc points to the input vector       
+ * @param[in]       scaleFract fractional portion of the scale value       
+ * @param[in]       shift number of bits to shift the result by       
+ * @param[out]      *pDst points to the output vector       
+ * @param[in]       blockSize number of samples in the vector       
+ * @return none.       
+ *       
+ * <b>Scaling and Overflow Behavior:</b>       
+ * \par       
+ * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.       
+ * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.       
  */
 
 void arm_scale_q31(
@@ -71,7 +76,7 @@
   uint32_t blkCnt;                               /* loop counter */
   q31_t in, out;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
 /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -84,7 +89,7 @@
 
   if(sign == 0u)
   {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
      ** a second loop below computes the remaining 1 to 3 samples. */
     while(blkCnt > 0u)
     {
@@ -138,9 +143,7 @@
   }
   else
   {
-    kShift = -kShift;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
      ** a second loop below computes the remaining 1 to 3 samples. */
     while(blkCnt > 0u)
     {
@@ -157,11 +160,11 @@
       in4 = ((q63_t) in4 * scaleFract) >> 32;
 
       /* apply shifting */
-      out1 = in1 >> kShift;
-      out2 = in2 >> kShift;
+      out1 = in1 >> -kShift;
+      out2 = in2 >> -kShift;
 
-      out3 = in3 >> kShift;
-      out4 = in4 >> kShift;
+      out3 = in3 >> -kShift;
+      out4 = in4 >> -kShift;
 
       /* Store result destination */
       *pDst = out1;
@@ -178,46 +181,59 @@
       blkCnt--;
     }
   }
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
    ** No loop unrolling is used. */
   blkCnt = blockSize % 0x4u;
 
 #else
 
   /* Run the below code for Cortex-M0 */
-  if(sign != 0u)
-    kShift = -kShift;
 
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
-  while(blkCnt > 0u)
+  if(sign == 0)
   {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    in = *pSrc++;
-    in = ((q63_t) in * scaleFract) >> 32;
+	  while(blkCnt > 0u)
+	  {
+		/* C = A * scale */
+		/* Scale the input and then store the result in the destination buffer. */
+		in = *pSrc++;
+		in = ((q63_t) in * scaleFract) >> 32;
+
+		out = in << kShift;
+		
+		if(in != (out >> kShift))
+			out = 0x7FFFFFFF ^ (in >> 31);
+
+		*pDst++ = out;
 
-    if(sign == 0)
-    {
-      out = in << kShift;
-      if(in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-    }
-    else
-    {
-      out = in >> kShift;
-    }
+		/* Decrement the loop counter */
+		blkCnt--;
+	  }
+  }
+  else
+  {
+	  while(blkCnt > 0u)
+	  {
+		/* C = A * scale */
+		/* Scale the input and then store the result in the destination buffer. */
+		in = *pSrc++;
+		in = ((q63_t) in * scaleFract) >> 32;
 
-    *pDst++ = out;
+		out = in >> -kShift;
+
+		*pDst++ = out;
 
-    /* Decrement the loop counter */
-    blkCnt--;
+		/* Decrement the loop counter */
+		blkCnt--;
+	  }
+  
   }
 }
 
-/**
- * @} end of scale group
+/**       
+ * @} end of scale group       
  */