Fork of mbed-dsp. CMSIS-DSP library of supporting NEON

Dependents:   mbed-os-example-cmsis_dsp_neon

Fork of mbed-dsp by mbed official

Information

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CMSIS-DSP of supporting NEON

What is this ?

A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.

Library Creation environment

CMSIS-DSP library of supporting NEON was created by the following environment.

  • Compiler
    ARMCC Version 5.03
  • Compile option switch[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • Compile option switch[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


Effects of NEON support

In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.


NEON対応CMSIS-DSP

概要

NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。

ライブラリ作成環境

NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。

  • コンパイラ
    ARMCC Version 5.03
  • コンパイルオプションスイッチ[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • コンパイルオプションスイッチ[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


NEON対応による効果について

CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。


Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_mat_trans_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q31 matrix transpose.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.5 2010/04/26
emilmont 1:fdd22bb7aa52 33 * incorporated review comments and updated with latest CMSIS layer
emilmont 1:fdd22bb7aa52 34 *
emilmont 1:fdd22bb7aa52 35 * Version 0.0.3 2010/03/10
emilmont 1:fdd22bb7aa52 36 * Initial version
emilmont 1:fdd22bb7aa52 37 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 /**
emilmont 1:fdd22bb7aa52 42 * @ingroup groupMatrix
emilmont 1:fdd22bb7aa52 43 */
emilmont 1:fdd22bb7aa52 44
emilmont 1:fdd22bb7aa52 45 /**
emilmont 1:fdd22bb7aa52 46 * @addtogroup MatrixTrans
emilmont 1:fdd22bb7aa52 47 * @{
emilmont 1:fdd22bb7aa52 48 */
emilmont 1:fdd22bb7aa52 49
emilmont 1:fdd22bb7aa52 50 /*
emilmont 1:fdd22bb7aa52 51 * @brief Q31 matrix transpose.
emilmont 1:fdd22bb7aa52 52 * @param[in] *pSrc points to the input matrix
emilmont 1:fdd22bb7aa52 53 * @param[out] *pDst points to the output matrix
emilmont 1:fdd22bb7aa52 54 * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
emilmont 1:fdd22bb7aa52 55 * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emilmont 1:fdd22bb7aa52 56 */
emilmont 1:fdd22bb7aa52 57
emilmont 1:fdd22bb7aa52 58 arm_status arm_mat_trans_q31(
emilmont 1:fdd22bb7aa52 59 const arm_matrix_instance_q31 * pSrc,
emilmont 1:fdd22bb7aa52 60 arm_matrix_instance_q31 * pDst)
emilmont 1:fdd22bb7aa52 61 {
emilmont 1:fdd22bb7aa52 62 q31_t *pIn = pSrc->pData; /* input data matrix pointer */
emilmont 1:fdd22bb7aa52 63 q31_t *pOut = pDst->pData; /* output data matrix pointer */
emilmont 1:fdd22bb7aa52 64 q31_t *px; /* Temporary output data matrix pointer */
emilmont 1:fdd22bb7aa52 65 uint16_t nRows = pSrc->numRows; /* number of nRows */
emilmont 1:fdd22bb7aa52 66 uint16_t nColumns = pSrc->numCols; /* number of nColumns */
emilmont 1:fdd22bb7aa52 67
emilmont 1:fdd22bb7aa52 68 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 71
emilmont 1:fdd22bb7aa52 72 uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */
emilmont 1:fdd22bb7aa52 73 arm_status status; /* status of matrix transpose */
emilmont 1:fdd22bb7aa52 74
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78
emilmont 1:fdd22bb7aa52 79 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 80 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
emilmont 1:fdd22bb7aa52 81 {
emilmont 1:fdd22bb7aa52 82 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 83 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 84 }
emilmont 1:fdd22bb7aa52 85 else
emilmont 1:fdd22bb7aa52 86 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 {
emilmont 1:fdd22bb7aa52 89 /* Matrix transpose by exchanging the rows with columns */
emilmont 1:fdd22bb7aa52 90 /* row loop */
emilmont 1:fdd22bb7aa52 91 do
emilmont 1:fdd22bb7aa52 92 {
emilmont 1:fdd22bb7aa52 93 /* Apply loop unrolling and exchange the columns with row elements */
emilmont 1:fdd22bb7aa52 94 blkCnt = nColumns >> 2u;
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 /* The pointer px is set to starting address of the column being processed */
emilmont 1:fdd22bb7aa52 97 px = pOut + i;
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 100 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 101 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 102 {
emilmont 1:fdd22bb7aa52 103 /* Read and store the input element in the destination */
emilmont 1:fdd22bb7aa52 104 *px = *pIn++;
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 107 px += nRows;
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 /* Read and store the input element in the destination */
emilmont 1:fdd22bb7aa52 110 *px = *pIn++;
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 113 px += nRows;
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* Read and store the input element in the destination */
emilmont 1:fdd22bb7aa52 116 *px = *pIn++;
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 119 px += nRows;
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 /* Read and store the input element in the destination */
emilmont 1:fdd22bb7aa52 122 *px = *pIn++;
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 125 px += nRows;
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 128 blkCnt--;
emilmont 1:fdd22bb7aa52 129 }
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /* Perform matrix transpose for last 3 samples here. */
emilmont 1:fdd22bb7aa52 132 blkCnt = nColumns % 0x4u;
emilmont 1:fdd22bb7aa52 133
emilmont 1:fdd22bb7aa52 134 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 135 {
emilmont 1:fdd22bb7aa52 136 /* Read and store the input element in the destination */
emilmont 1:fdd22bb7aa52 137 *px = *pIn++;
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 140 px += nRows;
emilmont 1:fdd22bb7aa52 141
emilmont 1:fdd22bb7aa52 142 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 143 blkCnt--;
emilmont 1:fdd22bb7aa52 144 }
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 #else
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 149
emilmont 1:fdd22bb7aa52 150 uint16_t col, i = 0u, row = nRows; /* loop counters */
emilmont 1:fdd22bb7aa52 151 arm_status status; /* status of matrix transpose */
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153
emilmont 1:fdd22bb7aa52 154 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 157 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
emilmont 1:fdd22bb7aa52 158 {
emilmont 1:fdd22bb7aa52 159 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 160 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 161 }
emilmont 1:fdd22bb7aa52 162 else
emilmont 1:fdd22bb7aa52 163 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 164
emilmont 1:fdd22bb7aa52 165 {
emilmont 1:fdd22bb7aa52 166 /* Matrix transpose by exchanging the rows with columns */
emilmont 1:fdd22bb7aa52 167 /* row loop */
emilmont 1:fdd22bb7aa52 168 do
emilmont 1:fdd22bb7aa52 169 {
emilmont 1:fdd22bb7aa52 170 /* The pointer px is set to starting address of the column being processed */
emilmont 1:fdd22bb7aa52 171 px = pOut + i;
emilmont 1:fdd22bb7aa52 172
emilmont 1:fdd22bb7aa52 173 /* Initialize column loop counter */
emilmont 1:fdd22bb7aa52 174 col = nColumns;
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 while(col > 0u)
emilmont 1:fdd22bb7aa52 177 {
emilmont 1:fdd22bb7aa52 178 /* Read and store the input element in the destination */
emilmont 1:fdd22bb7aa52 179 *px = *pIn++;
emilmont 1:fdd22bb7aa52 180
emilmont 1:fdd22bb7aa52 181 /* Update the pointer px to point to the next row of the transposed matrix */
emilmont 1:fdd22bb7aa52 182 px += nRows;
emilmont 1:fdd22bb7aa52 183
emilmont 1:fdd22bb7aa52 184 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 185 col--;
emilmont 1:fdd22bb7aa52 186 }
emilmont 1:fdd22bb7aa52 187
emilmont 1:fdd22bb7aa52 188 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 189
emilmont 1:fdd22bb7aa52 190 i++;
emilmont 1:fdd22bb7aa52 191
emilmont 1:fdd22bb7aa52 192 /* Decrement the row loop counter */
emilmont 1:fdd22bb7aa52 193 row--;
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 }
emilmont 1:fdd22bb7aa52 196 while(row > 0u); /* row loop end */
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 /* set status as ARM_MATH_SUCCESS */
emilmont 1:fdd22bb7aa52 199 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 200 }
emilmont 1:fdd22bb7aa52 201
emilmont 1:fdd22bb7aa52 202 /* Return to application */
emilmont 1:fdd22bb7aa52 203 return (status);
emilmont 1:fdd22bb7aa52 204 }
emilmont 1:fdd22bb7aa52 205
emilmont 1:fdd22bb7aa52 206 /**
emilmont 1:fdd22bb7aa52 207 * @} end of MatrixTrans group
emilmont 1:fdd22bb7aa52 208 */