Renesas / mbed-dsp-neon

Fork of mbed-dsp. CMSIS-DSP library of supporting NEON

Dependents:   mbed-os-example-cmsis_dsp_neon

Fork of mbed-dsp by mbed official

Information

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CMSIS-DSP of supporting NEON

What is this ?

A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.

Library Creation environment

CMSIS-DSP library of supporting NEON was created by the following environment.

  • Compiler
    ARMCC Version 5.03
  • Compile option switch[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • Compile option switch[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


Effects of NEON support

In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.


NEON対応CMSIS-DSP

概要

NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。

ライブラリ作成環境

NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。

  • コンパイラ
    ARMCC Version 5.03
  • コンパイルオプションスイッチ[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • コンパイルオプションスイッチ[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


NEON対応による効果について

CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。


cmsis_dsp/MatrixFunctions/arm_mat_sub_q15.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_mat_sub_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q15 Matrix subtraction
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.5 2010/04/26
emilmont 1:fdd22bb7aa52 33 * incorporated review comments and updated with latest CMSIS layer
emilmont 1:fdd22bb7aa52 34 *
emilmont 1:fdd22bb7aa52 35 * Version 0.0.3 2010/03/10
emilmont 1:fdd22bb7aa52 36 * Initial version
emilmont 1:fdd22bb7aa52 37 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 /**
emilmont 1:fdd22bb7aa52 42 * @ingroup groupMatrix
emilmont 1:fdd22bb7aa52 43 */
emilmont 1:fdd22bb7aa52 44
emilmont 1:fdd22bb7aa52 45 /**
emilmont 1:fdd22bb7aa52 46 * @addtogroup MatrixSub
emilmont 1:fdd22bb7aa52 47 * @{
emilmont 1:fdd22bb7aa52 48 */
emilmont 1:fdd22bb7aa52 49
emilmont 1:fdd22bb7aa52 50 /**
emilmont 1:fdd22bb7aa52 51 * @brief Q15 matrix subtraction.
emilmont 1:fdd22bb7aa52 52 * @param[in] *pSrcA points to the first input matrix structure
emilmont 1:fdd22bb7aa52 53 * @param[in] *pSrcB points to the second input matrix structure
emilmont 1:fdd22bb7aa52 54 * @param[out] *pDst points to output matrix structure
emilmont 2:da51fb522205 55 * @return The function returns either
emilmont 1:fdd22bb7aa52 56 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emilmont 1:fdd22bb7aa52 57 *
emilmont 1:fdd22bb7aa52 58 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 59 * \par
emilmont 1:fdd22bb7aa52 60 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 61 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
emilmont 1:fdd22bb7aa52 62 */
emilmont 1:fdd22bb7aa52 63
emilmont 1:fdd22bb7aa52 64 arm_status arm_mat_sub_q15(
emilmont 1:fdd22bb7aa52 65 const arm_matrix_instance_q15 * pSrcA,
emilmont 1:fdd22bb7aa52 66 const arm_matrix_instance_q15 * pSrcB,
emilmont 1:fdd22bb7aa52 67 arm_matrix_instance_q15 * pDst)
emilmont 1:fdd22bb7aa52 68 {
emilmont 1:fdd22bb7aa52 69 q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 70 q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 71 q15_t *pOut = pDst->pData; /* output data matrix pointer */
emilmont 1:fdd22bb7aa52 72 uint32_t numSamples; /* total number of elements in the matrix */
emilmont 1:fdd22bb7aa52 73 uint32_t blkCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 74 arm_status status; /* status of matrix subtraction */
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 78
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 81 if((pSrcA->numRows != pSrcB->numRows) ||
emilmont 1:fdd22bb7aa52 82 (pSrcA->numCols != pSrcB->numCols) ||
emilmont 1:fdd22bb7aa52 83 (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
emilmont 1:fdd22bb7aa52 84 {
emilmont 1:fdd22bb7aa52 85 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 86 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 87 }
emilmont 1:fdd22bb7aa52 88 else
emilmont 1:fdd22bb7aa52 89 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 {
emilmont 1:fdd22bb7aa52 92 /* Total number of samples in the input matrix */
emilmont 1:fdd22bb7aa52 93 numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* Apply loop unrolling */
emilmont 1:fdd22bb7aa52 100 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 103 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 104 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 105 {
emilmont 1:fdd22bb7aa52 106 /* C(m,n) = A(m,n) - B(m,n) */
emilmont 1:fdd22bb7aa52 107 /* Subtract, Saturate and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 108 *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
emilmont 1:fdd22bb7aa52 109 *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 112 blkCnt--;
emilmont 1:fdd22bb7aa52 113 }
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 116 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 117 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 118
emilmont 1:fdd22bb7aa52 119 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 120 {
emilmont 1:fdd22bb7aa52 121 /* C(m,n) = A(m,n) - B(m,n) */
emilmont 1:fdd22bb7aa52 122 /* Subtract and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 123 *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 126 blkCnt--;
emilmont 1:fdd22bb7aa52 127 }
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 #else
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 134 blkCnt = numSamples;
emilmont 1:fdd22bb7aa52 135
emilmont 1:fdd22bb7aa52 136 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 137 {
emilmont 1:fdd22bb7aa52 138 /* C(m,n) = A(m,n) - B(m,n) */
emilmont 1:fdd22bb7aa52 139 /* Subtract and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 140 *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
emilmont 1:fdd22bb7aa52 141
emilmont 1:fdd22bb7aa52 142 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 143 blkCnt--;
emilmont 1:fdd22bb7aa52 144 }
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 /* Set status as ARM_MATH_SUCCESS */
emilmont 1:fdd22bb7aa52 149 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 150 }
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 /* Return to application */
emilmont 1:fdd22bb7aa52 153 return (status);
emilmont 1:fdd22bb7aa52 154 }
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 /**
emilmont 1:fdd22bb7aa52 157 * @} end of MatrixSub group
emilmont 1:fdd22bb7aa52 158 */