Renesas / mbed-dsp-neon

Fork of mbed-dsp. CMSIS-DSP library of supporting NEON

Dependents:   mbed-os-example-cmsis_dsp_neon

Fork of mbed-dsp by mbed official

Information

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CMSIS-DSP of supporting NEON

What is this ?

A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.

Library Creation environment

CMSIS-DSP library of supporting NEON was created by the following environment.

  • Compiler
    ARMCC Version 5.03
  • Compile option switch[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • Compile option switch[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


Effects of NEON support

In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.


NEON対応CMSIS-DSP

概要

NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。

ライブラリ作成環境

NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。

  • コンパイラ
    ARMCC Version 5.03
  • コンパイルオプションスイッチ[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • コンパイルオプションスイッチ[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


NEON対応による効果について

CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。


cmsis_dsp/BasicMathFunctions/arm_add_f32.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_add_f32.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Floating-point vector addition.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @defgroup BasicAdd Vector Addition
emilmont 1:fdd22bb7aa52 44 *
emilmont 1:fdd22bb7aa52 45 * Element-by-element addition of two vectors.
emilmont 1:fdd22bb7aa52 46 *
emilmont 1:fdd22bb7aa52 47 * <pre>
emilmont 1:fdd22bb7aa52 48 * pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
emilmont 1:fdd22bb7aa52 49 * </pre>
emilmont 1:fdd22bb7aa52 50 *
emilmont 1:fdd22bb7aa52 51 * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
emilmont 1:fdd22bb7aa52 52 */
emilmont 1:fdd22bb7aa52 53
emilmont 1:fdd22bb7aa52 54 /**
emilmont 1:fdd22bb7aa52 55 * @addtogroup BasicAdd
emilmont 1:fdd22bb7aa52 56 * @{
emilmont 1:fdd22bb7aa52 57 */
emilmont 1:fdd22bb7aa52 58
emilmont 1:fdd22bb7aa52 59 /**
emilmont 1:fdd22bb7aa52 60 * @brief Floating-point vector addition.
emilmont 1:fdd22bb7aa52 61 * @param[in] *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 62 * @param[in] *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 63 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 64 * @param[in] blockSize number of samples in each vector
emilmont 1:fdd22bb7aa52 65 * @return none.
emilmont 1:fdd22bb7aa52 66 */
emilmont 1:fdd22bb7aa52 67
emilmont 1:fdd22bb7aa52 68 void arm_add_f32(
emilmont 1:fdd22bb7aa52 69 float32_t * pSrcA,
emilmont 1:fdd22bb7aa52 70 float32_t * pSrcB,
emilmont 1:fdd22bb7aa52 71 float32_t * pDst,
emilmont 1:fdd22bb7aa52 72 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 73 {
emilmont 1:fdd22bb7aa52 74 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 79 float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */
emilmont 1:fdd22bb7aa52 80 float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
emilmont 1:fdd22bb7aa52 81
emilmont 1:fdd22bb7aa52 82 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 83 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 86 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 87 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 88 {
emilmont 1:fdd22bb7aa52 89 /* C = A + B */
emilmont 1:fdd22bb7aa52 90 /* Add and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 91
emilmont 1:fdd22bb7aa52 92 /* read four inputs from sourceA and four inputs from sourceB */
emilmont 1:fdd22bb7aa52 93 inA1 = *pSrcA;
emilmont 1:fdd22bb7aa52 94 inB1 = *pSrcB;
emilmont 1:fdd22bb7aa52 95 inA2 = *(pSrcA + 1);
emilmont 1:fdd22bb7aa52 96 inB2 = *(pSrcB + 1);
emilmont 1:fdd22bb7aa52 97 inA3 = *(pSrcA + 2);
emilmont 1:fdd22bb7aa52 98 inB3 = *(pSrcB + 2);
emilmont 1:fdd22bb7aa52 99 inA4 = *(pSrcA + 3);
emilmont 1:fdd22bb7aa52 100 inB4 = *(pSrcB + 3);
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* C = A + B */
emilmont 1:fdd22bb7aa52 103 /* add and store result to destination */
emilmont 1:fdd22bb7aa52 104 *pDst = inA1 + inB1;
emilmont 1:fdd22bb7aa52 105 *(pDst + 1) = inA2 + inB2;
emilmont 1:fdd22bb7aa52 106 *(pDst + 2) = inA3 + inB3;
emilmont 1:fdd22bb7aa52 107 *(pDst + 3) = inA4 + inB4;
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 /* update pointers to process next samples */
emilmont 1:fdd22bb7aa52 110 pSrcA += 4u;
emilmont 1:fdd22bb7aa52 111 pSrcB += 4u;
emilmont 1:fdd22bb7aa52 112 pDst += 4u;
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 116 blkCnt--;
emilmont 1:fdd22bb7aa52 117 }
emilmont 1:fdd22bb7aa52 118
emilmont 1:fdd22bb7aa52 119 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 120 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 121 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 #else
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 128 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 133 {
emilmont 1:fdd22bb7aa52 134 /* C = A + B */
emilmont 1:fdd22bb7aa52 135 /* Add and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 136 *pDst++ = (*pSrcA++) + (*pSrcB++);
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 139 blkCnt--;
emilmont 1:fdd22bb7aa52 140 }
emilmont 1:fdd22bb7aa52 141 }
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143 /**
emilmont 1:fdd22bb7aa52 144 * @} end of BasicAdd group
emilmont 1:fdd22bb7aa52 145 */