Fork of mbed-dsp. CMSIS-DSP library of supporting NEON
Dependents: mbed-os-example-cmsis_dsp_neon
Fork of mbed-dsp by
Information
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このページの後半に日本語版が用意されています.
CMSIS-DSP of supporting NEON
What is this ?
A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.
Library Creation environment
CMSIS-DSP library of supporting NEON was created by the following environment.
- Compiler
ARMCC Version 5.03 - Compile option switch[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- Compile option switch[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
Effects of NEON support
In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.
NEON対応CMSIS-DSP
概要
NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。
ライブラリ作成環境
NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。
- コンパイラ
ARMCC Version 5.03 - コンパイルオプションスイッチ[C Compiler]
-DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp --vectorize --asm
- コンパイルオプションスイッチ[Assembler]
--cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp
NEON対応による効果について
CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。
cmsis_dsp/StatisticsFunctions/arm_min_q7.c@3:7a284390b0ce, 2013-11-08 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 08 13:45:10 2013 +0000
- Revision:
- 3:7a284390b0ce
- Parent:
- 2:da51fb522205
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- |
mbed_official | 3:7a284390b0ce | 2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved. |
emilmont | 1:fdd22bb7aa52 | 3 | * |
mbed_official | 3:7a284390b0ce | 4 | * $Date: 17. January 2013 |
mbed_official | 3:7a284390b0ce | 5 | * $Revision: V1.4.1 |
emilmont | 1:fdd22bb7aa52 | 6 | * |
emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library |
emilmont | 2:da51fb522205 | 8 | * Title: arm_min_q7.c |
emilmont | 1:fdd22bb7aa52 | 9 | * |
emilmont | 2:da51fb522205 | 10 | * Description: Minimum value of a Q7 vector. |
emilmont | 1:fdd22bb7aa52 | 11 | * |
emilmont | 1:fdd22bb7aa52 | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
emilmont | 1:fdd22bb7aa52 | 13 | * |
mbed_official | 3:7a284390b0ce | 14 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 3:7a284390b0ce | 15 | * modification, are permitted provided that the following conditions |
mbed_official | 3:7a284390b0ce | 16 | * are met: |
mbed_official | 3:7a284390b0ce | 17 | * - Redistributions of source code must retain the above copyright |
mbed_official | 3:7a284390b0ce | 18 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 3:7a284390b0ce | 19 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 3:7a284390b0ce | 20 | * notice, this list of conditions and the following disclaimer in |
mbed_official | 3:7a284390b0ce | 21 | * the documentation and/or other materials provided with the |
mbed_official | 3:7a284390b0ce | 22 | * distribution. |
mbed_official | 3:7a284390b0ce | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
mbed_official | 3:7a284390b0ce | 24 | * may be used to endorse or promote products derived from this |
mbed_official | 3:7a284390b0ce | 25 | * software without specific prior written permission. |
mbed_official | 3:7a284390b0ce | 26 | * |
mbed_official | 3:7a284390b0ce | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
mbed_official | 3:7a284390b0ce | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
mbed_official | 3:7a284390b0ce | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
mbed_official | 3:7a284390b0ce | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
mbed_official | 3:7a284390b0ce | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
mbed_official | 3:7a284390b0ce | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
mbed_official | 3:7a284390b0ce | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
mbed_official | 3:7a284390b0ce | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 3:7a284390b0ce | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
mbed_official | 3:7a284390b0ce | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
mbed_official | 3:7a284390b0ce | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 3:7a284390b0ce | 38 | * POSSIBILITY OF SUCH DAMAGE. |
emilmont | 1:fdd22bb7aa52 | 39 | * ---------------------------------------------------------------------------- */ |
emilmont | 1:fdd22bb7aa52 | 40 | |
emilmont | 1:fdd22bb7aa52 | 41 | #include "arm_math.h" |
emilmont | 1:fdd22bb7aa52 | 42 | |
emilmont | 1:fdd22bb7aa52 | 43 | /** |
emilmont | 1:fdd22bb7aa52 | 44 | * @ingroup groupStats |
emilmont | 1:fdd22bb7aa52 | 45 | */ |
emilmont | 1:fdd22bb7aa52 | 46 | |
emilmont | 1:fdd22bb7aa52 | 47 | /** |
emilmont | 1:fdd22bb7aa52 | 48 | * @addtogroup Min |
emilmont | 1:fdd22bb7aa52 | 49 | * @{ |
emilmont | 1:fdd22bb7aa52 | 50 | */ |
emilmont | 1:fdd22bb7aa52 | 51 | |
emilmont | 1:fdd22bb7aa52 | 52 | |
emilmont | 1:fdd22bb7aa52 | 53 | /** |
emilmont | 1:fdd22bb7aa52 | 54 | * @brief Minimum value of a Q7 vector. |
emilmont | 1:fdd22bb7aa52 | 55 | * @param[in] *pSrc points to the input vector |
emilmont | 1:fdd22bb7aa52 | 56 | * @param[in] blockSize length of the input vector |
emilmont | 1:fdd22bb7aa52 | 57 | * @param[out] *pResult minimum value returned here |
emilmont | 1:fdd22bb7aa52 | 58 | * @param[out] *pIndex index of minimum value returned here |
emilmont | 1:fdd22bb7aa52 | 59 | * @return none. |
emilmont | 1:fdd22bb7aa52 | 60 | * |
emilmont | 1:fdd22bb7aa52 | 61 | */ |
emilmont | 1:fdd22bb7aa52 | 62 | |
emilmont | 1:fdd22bb7aa52 | 63 | void arm_min_q7( |
emilmont | 1:fdd22bb7aa52 | 64 | q7_t * pSrc, |
emilmont | 1:fdd22bb7aa52 | 65 | uint32_t blockSize, |
emilmont | 1:fdd22bb7aa52 | 66 | q7_t * pResult, |
emilmont | 1:fdd22bb7aa52 | 67 | uint32_t * pIndex) |
emilmont | 1:fdd22bb7aa52 | 68 | { |
mbed_official | 3:7a284390b0ce | 69 | #ifndef ARM_MATH_CM0_FAMILY |
emilmont | 1:fdd22bb7aa52 | 70 | |
emilmont | 1:fdd22bb7aa52 | 71 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
emilmont | 1:fdd22bb7aa52 | 72 | |
emilmont | 1:fdd22bb7aa52 | 73 | q7_t minVal1, minVal2, out; /* Temporary variables to store the output value. */ |
emilmont | 1:fdd22bb7aa52 | 74 | uint32_t blkCnt, outIndex, count; /* loop counter */ |
emilmont | 1:fdd22bb7aa52 | 75 | |
emilmont | 1:fdd22bb7aa52 | 76 | /* Initialise the count value. */ |
emilmont | 1:fdd22bb7aa52 | 77 | count = 0u; |
emilmont | 1:fdd22bb7aa52 | 78 | /* Initialise the index value to zero. */ |
emilmont | 1:fdd22bb7aa52 | 79 | outIndex = 0u; |
emilmont | 1:fdd22bb7aa52 | 80 | /* Load first input value that act as reference value for comparision */ |
emilmont | 1:fdd22bb7aa52 | 81 | out = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 82 | |
emilmont | 1:fdd22bb7aa52 | 83 | /* Loop unrolling */ |
emilmont | 1:fdd22bb7aa52 | 84 | blkCnt = (blockSize - 1u) >> 2u; |
emilmont | 1:fdd22bb7aa52 | 85 | |
emilmont | 1:fdd22bb7aa52 | 86 | while(blkCnt > 0) |
emilmont | 1:fdd22bb7aa52 | 87 | { |
emilmont | 1:fdd22bb7aa52 | 88 | /* Initialize minVal to the next consecutive values one by one */ |
emilmont | 1:fdd22bb7aa52 | 89 | minVal1 = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 90 | minVal2 = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 91 | |
emilmont | 1:fdd22bb7aa52 | 92 | /* compare for the minimum value */ |
emilmont | 1:fdd22bb7aa52 | 93 | if(out > minVal1) |
emilmont | 1:fdd22bb7aa52 | 94 | { |
emilmont | 1:fdd22bb7aa52 | 95 | /* Update the minimum value and its index */ |
emilmont | 1:fdd22bb7aa52 | 96 | out = minVal1; |
emilmont | 1:fdd22bb7aa52 | 97 | outIndex = count + 1u; |
emilmont | 1:fdd22bb7aa52 | 98 | } |
emilmont | 1:fdd22bb7aa52 | 99 | |
emilmont | 1:fdd22bb7aa52 | 100 | minVal1 = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 101 | |
emilmont | 1:fdd22bb7aa52 | 102 | /* compare for the minimum value */ |
emilmont | 1:fdd22bb7aa52 | 103 | if(out > minVal2) |
emilmont | 1:fdd22bb7aa52 | 104 | { |
emilmont | 1:fdd22bb7aa52 | 105 | /* Update the minimum value and its index */ |
emilmont | 1:fdd22bb7aa52 | 106 | out = minVal2; |
emilmont | 1:fdd22bb7aa52 | 107 | outIndex = count + 2u; |
emilmont | 1:fdd22bb7aa52 | 108 | } |
emilmont | 1:fdd22bb7aa52 | 109 | |
emilmont | 1:fdd22bb7aa52 | 110 | minVal2 = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 111 | |
emilmont | 1:fdd22bb7aa52 | 112 | /* compare for the minimum value */ |
emilmont | 1:fdd22bb7aa52 | 113 | if(out > minVal1) |
emilmont | 1:fdd22bb7aa52 | 114 | { |
emilmont | 1:fdd22bb7aa52 | 115 | /* Update the minimum value and its index */ |
emilmont | 1:fdd22bb7aa52 | 116 | out = minVal1; |
emilmont | 1:fdd22bb7aa52 | 117 | outIndex = count + 3u; |
emilmont | 1:fdd22bb7aa52 | 118 | } |
emilmont | 1:fdd22bb7aa52 | 119 | |
emilmont | 1:fdd22bb7aa52 | 120 | /* compare for the minimum value */ |
emilmont | 1:fdd22bb7aa52 | 121 | if(out > minVal2) |
emilmont | 1:fdd22bb7aa52 | 122 | { |
emilmont | 1:fdd22bb7aa52 | 123 | /* Update the minimum value and its index */ |
emilmont | 1:fdd22bb7aa52 | 124 | out = minVal2; |
emilmont | 1:fdd22bb7aa52 | 125 | outIndex = count + 4u; |
emilmont | 1:fdd22bb7aa52 | 126 | } |
emilmont | 1:fdd22bb7aa52 | 127 | |
emilmont | 1:fdd22bb7aa52 | 128 | count += 4u; |
emilmont | 1:fdd22bb7aa52 | 129 | |
emilmont | 1:fdd22bb7aa52 | 130 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 131 | } |
emilmont | 1:fdd22bb7aa52 | 132 | |
emilmont | 1:fdd22bb7aa52 | 133 | /* if (blockSize - 1u ) is not multiple of 4 */ |
emilmont | 1:fdd22bb7aa52 | 134 | blkCnt = (blockSize - 1u) % 4u; |
emilmont | 1:fdd22bb7aa52 | 135 | |
emilmont | 1:fdd22bb7aa52 | 136 | #else |
emilmont | 1:fdd22bb7aa52 | 137 | |
emilmont | 1:fdd22bb7aa52 | 138 | /* Run the below code for Cortex-M0 */ |
emilmont | 1:fdd22bb7aa52 | 139 | |
emilmont | 1:fdd22bb7aa52 | 140 | q7_t minVal1, out; /* Temporary variables to store the output value. */ |
emilmont | 1:fdd22bb7aa52 | 141 | uint32_t blkCnt, outIndex; /* loop counter */ |
emilmont | 1:fdd22bb7aa52 | 142 | |
emilmont | 1:fdd22bb7aa52 | 143 | /* Initialise the index value to zero. */ |
emilmont | 1:fdd22bb7aa52 | 144 | outIndex = 0u; |
emilmont | 1:fdd22bb7aa52 | 145 | /* Load first input value that act as reference value for comparision */ |
emilmont | 1:fdd22bb7aa52 | 146 | out = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 147 | |
emilmont | 1:fdd22bb7aa52 | 148 | blkCnt = (blockSize - 1u); |
emilmont | 1:fdd22bb7aa52 | 149 | |
mbed_official | 3:7a284390b0ce | 150 | #endif // #ifndef ARM_MATH_CM0_FAMILY |
emilmont | 1:fdd22bb7aa52 | 151 | |
emilmont | 1:fdd22bb7aa52 | 152 | while(blkCnt > 0) |
emilmont | 1:fdd22bb7aa52 | 153 | { |
emilmont | 1:fdd22bb7aa52 | 154 | /* Initialize minVal to the next consecutive values one by one */ |
emilmont | 1:fdd22bb7aa52 | 155 | minVal1 = *pSrc++; |
emilmont | 1:fdd22bb7aa52 | 156 | |
emilmont | 1:fdd22bb7aa52 | 157 | /* compare for the minimum value */ |
emilmont | 1:fdd22bb7aa52 | 158 | if(out > minVal1) |
emilmont | 1:fdd22bb7aa52 | 159 | { |
emilmont | 1:fdd22bb7aa52 | 160 | /* Update the minimum value and it's index */ |
emilmont | 1:fdd22bb7aa52 | 161 | out = minVal1; |
emilmont | 1:fdd22bb7aa52 | 162 | outIndex = blockSize - blkCnt; |
emilmont | 1:fdd22bb7aa52 | 163 | } |
emilmont | 1:fdd22bb7aa52 | 164 | |
emilmont | 1:fdd22bb7aa52 | 165 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 166 | |
emilmont | 1:fdd22bb7aa52 | 167 | } |
emilmont | 1:fdd22bb7aa52 | 168 | |
emilmont | 1:fdd22bb7aa52 | 169 | /* Store the minimum value and its index into destination pointers */ |
emilmont | 1:fdd22bb7aa52 | 170 | *pResult = out; |
emilmont | 1:fdd22bb7aa52 | 171 | *pIndex = outIndex; |
emilmont | 1:fdd22bb7aa52 | 172 | |
emilmont | 1:fdd22bb7aa52 | 173 | |
emilmont | 1:fdd22bb7aa52 | 174 | } |
emilmont | 1:fdd22bb7aa52 | 175 | |
emilmont | 1:fdd22bb7aa52 | 176 | /** |
emilmont | 1:fdd22bb7aa52 | 177 | * @} end of Min group |
emilmont | 1:fdd22bb7aa52 | 178 | */ |