Renesas / mbed-dsp-neon

Fork of mbed-dsp. CMSIS-DSP library of supporting NEON

Dependents:   mbed-os-example-cmsis_dsp_neon

Fork of mbed-dsp by mbed official

Information

Japanese version is available in lower part of this page.
このページの後半に日本語版が用意されています．

CMSIS-DSP of supporting NEON

What is this ?

A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.

Library Creation environment

CMSIS-DSP library of supporting NEON was created by the following environment.

  • Compiler
    ARMCC Version 5.03
  • Compile option switch[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • Compile option switch[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


Effects of NEON support

In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.


NEON対応CMSIS-DSP

概要

NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。

ライブラリ作成環境

NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。

  • コンパイラ
    ARMCC Version 5.03
  • コンパイルオプションスイッチ[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • コンパイルオプションスイッチ[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


NEON対応による効果について

CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。


cmsis_dsp/MatrixFunctions/arm_mat_mult_q31.c@3:7a284390b0ce, 2013-11-08 (annotated)

Committer:
mbed_official
Date:
Fri Nov 08 13:45:10 2013 +0000
Revision:
3:7a284390b0ce
Parent:
2:da51fb522205 
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_mat_mult_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 matrix multiplication.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMatrix
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup MatrixMult
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Q31 matrix multiplication
emilmont 1:fdd22bb7aa52 54 * @param[in] *pSrcA points to the first input matrix structure
emilmont 1:fdd22bb7aa52 55 * @param[in] *pSrcB points to the second input matrix structure
emilmont 1:fdd22bb7aa52 56 * @param[out] *pDst points to output matrix structure
emilmont 2:da51fb522205 57 * @return The function returns either
emilmont 1:fdd22bb7aa52 58 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 * @details
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 *
emilmont 1:fdd22bb7aa52 63 * \par
emilmont 1:fdd22bb7aa52 64 * The function is implemented using an internal 64-bit accumulator.
emilmont 1:fdd22bb7aa52 65 * The accumulator has a 2.62 format and maintains full precision of the intermediate
emilmont 1:fdd22bb7aa52 66 * multiplication results but provides only a single guard bit. There is no saturation
emilmont 1:fdd22bb7aa52 67 * on intermediate additions. Thus, if the accumulator overflows it wraps around and
emilmont 1:fdd22bb7aa52 68 * distorts the result. The input signals should be scaled down to avoid intermediate
emilmont 1:fdd22bb7aa52 69 * overflows. The input is thus scaled down by log2(numColsA) bits
emilmont 1:fdd22bb7aa52 70 * to avoid overflows, as a total of numColsA additions are performed internally.
emilmont 1:fdd22bb7aa52 71 * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
emilmont 1:fdd22bb7aa52 72 *
emilmont 1:fdd22bb7aa52 73 * \par
emilmont 1:fdd22bb7aa52 74 * See <code>arm_mat_mult_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
emilmont 1:fdd22bb7aa52 75 *
emilmont 1:fdd22bb7aa52 76 */
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 arm_status arm_mat_mult_q31(
emilmont 1:fdd22bb7aa52 79 const arm_matrix_instance_q31 * pSrcA,
emilmont 1:fdd22bb7aa52 80 const arm_matrix_instance_q31 * pSrcB,
emilmont 1:fdd22bb7aa52 81 arm_matrix_instance_q31 * pDst)
emilmont 1:fdd22bb7aa52 82 {
emilmont 1:fdd22bb7aa52 83 q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 84 q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 85 q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 86 q31_t *pOut = pDst->pData; /* output data matrix pointer */
emilmont 1:fdd22bb7aa52 87 q31_t *px; /* Temporary output data matrix pointer */
emilmont 1:fdd22bb7aa52 88 q63_t sum; /* Accumulator */
emilmont 1:fdd22bb7aa52 89 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emilmont 1:fdd22bb7aa52 90 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emilmont 1:fdd22bb7aa52 91 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emilmont 1:fdd22bb7aa52 92
mbed_official 3:7a284390b0ce 93 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 98 arm_status status; /* status of matrix multiplication */
emilmont 1:fdd22bb7aa52 99 q31_t a0, a1, a2, a3, b0, b1, b2, b3;
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 105 if((pSrcA->numCols != pSrcB->numRows) ||
emilmont 1:fdd22bb7aa52 106 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emilmont 1:fdd22bb7aa52 107 {
emilmont 1:fdd22bb7aa52 108 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 109 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 110 }
emilmont 1:fdd22bb7aa52 111 else
emilmont 1:fdd22bb7aa52 112 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 {
emilmont 1:fdd22bb7aa52 115 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emilmont 1:fdd22bb7aa52 116 /* row loop */
emilmont 1:fdd22bb7aa52 117 do
emilmont 1:fdd22bb7aa52 118 {
emilmont 1:fdd22bb7aa52 119 /* Output pointer is set to starting address of the row being processed */
emilmont 1:fdd22bb7aa52 120 px = pOut + i;
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 /* For every row wise process, the column loop counter is to be initiated */
emilmont 1:fdd22bb7aa52 123 col = numColsB;
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* For every row wise process, the pIn2 pointer is set
emilmont 1:fdd22bb7aa52 126 ** to the starting address of the pSrcB data */
emilmont 1:fdd22bb7aa52 127 pIn2 = pSrcB->pData;
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 j = 0u;
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /* column loop */
emilmont 1:fdd22bb7aa52 132 do
emilmont 1:fdd22bb7aa52 133 {
emilmont 1:fdd22bb7aa52 134 /* Set the variable sum, that acts as accumulator, to zero */
emilmont 1:fdd22bb7aa52 135 sum = 0;
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 /* Initiate the pointer pIn1 to point to the starting address of pInA */
emilmont 1:fdd22bb7aa52 138 pIn1 = pInA;
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 /* Apply loop unrolling and compute 4 MACs simultaneously. */
emilmont 1:fdd22bb7aa52 141 colCnt = numColsA >> 2;
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 /* matrix multiplication */
emilmont 1:fdd22bb7aa52 145 while(colCnt > 0u)
emilmont 1:fdd22bb7aa52 146 {
emilmont 1:fdd22bb7aa52 147 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emilmont 1:fdd22bb7aa52 148 /* Perform the multiply-accumulates */
emilmont 1:fdd22bb7aa52 149 b0 = *pIn2;
emilmont 1:fdd22bb7aa52 150 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 a0 = *pIn1++;
emilmont 1:fdd22bb7aa52 153 a1 = *pIn1++;
emilmont 1:fdd22bb7aa52 154
emilmont 1:fdd22bb7aa52 155 b1 = *pIn2;
emilmont 1:fdd22bb7aa52 156 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 157 b2 = *pIn2;
emilmont 1:fdd22bb7aa52 158 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 159
emilmont 1:fdd22bb7aa52 160 sum += (q63_t) a0 *b0;
emilmont 1:fdd22bb7aa52 161 sum += (q63_t) a1 *b1;
emilmont 1:fdd22bb7aa52 162
emilmont 1:fdd22bb7aa52 163 a2 = *pIn1++;
emilmont 1:fdd22bb7aa52 164 a3 = *pIn1++;
emilmont 1:fdd22bb7aa52 165
emilmont 1:fdd22bb7aa52 166 b3 = *pIn2;
emilmont 1:fdd22bb7aa52 167 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 168
emilmont 1:fdd22bb7aa52 169 sum += (q63_t) a2 *b2;
emilmont 1:fdd22bb7aa52 170 sum += (q63_t) a3 *b3;
emilmont 1:fdd22bb7aa52 171
emilmont 1:fdd22bb7aa52 172 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 173 colCnt--;
emilmont 1:fdd22bb7aa52 174 }
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 177 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 178 colCnt = numColsA % 0x4u;
emilmont 1:fdd22bb7aa52 179
emilmont 1:fdd22bb7aa52 180 while(colCnt > 0u)
emilmont 1:fdd22bb7aa52 181 {
emilmont 1:fdd22bb7aa52 182 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emilmont 1:fdd22bb7aa52 183 /* Perform the multiply-accumulates */
emilmont 1:fdd22bb7aa52 184 sum += (q63_t) * pIn1++ * *pIn2;
emilmont 1:fdd22bb7aa52 185 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 186
emilmont 1:fdd22bb7aa52 187 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 188 colCnt--;
emilmont 1:fdd22bb7aa52 189 }
emilmont 1:fdd22bb7aa52 190
emilmont 1:fdd22bb7aa52 191 /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
emilmont 1:fdd22bb7aa52 192 *px++ = (q31_t) (sum >> 31);
emilmont 1:fdd22bb7aa52 193
emilmont 1:fdd22bb7aa52 194 /* Update the pointer pIn2 to point to the starting address of the next column */
emilmont 1:fdd22bb7aa52 195 j++;
emilmont 1:fdd22bb7aa52 196 pIn2 = (pSrcB->pData) + j;
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 199 col--;
emilmont 1:fdd22bb7aa52 200
emilmont 1:fdd22bb7aa52 201 } while(col > 0u);
emilmont 1:fdd22bb7aa52 202
emilmont 1:fdd22bb7aa52 203 #else
emilmont 1:fdd22bb7aa52 204
emilmont 1:fdd22bb7aa52 205 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 206
emilmont 1:fdd22bb7aa52 207 q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 208 uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 209 arm_status status; /* status of matrix multiplication */
emilmont 1:fdd22bb7aa52 210
emilmont 1:fdd22bb7aa52 211
emilmont 1:fdd22bb7aa52 212 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 213
emilmont 1:fdd22bb7aa52 214 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 215 if((pSrcA->numCols != pSrcB->numRows) ||
emilmont 1:fdd22bb7aa52 216 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emilmont 1:fdd22bb7aa52 217 {
emilmont 1:fdd22bb7aa52 218 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 219 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 220 }
emilmont 1:fdd22bb7aa52 221 else
emilmont 1:fdd22bb7aa52 222 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 223
emilmont 1:fdd22bb7aa52 224 {
emilmont 1:fdd22bb7aa52 225 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emilmont 1:fdd22bb7aa52 226 /* row loop */
emilmont 1:fdd22bb7aa52 227 do
emilmont 1:fdd22bb7aa52 228 {
emilmont 1:fdd22bb7aa52 229 /* Output pointer is set to starting address of the row being processed */
emilmont 1:fdd22bb7aa52 230 px = pOut + i;
emilmont 1:fdd22bb7aa52 231
emilmont 1:fdd22bb7aa52 232 /* For every row wise process, the column loop counter is to be initiated */
emilmont 1:fdd22bb7aa52 233 col = numColsB;
emilmont 1:fdd22bb7aa52 234
emilmont 1:fdd22bb7aa52 235 /* For every row wise process, the pIn2 pointer is set
emilmont 1:fdd22bb7aa52 236 ** to the starting address of the pSrcB data */
emilmont 1:fdd22bb7aa52 237 pIn2 = pSrcB->pData;
emilmont 1:fdd22bb7aa52 238
emilmont 1:fdd22bb7aa52 239 /* column loop */
emilmont 1:fdd22bb7aa52 240 do
emilmont 1:fdd22bb7aa52 241 {
emilmont 1:fdd22bb7aa52 242 /* Set the variable sum, that acts as accumulator, to zero */
emilmont 1:fdd22bb7aa52 243 sum = 0;
emilmont 1:fdd22bb7aa52 244
emilmont 1:fdd22bb7aa52 245 /* Initiate the pointer pIn1 to point to the starting address of pInA */
emilmont 1:fdd22bb7aa52 246 pIn1 = pInA;
emilmont 1:fdd22bb7aa52 247
emilmont 1:fdd22bb7aa52 248 /* Matrix A columns number of MAC operations are to be performed */
emilmont 1:fdd22bb7aa52 249 colCnt = numColsA;
emilmont 1:fdd22bb7aa52 250
emilmont 1:fdd22bb7aa52 251 /* matrix multiplication */
emilmont 1:fdd22bb7aa52 252 while(colCnt > 0u)
emilmont 1:fdd22bb7aa52 253 {
emilmont 1:fdd22bb7aa52 254 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emilmont 1:fdd22bb7aa52 255 /* Perform the multiply-accumulates */
emilmont 1:fdd22bb7aa52 256 sum += (q63_t) * pIn1++ * *pIn2;
emilmont 1:fdd22bb7aa52 257 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 258
emilmont 1:fdd22bb7aa52 259 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 260 colCnt--;
emilmont 1:fdd22bb7aa52 261 }
emilmont 1:fdd22bb7aa52 262
emilmont 1:fdd22bb7aa52 263 /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
emilmont 1:fdd22bb7aa52 264 *px++ = (q31_t) (sum >> 31);
emilmont 1:fdd22bb7aa52 265
emilmont 1:fdd22bb7aa52 266 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 267 col--;
emilmont 1:fdd22bb7aa52 268
emilmont 1:fdd22bb7aa52 269 /* Update the pointer pIn2 to point to the starting address of the next column */
emilmont 1:fdd22bb7aa52 270 pIn2 = pInB + (numColsB - col);
emilmont 1:fdd22bb7aa52 271
emilmont 1:fdd22bb7aa52 272 } while(col > 0u);
emilmont 1:fdd22bb7aa52 273
emilmont 1:fdd22bb7aa52 274 #endif
emilmont 1:fdd22bb7aa52 275
emilmont 1:fdd22bb7aa52 276 /* Update the pointer pInA to point to the starting address of the next row */
emilmont 1:fdd22bb7aa52 277 i = i + numColsB;
emilmont 1:fdd22bb7aa52 278 pInA = pInA + numColsA;
emilmont 1:fdd22bb7aa52 279
emilmont 1:fdd22bb7aa52 280 /* Decrement the row loop counter */
emilmont 1:fdd22bb7aa52 281 row--;
emilmont 1:fdd22bb7aa52 282
emilmont 1:fdd22bb7aa52 283 } while(row > 0u);
emilmont 1:fdd22bb7aa52 284
emilmont 1:fdd22bb7aa52 285 /* set status as ARM_MATH_SUCCESS */
emilmont 1:fdd22bb7aa52 286 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 287 }
emilmont 1:fdd22bb7aa52 288 /* Return to application */
emilmont 1:fdd22bb7aa52 289 return (status);
emilmont 1:fdd22bb7aa52 290 }
emilmont 1:fdd22bb7aa52 291
emilmont 1:fdd22bb7aa52 292 /**
emilmont 1:fdd22bb7aa52 293 * @} end of MatrixMult group
emilmont 1:fdd22bb7aa52 294 */