Renesas / mbed-dsp-neon

Fork of mbed-dsp. CMSIS-DSP library of supporting NEON

Dependents:   mbed-os-example-cmsis_dsp_neon

Fork of mbed-dsp by mbed official

Information

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CMSIS-DSP of supporting NEON

What is this ?

A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.

Library Creation environment

CMSIS-DSP library of supporting NEON was created by the following environment.

  • Compiler
    ARMCC Version 5.03
  • Compile option switch[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • Compile option switch[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


Effects of NEON support

In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.


NEON対応CMSIS-DSP

概要

NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。

ライブラリ作成環境

NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。

  • コンパイラ
    ARMCC Version 5.03
  • コンパイルオプションスイッチ[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • コンパイルオプションスイッチ[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


NEON対応による効果について

CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。


cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c@3:7a284390b0ce, 2013-11-08 (annotated)

Committer:
mbed_official
Date:
Fri Nov 08 13:45:10 2013 +0000
Revision:
3:7a284390b0ce
Parent:
2:da51fb522205 
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_mat_add_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q15 matrix addition
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMatrix
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup MatrixAdd
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Q15 matrix addition.
emilmont 1:fdd22bb7aa52 54 * @param[in] *pSrcA points to the first input matrix structure
emilmont 1:fdd22bb7aa52 55 * @param[in] *pSrcB points to the second input matrix structure
emilmont 1:fdd22bb7aa52 56 * @param[out] *pDst points to output matrix structure
emilmont 2:da51fb522205 57 * @return The function returns either
emilmont 1:fdd22bb7aa52 58 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 61 * \par
emilmont 1:fdd22bb7aa52 62 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 63 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
emilmont 1:fdd22bb7aa52 64 */
emilmont 1:fdd22bb7aa52 65
emilmont 1:fdd22bb7aa52 66 arm_status arm_mat_add_q15(
emilmont 1:fdd22bb7aa52 67 const arm_matrix_instance_q15 * pSrcA,
emilmont 1:fdd22bb7aa52 68 const arm_matrix_instance_q15 * pSrcB,
emilmont 1:fdd22bb7aa52 69 arm_matrix_instance_q15 * pDst)
emilmont 1:fdd22bb7aa52 70 {
emilmont 1:fdd22bb7aa52 71 q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 72 q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 73 q15_t *pOut = pDst->pData; /* output data matrix pointer */
emilmont 1:fdd22bb7aa52 74 uint16_t numSamples; /* total number of elements in the matrix */
emilmont 1:fdd22bb7aa52 75 uint32_t blkCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 76 arm_status status; /* status of matrix addition */
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 82 if((pSrcA->numRows != pSrcB->numRows) ||
emilmont 1:fdd22bb7aa52 83 (pSrcA->numCols != pSrcB->numCols) ||
emilmont 1:fdd22bb7aa52 84 (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
emilmont 1:fdd22bb7aa52 85 {
emilmont 1:fdd22bb7aa52 86 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 87 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 88 }
emilmont 1:fdd22bb7aa52 89 else
emilmont 1:fdd22bb7aa52 90 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 91
emilmont 1:fdd22bb7aa52 92 {
emilmont 1:fdd22bb7aa52 93 /* Total number of samples in the input matrix */
emilmont 1:fdd22bb7aa52 94 numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
emilmont 1:fdd22bb7aa52 95
mbed_official 3:7a284390b0ce 96 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Loop unrolling */
emilmont 1:fdd22bb7aa52 101 blkCnt = (uint32_t) numSamples >> 2u;
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 104 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 105 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 106 {
emilmont 1:fdd22bb7aa52 107 /* C(m,n) = A(m,n) + B(m,n) */
emilmont 1:fdd22bb7aa52 108 /* Add, Saturate and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 109 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
emilmont 1:fdd22bb7aa52 110 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 113 blkCnt--;
emilmont 1:fdd22bb7aa52 114 }
emilmont 1:fdd22bb7aa52 115
emilmont 1:fdd22bb7aa52 116 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 117 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 118 blkCnt = (uint32_t) numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* q15 pointers of input and output are initialized */
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 123 {
emilmont 1:fdd22bb7aa52 124 /* C(m,n) = A(m,n) + B(m,n) */
emilmont 1:fdd22bb7aa52 125 /* Add, Saturate and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 126 *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 129 blkCnt--;
emilmont 1:fdd22bb7aa52 130 }
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 #else
emilmont 1:fdd22bb7aa52 133
emilmont 1:fdd22bb7aa52 134 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 135
emilmont 1:fdd22bb7aa52 136 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 137 blkCnt = (uint32_t) numSamples;
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 /* q15 pointers of input and output are initialized */
emilmont 1:fdd22bb7aa52 141 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 142 {
emilmont 1:fdd22bb7aa52 143 /* C(m,n) = A(m,n) + B(m,n) */
emilmont 1:fdd22bb7aa52 144 /* Add, Saturate and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 145 *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 148 blkCnt--;
emilmont 1:fdd22bb7aa52 149 }
emilmont 1:fdd22bb7aa52 150
mbed_official 3:7a284390b0ce 151 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153 /* set status as ARM_MATH_SUCCESS */
emilmont 1:fdd22bb7aa52 154 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 155 }
emilmont 1:fdd22bb7aa52 156
emilmont 1:fdd22bb7aa52 157 /* Return to application */
emilmont 1:fdd22bb7aa52 158 return (status);
emilmont 1:fdd22bb7aa52 159 }
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161 /**
emilmont 1:fdd22bb7aa52 162 * @} end of MatrixAdd group
emilmont 1:fdd22bb7aa52 163 */