Renesas / mbed-dsp-neon

Fork of mbed-dsp. CMSIS-DSP library of supporting NEON

Dependents:   mbed-os-example-cmsis_dsp_neon

Fork of mbed-dsp by mbed official

Information

Japanese version is available in lower part of this page.
このページの後半に日本語版が用意されています．

CMSIS-DSP of supporting NEON

What is this ?

A library for CMSIS-DSP of supporting NEON.
We supported the NEON to CMSIS-DSP Ver1.4.3(CMSIS V4.1) that ARM supplied, has achieved the processing speed improvement.
If you use the mbed-dsp library, you can use to replace this library.
CMSIS-DSP of supporting NEON is provied as a library.

Library Creation environment

CMSIS-DSP library of supporting NEON was created by the following environment.

  • Compiler
    ARMCC Version 5.03
  • Compile option switch[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • Compile option switch[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


Effects of NEON support

In the data which passes to each function, large size will be expected more effective than small size.
Also if the data is a multiple of 16, effect will be expected in every function in the CMSIS-DSP.


NEON対応CMSIS-DSP

概要

NEON対応したCMSIS-DSPのライブラリです。
ARM社提供のCMSIS-DSP Ver1.4.3(CMSIS V4.1)をターゲットにNEON対応を行ない、処理速度向上を実現しております。
mbed-dspライブラリを使用している場合は、本ライブラリに置き換えて使用することができます。
NEON対応したCMSIS-DSPはライブラリで提供します。

ライブラリ作成環境

NEON対応CMSIS-DSPライブラリは、以下の環境で作成しています。

  • コンパイラ
    ARMCC Version 5.03
  • コンパイルオプションスイッチ[C Compiler]
   -DARM_MATH_MATRIX_CHECK -DARM_MATH_ROUNDING -O3 -Otime --cpu=Cortex-A9 --littleend --arm 
   --apcs=/interwork --no_unaligned_access --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp 
   --vectorize --asm
  • コンパイルオプションスイッチ[Assembler]
   --cpreproc --cpu=Cortex-A9 --littleend --arm --apcs=/interwork --no_unaligned_access 
   --fpu=vfpv3_fp16 --fpmode=fast --apcs=/hardfp


NEON対応による効果について

CMSIS-DSP内の各関数へ渡すデータは、小さいサイズよりも大きいサイズの方が効果が見込めます。
また、16の倍数のデータであれば、CMSIS-DSP内のどの関数でも効果が見込めます。


cmsis_dsp/BasicMathFunctions/arm_scale_f32.c@3:7a284390b0ce, 2013-11-08 (annotated)

Committer:
mbed_official
Date:
Fri Nov 08 13:45:10 2013 +0000
Revision:
3:7a284390b0ce
Parent:
2:da51fb522205 
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_scale_f32.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Multiplies a floating-point vector by a scalar.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @defgroup scale Vector Scale
emilmont 1:fdd22bb7aa52 49 *
emilmont 1:fdd22bb7aa52 50 * Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
emilmont 1:fdd22bb7aa52 51 *
emilmont 1:fdd22bb7aa52 52 * <pre>
emilmont 1:fdd22bb7aa52 53 * pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
emilmont 1:fdd22bb7aa52 54 * </pre>
emilmont 1:fdd22bb7aa52 55 *
emilmont 1:fdd22bb7aa52 56 * In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
emilmont 1:fdd22bb7aa52 57 * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
emilmont 1:fdd22bb7aa52 58 * The shift allows the gain of the scaling operation to exceed 1.0.
emilmont 1:fdd22bb7aa52 59 * The algorithm used with fixed-point data is:
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <pre>
emilmont 1:fdd22bb7aa52 62 * pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
emilmont 1:fdd22bb7aa52 63 * </pre>
emilmont 1:fdd22bb7aa52 64 *
emilmont 1:fdd22bb7aa52 65 * The overall scale factor applied to the fixed-point data is
emilmont 1:fdd22bb7aa52 66 * <pre>
emilmont 1:fdd22bb7aa52 67 * scale = scaleFract * 2^shift.
emilmont 1:fdd22bb7aa52 68 * </pre>
mbed_official 3:7a284390b0ce 69 *
mbed_official 3:7a284390b0ce 70 * The functions support in-place computation allowing the source and destination
mbed_official 3:7a284390b0ce 71 * pointers to reference the same memory buffer.
emilmont 1:fdd22bb7aa52 72 */
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74 /**
emilmont 1:fdd22bb7aa52 75 * @addtogroup scale
emilmont 1:fdd22bb7aa52 76 * @{
emilmont 1:fdd22bb7aa52 77 */
emilmont 1:fdd22bb7aa52 78
emilmont 1:fdd22bb7aa52 79 /**
emilmont 1:fdd22bb7aa52 80 * @brief Multiplies a floating-point vector by a scalar.
emilmont 1:fdd22bb7aa52 81 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 82 * @param[in] scale scale factor to be applied
emilmont 1:fdd22bb7aa52 83 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 84 * @param[in] blockSize number of samples in the vector
emilmont 1:fdd22bb7aa52 85 * @return none.
emilmont 1:fdd22bb7aa52 86 */
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 void arm_scale_f32(
emilmont 1:fdd22bb7aa52 90 float32_t * pSrc,
emilmont 1:fdd22bb7aa52 91 float32_t scale,
emilmont 1:fdd22bb7aa52 92 float32_t * pDst,
emilmont 1:fdd22bb7aa52 93 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 94 {
emilmont 1:fdd22bb7aa52 95 uint32_t blkCnt; /* loop counter */
mbed_official 3:7a284390b0ce 96 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 99 float32_t in1, in2, in3, in4; /* temporary variabels */
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 102 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 105 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 106 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 107 {
emilmont 1:fdd22bb7aa52 108 /* C = A * scale */
emilmont 1:fdd22bb7aa52 109 /* Scale the input and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 110 /* read input samples from source */
emilmont 1:fdd22bb7aa52 111 in1 = *pSrc;
emilmont 1:fdd22bb7aa52 112 in2 = *(pSrc + 1);
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* multiply with scaling factor */
emilmont 1:fdd22bb7aa52 115 in1 = in1 * scale;
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* read input sample from source */
emilmont 1:fdd22bb7aa52 118 in3 = *(pSrc + 2);
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* multiply with scaling factor */
emilmont 1:fdd22bb7aa52 121 in2 = in2 * scale;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* read input sample from source */
emilmont 1:fdd22bb7aa52 124 in4 = *(pSrc + 3);
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 /* multiply with scaling factor */
emilmont 1:fdd22bb7aa52 127 in3 = in3 * scale;
emilmont 1:fdd22bb7aa52 128 in4 = in4 * scale;
emilmont 1:fdd22bb7aa52 129 /* store the result to destination */
emilmont 1:fdd22bb7aa52 130 *pDst = in1;
emilmont 1:fdd22bb7aa52 131 *(pDst + 1) = in2;
emilmont 1:fdd22bb7aa52 132 *(pDst + 2) = in3;
emilmont 1:fdd22bb7aa52 133 *(pDst + 3) = in4;
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /* update pointers to process next samples */
emilmont 1:fdd22bb7aa52 136 pSrc += 4u;
emilmont 1:fdd22bb7aa52 137 pDst += 4u;
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 140 blkCnt--;
emilmont 1:fdd22bb7aa52 141 }
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 144 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 145 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147 #else
emilmont 1:fdd22bb7aa52 148
emilmont 1:fdd22bb7aa52 149 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 152 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 153
mbed_official 3:7a284390b0ce 154 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 157 {
emilmont 1:fdd22bb7aa52 158 /* C = A * scale */
emilmont 1:fdd22bb7aa52 159 /* Scale the input and then store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 160 *pDst++ = (*pSrc++) * scale;
emilmont 1:fdd22bb7aa52 161
emilmont 1:fdd22bb7aa52 162 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 163 blkCnt--;
emilmont 1:fdd22bb7aa52 164 }
emilmont 1:fdd22bb7aa52 165 }
emilmont 1:fdd22bb7aa52 166
emilmont 1:fdd22bb7aa52 167 /**
emilmont 1:fdd22bb7aa52 168 * @} end of scale group
emilmont 1:fdd22bb7aa52 169 */