RZ/A1H CMSIS-RTOS RTX BSP for GR-PEACH.

Dependents:   GR-PEACH_Azure_Speech ImageZoomInout_Sample ImageRotaion_Sample ImageScroll_Sample ... more

Fork of R_BSP by Daiki Kato

SSIF

The SSIF driver implements transmission and reception functionality which uses the SSIF in the RZ/A Series.

Hello World!

Import program

00001 #include "mbed.h"
00002 #include "R_BSP_Ssif.h"
00003 #include "sine_data_tbl.h"
00004 
00005 //I2S send only, The upper limit of write buffer is 8.
00006 R_BSP_Ssif ssif(P4_4, P4_5, P4_7, P4_6, 0x80, 8, 0);
00007 
00008 static void callback_ssif_write_end(void * p_data, int32_t result, void * p_app_data) {
00009     if (result < 0) {
00010         printf("ssif write callback error %d\n", result);
00011     }
00012 }
00013 
00014 int main() {
00015     rbsp_data_conf_t   ssif_write_end_conf = {&callback_ssif_write_end, NULL};
00016     ssif_channel_cfg_t ssif_cfg;
00017     int32_t            result;
00018 
00019     //I2S Master, 44.1kHz, 16bit, 2ch
00020     ssif_cfg.enabled                = true;
00021     ssif_cfg.int_level              = 0x78;
00022     ssif_cfg.slave_mode             = false;
00023     ssif_cfg.sample_freq            = 44100u;
00024     ssif_cfg.clk_select             = SSIF_CFG_CKS_AUDIO_X1;
00025     ssif_cfg.multi_ch               = SSIF_CFG_MULTI_CH_1;
00026     ssif_cfg.data_word              = SSIF_CFG_DATA_WORD_16;
00027     ssif_cfg.system_word            = SSIF_CFG_SYSTEM_WORD_32;
00028     ssif_cfg.bclk_pol               = SSIF_CFG_FALLING;
00029     ssif_cfg.ws_pol                 = SSIF_CFG_WS_LOW;
00030     ssif_cfg.padding_pol            = SSIF_CFG_PADDING_LOW;
00031     ssif_cfg.serial_alignment       = SSIF_CFG_DATA_FIRST;
00032     ssif_cfg.parallel_alignment     = SSIF_CFG_LEFT;
00033     ssif_cfg.ws_delay               = SSIF_CFG_DELAY;
00034     ssif_cfg.noise_cancel           = SSIF_CFG_DISABLE_NOISE_CANCEL;
00035     ssif_cfg.tdm_mode               = SSIF_CFG_DISABLE_TDM;
00036     ssif_cfg.romdec_direct.mode     = SSIF_CFG_DISABLE_ROMDEC_DIRECT;
00037     ssif_cfg.romdec_direct.p_cbfunc = NULL;
00038     result = ssif.ConfigChannel(&ssif_cfg);
00039     if (result < 0) {
00040         printf("ssif config error %d\n", result);
00041     }
00042 
00043     while (1) {
00044         //The upper limit of write buffer is 8.
00045         result = ssif.write((void *)sin_data_44100Hz_16bit_2ch, 
00046                             sizeof(sin_data_44100Hz_16bit_2ch), &ssif_write_end_conf);
00047         if (result < 0) {
00048             printf("ssif write api error %d\n", result);
00049         }
00050     }
00051 }

API

Import library

Public Member Functions

R_BSP_Ssif (PinName sck, PinName ws, PinName tx, PinName rx, uint8_t int_level=0x80, int32_t max_write_num=16, int32_t max_read_num=16)
Constructor.
virtual ~R_BSP_Ssif ()
Destructor.
int32_t GetSsifChNo (void)
Get a value of SSIF channel number.
bool ConfigChannel (const ssif_channel_cfg_t *const p_ch_cfg)
Save configuration to the SSIF driver.
bool GetStatus (uint32_t *const p_status)
Get a value of SSISR register.
int32_t write (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL)
Write count bytes to the file associated.
int32_t read (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL)
Read count bytes to the file associated.

Protected Member Functions

void write_init (void *handle, void *p_func_a, int32_t max_buff_num=16)
Write init.
void read_init (void *handle, void *p_func_a, int32_t max_buff_num=16)
Read init.

Interface

See the Pinout page for more details


SCUX

The SCUX module consists of a sampling rate converter, a digital volume unit, and a mixer.
The SCUX driver can perform asynchronous and synchronous sampling rate conversions using the sampling rate converter. The SCUX driver uses the DMA transfer mode to input and output audio data.

Hello World!

Import program

00001 #include "mbed.h"
00002 #include "R_BSP_Scux.h"
00003 #include "USBHostMSD.h"
00004 
00005 R_BSP_Scux scux(SCUX_CH_0);
00006 
00007 #define WRITE_SAMPLE_NUM (128)
00008 #define READ_SAMPLE_NUM  (2048)
00009 
00010 const short sin_data[WRITE_SAMPLE_NUM] = {
00011  0x0000,0x0000,0x0C8C,0x0C8C,0x18F9,0x18F9,0x2528,0x2528
00012 ,0x30FB,0x30FB,0x3C56,0x3C56,0x471C,0x471C,0x5133,0x5133
00013 ,0x5A82,0x5A82,0x62F1,0x62F1,0x6A6D,0x6A6D,0x70E2,0x70E2
00014 ,0x7641,0x7641,0x7A7C,0x7A7C,0x7D89,0x7D89,0x7F61,0x7F61
00015 ,0x7FFF,0x7FFF,0x7F61,0x7F61,0x7D89,0x7D89,0x7A7C,0x7A7C
00016 ,0x7641,0x7641,0x70E2,0x70E2,0x6A6D,0x6A6D,0x62F1,0x62F1
00017 ,0x5A82,0x5A82,0x5133,0x5133,0x471C,0x471C,0x3C56,0x3C56
00018 ,0x30FB,0x30FB,0x2528,0x2528,0x18F9,0x18F9,0x0C8C,0x0C8C
00019 ,0x0000,0x0000,0xF374,0xF374,0xE707,0xE707,0xDAD8,0xDAD8
00020 ,0xCF05,0xCF05,0xC3AA,0xC3AA,0xB8E4,0xB8E4,0xAECD,0xAECD
00021 ,0xA57E,0xA57E,0x9D0F,0x9D0F,0x9593,0x9593,0x8F1E,0x8F1E
00022 ,0x89BF,0x89BF,0x8584,0x8584,0x8277,0x8277,0x809F,0x809F
00023 ,0x8001,0x8001,0x809F,0x809F,0x8277,0x8277,0x8584,0x8584
00024 ,0x89BF,0x89BF,0x8F1E,0x8F1E,0x9593,0x9593,0x9D0F,0x9D0F
00025 ,0xA57E,0xA57E,0xAECD,0xAECD,0xB8E4,0xB8E4,0xC3AA,0xC3AA
00026 ,0xCF05,0xCF05,0xDAD8,0xDAD8,0xE707,0xE707,0xF374,0xF374
00027 };
00028 
00029 #if defined(__ICCARM__)
00030 #pragma data_alignment=4
00031 short write_buff[WRITE_SAMPLE_NUM]@ ".mirrorram";
00032 #pragma data_alignment=4
00033 short read_buff[READ_SAMPLE_NUM]@ ".mirrorram";
00034 #else
00035 short write_buff[WRITE_SAMPLE_NUM] __attribute((section("NC_BSS"),aligned(4)));
00036 short read_buff[READ_SAMPLE_NUM] __attribute((section("NC_BSS"),aligned(4)));
00037 #endif
00038 
00039 void scux_setup(void);
00040 void write_task(void const*);
00041 void file_output_to_usb(void);
00042 
00043 int main(void) {
00044     // set up SRC parameters.
00045     scux_setup();
00046 
00047     printf("Sampling rate conversion Start.\n");
00048     // start accepting transmit/receive requests.
00049     scux.TransStart();
00050 
00051     // create a new thread to write to SCUX.
00052     Thread writeTask(write_task, NULL, osPriorityNormal, 1024 * 4);
00053 
00054     // receive request to the SCUX driver.
00055     scux.read(read_buff, sizeof(read_buff));
00056     printf("Sampling rate conversion End.\n");
00057 
00058     // output binary file to USB port 0.
00059     file_output_to_usb();
00060 }
00061 
00062 void scux_setup(void) {
00063     scux_src_usr_cfg_t src_cfg;
00064 
00065     src_cfg.src_enable           = true;
00066     src_cfg.word_len             = SCUX_DATA_LEN_16;
00067     src_cfg.mode_sync            = true;
00068     src_cfg.input_rate           = SAMPLING_RATE_48000HZ;
00069     src_cfg.output_rate          = SAMPLING_RATE_96000HZ;
00070     src_cfg.select_in_data_ch[0] = SELECT_IN_DATA_CH_0;
00071     src_cfg.select_in_data_ch[1] = SELECT_IN_DATA_CH_1;
00072 
00073     scux.SetSrcCfg(&src_cfg);
00074 }
00075 
00076 void scux_flush_callback(int scux_ch) {
00077     // do nothing
00078 }
00079 
00080 void write_task(void const*) {
00081     memcpy(write_buff, sin_data, sizeof(write_buff));
00082     // send request to the SCUX driver.
00083     scux.write(write_buff, sizeof(write_buff));
00084 
00085     // stop the acceptance of transmit/receive requests.
00086     scux.FlushStop(&scux_flush_callback);
00087 }
00088 
00089 void file_output_to_usb(void) {
00090     FILE * fp = NULL;
00091     int i;
00092 
00093     USBHostMSD msd("usb");
00094 
00095     // try to connect a MSD device
00096     for(i = 0; i < 10; i++) {
00097         if (msd.connect()) {
00098             break;
00099         }
00100         wait(0.5);
00101     }
00102 
00103     if (msd.connected()) {
00104         fp = fopen("/usb/scux_input.dat", "rb");
00105         if (fp == NULL) {
00106             fp = fopen("/usb/scux_input.dat", "wb");
00107             if (fp != NULL) {
00108                 fwrite(write_buff, sizeof(short), WRITE_SAMPLE_NUM, fp);
00109                 fclose(fp);
00110                 printf("Output binary file(Input data) to USB.\n");
00111             } else {
00112                 printf("Failed to output binary file(Input data).\n");
00113             }
00114         } else {
00115             printf("Binary file(Input data) exists.\n");
00116             fclose(fp);
00117         }
00118 
00119         fp = fopen("/usb/scux_output.dat", "rb");
00120         if (fp == NULL) {
00121             fp = fopen("/usb/scux_output.dat", "wb");
00122             if (fp != NULL) {
00123                 fwrite(read_buff, sizeof(short), READ_SAMPLE_NUM, fp);
00124                 fclose(fp);
00125                 printf("Output binary file(Output data) to USB.\n");
00126             } else {
00127                 printf("Failed to output binary file(Output data).\n");
00128             }
00129         } else {
00130             printf("Binary file(Output data) exists.\n");
00131             fclose(fp);
00132         }
00133     } else {
00134         printf("Failed to connect to the USB device.\n");
00135     }
00136 } 

API

Import library

Public Member Functions

R_BSP_Scux ( scux_ch_num_t channel, uint8_t int_level=0x80, int32_t max_write_num=16, int32_t max_read_num=16)
Constructor: Initializes and opens the channel designated by the SCUX driver.
virtual ~R_BSP_Scux (void)
Destructor: Closes the channel designated by the SCUX driver and exits.
bool TransStart (void)
Sets up the SCUX HW and starts operation, then starts accepting write/read requests.
bool FlushStop (void(*const callback)(int32_t))
Stops accepting write/read requests, flushes out all data in the SCUX that is requested for transfer, then stops the HW operation.
bool ClearStop (void)
Discards all data in the SCUX that is requested for transfer before stopping the hardware operation and stops accepting write/read requests.
bool SetSrcCfg (const scux_src_usr_cfg_t *const p_src_param)
Sets up SRC parameters.
bool GetWriteStat (uint32_t *const p_write_stat)
Obtains the state information of the write request.
bool GetReadStat (uint32_t *const p_read_stat)
Obtains the state information of the read request.
int32_t write (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL)
Write count bytes to the file associated.
int32_t read (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL)
Read count bytes to the file associated.

Protected Member Functions

void write_init (void *handle, void *p_func_a, int32_t max_buff_num=16)
Write init.
void read_init (void *handle, void *p_func_a, int32_t max_buff_num=16)
Read init.

Write request state transition diagram

/media/uploads/dkato/scux_write_state_transition.png

Read request state transition diagram

/media/uploads/dkato/scux_read_state_transition.png

Committer:
dkato
Date:
Mon Jun 01 08:33:21 2015 +0000
Revision:
0:702bf7b2b7d8
Child:
5:1390bfcb667c
first comit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:702bf7b2b7d8 1 /*******************************************************************************
dkato 0:702bf7b2b7d8 2 * DISCLAIMER
dkato 0:702bf7b2b7d8 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:702bf7b2b7d8 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:702bf7b2b7d8 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:702bf7b2b7d8 6 * all applicable laws, including copyright laws.
dkato 0:702bf7b2b7d8 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:702bf7b2b7d8 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:702bf7b2b7d8 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:702bf7b2b7d8 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:702bf7b2b7d8 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:702bf7b2b7d8 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:702bf7b2b7d8 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:702bf7b2b7d8 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:702bf7b2b7d8 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:702bf7b2b7d8 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:702bf7b2b7d8 17 * and to discontinue the availability of this software. By using this software,
dkato 0:702bf7b2b7d8 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:702bf7b2b7d8 19 * following link:
dkato 0:702bf7b2b7d8 20 * http://www.renesas.com/disclaimer
dkato 0:702bf7b2b7d8 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
dkato 0:702bf7b2b7d8 22 *******************************************************************************/
dkato 0:702bf7b2b7d8 23
dkato 0:702bf7b2b7d8 24 /*******************************************************************************
dkato 0:702bf7b2b7d8 25 * File Name : ssif.c
dkato 0:702bf7b2b7d8 26 * $Rev: 891 $
dkato 0:702bf7b2b7d8 27 * $Date:: 2014-06-27 10:40:52 +0900#$
dkato 0:702bf7b2b7d8 28 * Description : SSIF driver functions
dkato 0:702bf7b2b7d8 29 ******************************************************************************/
dkato 0:702bf7b2b7d8 30
dkato 0:702bf7b2b7d8 31 /*******************************************************************************
dkato 0:702bf7b2b7d8 32 Includes <System Includes>, "Project Includes"
dkato 0:702bf7b2b7d8 33 *******************************************************************************/
dkato 0:702bf7b2b7d8 34 #include "ssif.h"
dkato 0:702bf7b2b7d8 35 #include "iodefine.h"
dkato 0:702bf7b2b7d8 36 #include "ssif_int.h"
dkato 0:702bf7b2b7d8 37 #include "Renesas_RZ_A1.h"
dkato 0:702bf7b2b7d8 38
dkato 0:702bf7b2b7d8 39 /*******************************************************************************
dkato 0:702bf7b2b7d8 40 Macro definitions
dkato 0:702bf7b2b7d8 41 *******************************************************************************/
dkato 0:702bf7b2b7d8 42
dkato 0:702bf7b2b7d8 43 /*******************************************************************************
dkato 0:702bf7b2b7d8 44 Typedef definitions
dkato 0:702bf7b2b7d8 45 *******************************************************************************/
dkato 0:702bf7b2b7d8 46
dkato 0:702bf7b2b7d8 47 /*******************************************************************************
dkato 0:702bf7b2b7d8 48 Exported global variables (to be accessed by other files)
dkato 0:702bf7b2b7d8 49 *******************************************************************************/
dkato 0:702bf7b2b7d8 50 /* ->MISRA 8.8, MISRA 8.10, IPA M2.2.2 : These declare statements are dependent on CMSIS-RTOS */
dkato 0:702bf7b2b7d8 51 osSemaphoreDef(ssif_ch0_access);
dkato 0:702bf7b2b7d8 52 osSemaphoreDef(ssif_ch1_access);
dkato 0:702bf7b2b7d8 53 osSemaphoreDef(ssif_ch2_access);
dkato 0:702bf7b2b7d8 54 osSemaphoreDef(ssif_ch3_access);
dkato 0:702bf7b2b7d8 55 osSemaphoreDef(ssif_ch4_access);
dkato 0:702bf7b2b7d8 56 osSemaphoreDef(ssif_ch5_access);
dkato 0:702bf7b2b7d8 57 /* <-MISRA 8.8, MISRA 8.10, IPA M2.2.2 */
dkato 0:702bf7b2b7d8 58
dkato 0:702bf7b2b7d8 59 ssif_info_drv_t g_ssif_info_drv;
dkato 0:702bf7b2b7d8 60
dkato 0:702bf7b2b7d8 61 volatile struct st_ssif* const g_ssireg[SSIF_NUM_CHANS] = SSIF_ADDRESS_LIST;
dkato 0:702bf7b2b7d8 62
dkato 0:702bf7b2b7d8 63 /*******************************************************************************
dkato 0:702bf7b2b7d8 64 Private global variables and functions
dkato 0:702bf7b2b7d8 65 *******************************************************************************/
dkato 0:702bf7b2b7d8 66 static int_t SSIF_InitChannel(ssif_info_ch_t* const p_info_ch);
dkato 0:702bf7b2b7d8 67 static void SSIF_UnInitChannel(ssif_info_ch_t* const p_info_ch);
dkato 0:702bf7b2b7d8 68 static int_t SSIF_UpdateChannelConfig(ssif_info_ch_t* const p_info_ch,
dkato 0:702bf7b2b7d8 69 const ssif_channel_cfg_t* const p_ch_cfg);
dkato 0:702bf7b2b7d8 70 static int_t SSIF_SetCtrlParams(const ssif_info_ch_t* const p_info_ch);
dkato 0:702bf7b2b7d8 71 static int_t SSIF_CheckChannelCfg(const ssif_channel_cfg_t* const p_ch_cfg);
dkato 0:702bf7b2b7d8 72 static int_t SSIF_CheckWordSize(const ssif_info_ch_t* const p_info_ch);
dkato 0:702bf7b2b7d8 73 static void SSIF_Reset(const uint32_t ssif_ch);
dkato 0:702bf7b2b7d8 74
dkato 0:702bf7b2b7d8 75 static const uint32_t gb_cpg_stbcr_bit[SSIF_NUM_CHANS] =
dkato 0:702bf7b2b7d8 76 {
dkato 0:702bf7b2b7d8 77 CPG_STBCR11_BIT_MSTP115, /* SSIF0 */
dkato 0:702bf7b2b7d8 78 CPG_STBCR11_BIT_MSTP114, /* SSIF1 */
dkato 0:702bf7b2b7d8 79 CPG_STBCR11_BIT_MSTP113, /* SSIF2 */
dkato 0:702bf7b2b7d8 80 CPG_STBCR11_BIT_MSTP112, /* SSIF3 */
dkato 0:702bf7b2b7d8 81 CPG_STBCR11_BIT_MSTP111, /* SSIF4 */
dkato 0:702bf7b2b7d8 82 CPG_STBCR11_BIT_MSTP110 /* SSIF5 */
dkato 0:702bf7b2b7d8 83 };
dkato 0:702bf7b2b7d8 84
dkato 0:702bf7b2b7d8 85 /******************************************************************************
dkato 0:702bf7b2b7d8 86 Exported global functions (to be accessed by other files)
dkato 0:702bf7b2b7d8 87 ******************************************************************************/
dkato 0:702bf7b2b7d8 88
dkato 0:702bf7b2b7d8 89 /******************************************************************************
dkato 0:702bf7b2b7d8 90 * Function Name: SSIF_Initialise
dkato 0:702bf7b2b7d8 91 * @brief Initialize the SSIF driver's internal data
dkato 0:702bf7b2b7d8 92 *
dkato 0:702bf7b2b7d8 93 * Description:<br>
dkato 0:702bf7b2b7d8 94 *
dkato 0:702bf7b2b7d8 95 * @param[in] p_cfg_data :pointer of several parameters array per channels
dkato 0:702bf7b2b7d8 96 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 97 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 98 ******************************************************************************/
dkato 0:702bf7b2b7d8 99 #if(1) /* mbed */
dkato 0:702bf7b2b7d8 100 int_t SSIF_InitialiseOne(const int_t channel, const ssif_channel_cfg_t* const p_cfg_data)
dkato 0:702bf7b2b7d8 101 {
dkato 0:702bf7b2b7d8 102 int_t ercd = ESUCCESS;
dkato 0:702bf7b2b7d8 103 ssif_info_ch_t* p_info_ch;
dkato 0:702bf7b2b7d8 104
dkato 0:702bf7b2b7d8 105 if (NULL == p_cfg_data)
dkato 0:702bf7b2b7d8 106 {
dkato 0:702bf7b2b7d8 107 ercd = EFAULT;
dkato 0:702bf7b2b7d8 108 }
dkato 0:702bf7b2b7d8 109 else if (false == p_cfg_data->enabled)
dkato 0:702bf7b2b7d8 110 {
dkato 0:702bf7b2b7d8 111 ercd = EFAULT;
dkato 0:702bf7b2b7d8 112 }
dkato 0:702bf7b2b7d8 113 else
dkato 0:702bf7b2b7d8 114 {
dkato 0:702bf7b2b7d8 115 p_info_ch = &g_ssif_info_drv.info_ch[channel];
dkato 0:702bf7b2b7d8 116 p_info_ch->channel = channel;
dkato 0:702bf7b2b7d8 117 p_info_ch->enabled = p_cfg_data->enabled;
dkato 0:702bf7b2b7d8 118
dkato 0:702bf7b2b7d8 119 /* copy config data to channel info */
dkato 0:702bf7b2b7d8 120 ercd = SSIF_UpdateChannelConfig(p_info_ch, p_cfg_data);
dkato 0:702bf7b2b7d8 121
dkato 0:702bf7b2b7d8 122 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 123 {
dkato 0:702bf7b2b7d8 124 ercd = SSIF_InitChannel(p_info_ch);
dkato 0:702bf7b2b7d8 125 }
dkato 0:702bf7b2b7d8 126
dkato 0:702bf7b2b7d8 127 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 128 {
dkato 0:702bf7b2b7d8 129 SSIF_InterruptInit(channel, p_cfg_data->int_level);
dkato 0:702bf7b2b7d8 130 }
dkato 0:702bf7b2b7d8 131 }
dkato 0:702bf7b2b7d8 132
dkato 0:702bf7b2b7d8 133 return ercd;
dkato 0:702bf7b2b7d8 134 }
dkato 0:702bf7b2b7d8 135
dkato 0:702bf7b2b7d8 136 #else
dkato 0:702bf7b2b7d8 137 int_t SSIF_Initialise(const ssif_channel_cfg_t* const p_cfg_data)
dkato 0:702bf7b2b7d8 138 {
dkato 0:702bf7b2b7d8 139 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 140 int_t ercd = ESUCCESS;
dkato 0:702bf7b2b7d8 141 ssif_info_ch_t* p_info_ch;
dkato 0:702bf7b2b7d8 142
dkato 0:702bf7b2b7d8 143 if (NULL == p_cfg_data)
dkato 0:702bf7b2b7d8 144 {
dkato 0:702bf7b2b7d8 145 ercd = EFAULT;
dkato 0:702bf7b2b7d8 146 }
dkato 0:702bf7b2b7d8 147 else
dkato 0:702bf7b2b7d8 148 {
dkato 0:702bf7b2b7d8 149 for (ssif_ch = 0; (ssif_ch < SSIF_NUM_CHANS) && (ESUCCESS == ercd); ssif_ch++)
dkato 0:702bf7b2b7d8 150 {
dkato 0:702bf7b2b7d8 151 p_info_ch = &g_ssif_info_drv.info_ch[ssif_ch];
dkato 0:702bf7b2b7d8 152 p_info_ch->channel = ssif_ch;
dkato 0:702bf7b2b7d8 153 p_info_ch->enabled = p_cfg_data[ssif_ch].enabled;
dkato 0:702bf7b2b7d8 154
dkato 0:702bf7b2b7d8 155 if (false != p_info_ch->enabled)
dkato 0:702bf7b2b7d8 156 {
dkato 0:702bf7b2b7d8 157 /* copy config data to channel info */
dkato 0:702bf7b2b7d8 158 ercd = SSIF_UpdateChannelConfig(p_info_ch, &p_cfg_data[ssif_ch]);
dkato 0:702bf7b2b7d8 159
dkato 0:702bf7b2b7d8 160 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 161 {
dkato 0:702bf7b2b7d8 162 ercd = SSIF_InitChannel(p_info_ch);
dkato 0:702bf7b2b7d8 163 }
dkato 0:702bf7b2b7d8 164 }
dkato 0:702bf7b2b7d8 165 }
dkato 0:702bf7b2b7d8 166
dkato 0:702bf7b2b7d8 167 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 168 {
dkato 0:702bf7b2b7d8 169 for (ssif_ch = 0; ssif_ch < SSIF_NUM_CHANS; ssif_ch++)
dkato 0:702bf7b2b7d8 170 {
dkato 0:702bf7b2b7d8 171 p_info_ch = &g_ssif_info_drv.info_ch[ssif_ch];
dkato 0:702bf7b2b7d8 172
dkato 0:702bf7b2b7d8 173 if (false != p_info_ch->enabled)
dkato 0:702bf7b2b7d8 174 {
dkato 0:702bf7b2b7d8 175 SSIF_InterruptInit(ssif_ch, p_cfg_data[ssif_ch].int_level);
dkato 0:702bf7b2b7d8 176 }
dkato 0:702bf7b2b7d8 177 }
dkato 0:702bf7b2b7d8 178 }
dkato 0:702bf7b2b7d8 179 }
dkato 0:702bf7b2b7d8 180
dkato 0:702bf7b2b7d8 181 return ercd;
dkato 0:702bf7b2b7d8 182 }
dkato 0:702bf7b2b7d8 183 #endif
dkato 0:702bf7b2b7d8 184
dkato 0:702bf7b2b7d8 185 /******************************************************************************
dkato 0:702bf7b2b7d8 186 * Function Name: SSIF_UnInitialise
dkato 0:702bf7b2b7d8 187 * @brief UnInitialize the SSIF driver's internal data
dkato 0:702bf7b2b7d8 188 *
dkato 0:702bf7b2b7d8 189 * Description:<br>
dkato 0:702bf7b2b7d8 190 *
dkato 0:702bf7b2b7d8 191 * @param none
dkato 0:702bf7b2b7d8 192 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 193 ******************************************************************************/
dkato 0:702bf7b2b7d8 194 #if(1) /* mbed */
dkato 0:702bf7b2b7d8 195 int_t SSIF_UnInitialiseOne(const int_t channel)
dkato 0:702bf7b2b7d8 196 {
dkato 0:702bf7b2b7d8 197 const int_t ercd = ESUCCESS;
dkato 0:702bf7b2b7d8 198 ssif_info_ch_t* p_info_ch;
dkato 0:702bf7b2b7d8 199
dkato 0:702bf7b2b7d8 200 p_info_ch = &g_ssif_info_drv.info_ch[channel];
dkato 0:702bf7b2b7d8 201
dkato 0:702bf7b2b7d8 202 if (false != p_info_ch->enabled)
dkato 0:702bf7b2b7d8 203 {
dkato 0:702bf7b2b7d8 204 SSIF_UnInitChannel(p_info_ch);
dkato 0:702bf7b2b7d8 205 }
dkato 0:702bf7b2b7d8 206
dkato 0:702bf7b2b7d8 207 return ercd;
dkato 0:702bf7b2b7d8 208 }
dkato 0:702bf7b2b7d8 209 #else
dkato 0:702bf7b2b7d8 210 int_t SSIF_UnInitialise(void)
dkato 0:702bf7b2b7d8 211 {
dkato 0:702bf7b2b7d8 212 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 213 const int_t ercd = ESUCCESS;
dkato 0:702bf7b2b7d8 214 ssif_info_ch_t* p_info_ch;
dkato 0:702bf7b2b7d8 215
dkato 0:702bf7b2b7d8 216 for (ssif_ch = 0; ssif_ch < SSIF_NUM_CHANS; ssif_ch++)
dkato 0:702bf7b2b7d8 217 {
dkato 0:702bf7b2b7d8 218 p_info_ch = &g_ssif_info_drv.info_ch[ssif_ch];
dkato 0:702bf7b2b7d8 219
dkato 0:702bf7b2b7d8 220 if (false != p_info_ch->enabled)
dkato 0:702bf7b2b7d8 221 {
dkato 0:702bf7b2b7d8 222 SSIF_UnInitChannel(p_info_ch);
dkato 0:702bf7b2b7d8 223 }
dkato 0:702bf7b2b7d8 224 }
dkato 0:702bf7b2b7d8 225
dkato 0:702bf7b2b7d8 226 return ercd;
dkato 0:702bf7b2b7d8 227 }
dkato 0:702bf7b2b7d8 228 #endif
dkato 0:702bf7b2b7d8 229
dkato 0:702bf7b2b7d8 230 /******************************************************************************
dkato 0:702bf7b2b7d8 231 * Function Name: SSIF_EnableChannel
dkato 0:702bf7b2b7d8 232 * @brief Enable the SSIF channel
dkato 0:702bf7b2b7d8 233 *
dkato 0:702bf7b2b7d8 234 * Description:<br>
dkato 0:702bf7b2b7d8 235 *
dkato 0:702bf7b2b7d8 236 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 237 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 238 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 239 ******************************************************************************/
dkato 0:702bf7b2b7d8 240 int_t SSIF_EnableChannel(ssif_info_ch_t* const p_info_ch)
dkato 0:702bf7b2b7d8 241 {
dkato 0:702bf7b2b7d8 242 int_t ercd = ESUCCESS;
dkato 0:702bf7b2b7d8 243 int_t was_masked;
dkato 0:702bf7b2b7d8 244 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 245
dkato 0:702bf7b2b7d8 246 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 247 {
dkato 0:702bf7b2b7d8 248 ercd = EFAULT;
dkato 0:702bf7b2b7d8 249 }
dkato 0:702bf7b2b7d8 250 else
dkato 0:702bf7b2b7d8 251 {
dkato 0:702bf7b2b7d8 252 ssif_ch = p_info_ch->channel;
dkato 0:702bf7b2b7d8 253
dkato 0:702bf7b2b7d8 254 if (ssif_ch >= SSIF_NUM_CHANS)
dkato 0:702bf7b2b7d8 255 {
dkato 0:702bf7b2b7d8 256 ercd = EFAULT;
dkato 0:702bf7b2b7d8 257 }
dkato 0:702bf7b2b7d8 258 else
dkato 0:702bf7b2b7d8 259 {
dkato 0:702bf7b2b7d8 260 /* check channel open flag(duplex) */
dkato 0:702bf7b2b7d8 261 if ((O_RDWR == p_info_ch->openflag)
dkato 0:702bf7b2b7d8 262 && (false == p_info_ch->is_full_duplex))
dkato 0:702bf7b2b7d8 263 {
dkato 0:702bf7b2b7d8 264 ercd = EINVAL;
dkato 0:702bf7b2b7d8 265 }
dkato 0:702bf7b2b7d8 266
dkato 0:702bf7b2b7d8 267 /* check channel open flag(romdec direct input) */
dkato 0:702bf7b2b7d8 268 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 269 {
dkato 0:702bf7b2b7d8 270 if ((O_RDONLY != p_info_ch->openflag)
dkato 0:702bf7b2b7d8 271 && (SSIF_CFG_ENABLE_ROMDEC_DIRECT
dkato 0:702bf7b2b7d8 272 == p_info_ch->romdec_direct.mode))
dkato 0:702bf7b2b7d8 273 {
dkato 0:702bf7b2b7d8 274 ercd = EINVAL;
dkato 0:702bf7b2b7d8 275 }
dkato 0:702bf7b2b7d8 276 }
dkato 0:702bf7b2b7d8 277
dkato 0:702bf7b2b7d8 278 /* enable the SSIF clock */
dkato 0:702bf7b2b7d8 279 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 280 {
dkato 0:702bf7b2b7d8 281 was_masked = __disable_irq();
dkato 0:702bf7b2b7d8 282
dkato 0:702bf7b2b7d8 283 /* ->IPA R2.4.2 : This is implicit type conversion that doesn't have bad effect on writing to 8bit register. */
dkato 0:702bf7b2b7d8 284 CPGSTBCR11 &= (uint8_t)~((uint8_t)gb_cpg_stbcr_bit[ssif_ch]);
dkato 0:702bf7b2b7d8 285 /* <-IPA R2.4.2 */
dkato 0:702bf7b2b7d8 286
dkato 0:702bf7b2b7d8 287 if (0 == was_masked)
dkato 0:702bf7b2b7d8 288 {
dkato 0:702bf7b2b7d8 289 __enable_irq();
dkato 0:702bf7b2b7d8 290 }
dkato 0:702bf7b2b7d8 291 }
dkato 0:702bf7b2b7d8 292
dkato 0:702bf7b2b7d8 293 /* configure channel hardware */
dkato 0:702bf7b2b7d8 294 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 295 {
dkato 0:702bf7b2b7d8 296 /* software reset */
dkato 0:702bf7b2b7d8 297 SSIF_Reset(ssif_ch);
dkato 0:702bf7b2b7d8 298
dkato 0:702bf7b2b7d8 299 /* Set control parameters */
dkato 0:702bf7b2b7d8 300 ercd = SSIF_SetCtrlParams(p_info_ch);
dkato 0:702bf7b2b7d8 301 }
dkato 0:702bf7b2b7d8 302
dkato 0:702bf7b2b7d8 303 /* allocate and setup/start DMA transfer */
dkato 0:702bf7b2b7d8 304 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 305 {
dkato 0:702bf7b2b7d8 306 ercd = SSIF_InitDMA(p_info_ch);
dkato 0:702bf7b2b7d8 307 }
dkato 0:702bf7b2b7d8 308 }
dkato 0:702bf7b2b7d8 309 }
dkato 0:702bf7b2b7d8 310
dkato 0:702bf7b2b7d8 311 return ercd;
dkato 0:702bf7b2b7d8 312 }
dkato 0:702bf7b2b7d8 313
dkato 0:702bf7b2b7d8 314 /******************************************************************************
dkato 0:702bf7b2b7d8 315 * Function Name: SSIF_DisableChannel
dkato 0:702bf7b2b7d8 316 * @brief Disable the SSIF channel
dkato 0:702bf7b2b7d8 317 *
dkato 0:702bf7b2b7d8 318 * Description:<br>
dkato 0:702bf7b2b7d8 319 *
dkato 0:702bf7b2b7d8 320 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 321 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 322 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 323 ******************************************************************************/
dkato 0:702bf7b2b7d8 324 int_t SSIF_DisableChannel(ssif_info_ch_t* const p_info_ch)
dkato 0:702bf7b2b7d8 325 {
dkato 0:702bf7b2b7d8 326 uint32_t dummy_read;
dkato 0:702bf7b2b7d8 327 int_t was_masked;
dkato 0:702bf7b2b7d8 328 int_t ret = ESUCCESS;
dkato 0:702bf7b2b7d8 329 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 330
dkato 0:702bf7b2b7d8 331 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 332 {
dkato 0:702bf7b2b7d8 333 ret = EFAULT;
dkato 0:702bf7b2b7d8 334 }
dkato 0:702bf7b2b7d8 335 else
dkato 0:702bf7b2b7d8 336 {
dkato 0:702bf7b2b7d8 337 ssif_ch = p_info_ch->channel;
dkato 0:702bf7b2b7d8 338
dkato 0:702bf7b2b7d8 339 if (ssif_ch >= SSIF_NUM_CHANS)
dkato 0:702bf7b2b7d8 340 {
dkato 0:702bf7b2b7d8 341 ret = EFAULT;
dkato 0:702bf7b2b7d8 342 }
dkato 0:702bf7b2b7d8 343 else
dkato 0:702bf7b2b7d8 344 {
dkato 0:702bf7b2b7d8 345 SSIF_DisableErrorInterrupt(ssif_ch);
dkato 0:702bf7b2b7d8 346
dkato 0:702bf7b2b7d8 347 /* TEN and REN are disable */
dkato 0:702bf7b2b7d8 348 g_ssireg[ssif_ch]->SSICR &= ~(SSIF_CR_BIT_TEN | SSIF_CR_BIT_REN);
dkato 0:702bf7b2b7d8 349
dkato 0:702bf7b2b7d8 350 /* Reset FIFO */
dkato 0:702bf7b2b7d8 351 g_ssireg[ssif_ch]->SSIFCR |= (SSIF_FCR_BIT_TFRST | SSIF_FCR_BIT_RFRST);
dkato 0:702bf7b2b7d8 352 dummy_read = g_ssireg[ssif_ch]->SSIFCR;
dkato 0:702bf7b2b7d8 353 UNUSED_ARG(dummy_read);
dkato 0:702bf7b2b7d8 354 g_ssireg[ssif_ch]->SSIFCR &= ~(SSIF_FCR_BIT_TFRST | SSIF_FCR_BIT_RFRST);
dkato 0:702bf7b2b7d8 355
dkato 0:702bf7b2b7d8 356 /* free DMA resources */
dkato 0:702bf7b2b7d8 357 SSIF_UnInitDMA(p_info_ch);
dkato 0:702bf7b2b7d8 358
dkato 0:702bf7b2b7d8 359 /* clear status reg */
dkato 0:702bf7b2b7d8 360 g_ssireg[ssif_ch]->SSISR = 0u; /* ALL CLEAR */
dkato 0:702bf7b2b7d8 361
dkato 0:702bf7b2b7d8 362 /* disable ssif clock */
dkato 0:702bf7b2b7d8 363 was_masked = __disable_irq();
dkato 0:702bf7b2b7d8 364
dkato 0:702bf7b2b7d8 365 /* ->IPA R2.4.2 : This is implicit type conversion that doesn't have bad effect on writing to 8bit register. */
dkato 0:702bf7b2b7d8 366 CPGSTBCR11 |= (uint8_t)gb_cpg_stbcr_bit[ssif_ch];
dkato 0:702bf7b2b7d8 367 /* <-IPA R2.4.2 */
dkato 0:702bf7b2b7d8 368
dkato 0:702bf7b2b7d8 369 if (0 == was_masked)
dkato 0:702bf7b2b7d8 370 {
dkato 0:702bf7b2b7d8 371 __enable_irq();
dkato 0:702bf7b2b7d8 372 }
dkato 0:702bf7b2b7d8 373
dkato 0:702bf7b2b7d8 374 /* cancel event to ongoing request */
dkato 0:702bf7b2b7d8 375 if (NULL != p_info_ch->p_aio_tx_curr)
dkato 0:702bf7b2b7d8 376 {
dkato 0:702bf7b2b7d8 377 p_info_ch->p_aio_tx_curr->aio_return = ECANCELED;
dkato 0:702bf7b2b7d8 378 ahf_complete(&p_info_ch->tx_que, p_info_ch->p_aio_tx_curr);
dkato 0:702bf7b2b7d8 379 p_info_ch->p_aio_tx_curr = NULL;
dkato 0:702bf7b2b7d8 380 }
dkato 0:702bf7b2b7d8 381 if (NULL != p_info_ch->p_aio_tx_next)
dkato 0:702bf7b2b7d8 382 {
dkato 0:702bf7b2b7d8 383 p_info_ch->p_aio_tx_next->aio_return = ECANCELED;
dkato 0:702bf7b2b7d8 384 ahf_complete(&p_info_ch->tx_que, p_info_ch->p_aio_tx_next);
dkato 0:702bf7b2b7d8 385 p_info_ch->p_aio_tx_next = NULL;
dkato 0:702bf7b2b7d8 386 }
dkato 0:702bf7b2b7d8 387 if (NULL != p_info_ch->p_aio_rx_curr)
dkato 0:702bf7b2b7d8 388 {
dkato 0:702bf7b2b7d8 389 p_info_ch->p_aio_rx_curr->aio_return = ECANCELED;
dkato 0:702bf7b2b7d8 390 ahf_complete(&p_info_ch->rx_que, p_info_ch->p_aio_rx_curr);
dkato 0:702bf7b2b7d8 391 p_info_ch->p_aio_rx_curr = NULL;
dkato 0:702bf7b2b7d8 392 }
dkato 0:702bf7b2b7d8 393 if (NULL != p_info_ch->p_aio_rx_next)
dkato 0:702bf7b2b7d8 394 {
dkato 0:702bf7b2b7d8 395 p_info_ch->p_aio_rx_next->aio_return = ECANCELED;
dkato 0:702bf7b2b7d8 396 ahf_complete(&p_info_ch->rx_que, p_info_ch->p_aio_rx_next);
dkato 0:702bf7b2b7d8 397 p_info_ch->p_aio_rx_next = NULL;
dkato 0:702bf7b2b7d8 398 }
dkato 0:702bf7b2b7d8 399 }
dkato 0:702bf7b2b7d8 400 }
dkato 0:702bf7b2b7d8 401
dkato 0:702bf7b2b7d8 402 return ret;
dkato 0:702bf7b2b7d8 403 }
dkato 0:702bf7b2b7d8 404
dkato 0:702bf7b2b7d8 405 /******************************************************************************
dkato 0:702bf7b2b7d8 406 * Function Name: SSIF_ErrorRecovery
dkato 0:702bf7b2b7d8 407 * @brief Restart the SSIF channel
dkato 0:702bf7b2b7d8 408 *
dkato 0:702bf7b2b7d8 409 * Description:<br>
dkato 0:702bf7b2b7d8 410 * When normal mode<br>
dkato 0:702bf7b2b7d8 411 * Stop and restart DMA transfer.<br>
dkato 0:702bf7b2b7d8 412 * When ROMDEC direct input mode<br>
dkato 0:702bf7b2b7d8 413 * Stop DMA transfer, and execute callback function.<br>
dkato 0:702bf7b2b7d8 414 * Note: This function execute in interrupt context.
dkato 0:702bf7b2b7d8 415 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 416 * @retval none
dkato 0:702bf7b2b7d8 417 ******************************************************************************/
dkato 0:702bf7b2b7d8 418 void SSIF_ErrorRecovery(ssif_info_ch_t* const p_info_ch)
dkato 0:702bf7b2b7d8 419 {
dkato 0:702bf7b2b7d8 420 uint32_t dummy_read;
dkato 0:702bf7b2b7d8 421 int_t ercd = ESUCCESS;
dkato 0:702bf7b2b7d8 422 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 423
dkato 0:702bf7b2b7d8 424 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 425 {
dkato 0:702bf7b2b7d8 426 ercd = EFAULT;
dkato 0:702bf7b2b7d8 427 }
dkato 0:702bf7b2b7d8 428 else
dkato 0:702bf7b2b7d8 429 {
dkato 0:702bf7b2b7d8 430 ssif_ch = p_info_ch->channel;
dkato 0:702bf7b2b7d8 431
dkato 0:702bf7b2b7d8 432 if (ssif_ch >= SSIF_NUM_CHANS)
dkato 0:702bf7b2b7d8 433 {
dkato 0:702bf7b2b7d8 434 ercd = EFAULT;
dkato 0:702bf7b2b7d8 435 }
dkato 0:702bf7b2b7d8 436 else
dkato 0:702bf7b2b7d8 437 {
dkato 0:702bf7b2b7d8 438 /* disable DMA end interrupt */
dkato 0:702bf7b2b7d8 439 g_ssireg[ssif_ch]->SSIFCR &= ~((uint32_t)SSIF_FCR_BIT_TIE | SSIF_FCR_BIT_RIE);
dkato 0:702bf7b2b7d8 440
dkato 0:702bf7b2b7d8 441 SSIF_DisableErrorInterrupt(ssif_ch);
dkato 0:702bf7b2b7d8 442
dkato 0:702bf7b2b7d8 443 /* TEN and REN are disable */
dkato 0:702bf7b2b7d8 444 g_ssireg[ssif_ch]->SSICR &= ~(SSIF_CR_BIT_TEN | SSIF_CR_BIT_REN);
dkato 0:702bf7b2b7d8 445
dkato 0:702bf7b2b7d8 446 /* Reset FIFO */
dkato 0:702bf7b2b7d8 447 g_ssireg[ssif_ch]->SSIFCR |= (SSIF_FCR_BIT_TFRST | SSIF_FCR_BIT_RFRST);
dkato 0:702bf7b2b7d8 448 dummy_read = g_ssireg[ssif_ch]->SSIFCR;
dkato 0:702bf7b2b7d8 449 UNUSED_ARG(dummy_read);
dkato 0:702bf7b2b7d8 450 g_ssireg[ssif_ch]->SSIFCR &= ~(SSIF_FCR_BIT_TFRST | SSIF_FCR_BIT_RFRST);
dkato 0:702bf7b2b7d8 451
dkato 0:702bf7b2b7d8 452 /* pause DMA transfer */
dkato 0:702bf7b2b7d8 453 SSIF_CancelDMA(p_info_ch);
dkato 0:702bf7b2b7d8 454
dkato 0:702bf7b2b7d8 455 /* clear status reg */
dkato 0:702bf7b2b7d8 456 g_ssireg[ssif_ch]->SSISR = 0u; /* ALL CLEAR */
dkato 0:702bf7b2b7d8 457
dkato 0:702bf7b2b7d8 458 /* cancel event to ongoing request */
dkato 0:702bf7b2b7d8 459 if (NULL != p_info_ch->p_aio_tx_curr)
dkato 0:702bf7b2b7d8 460 {
dkato 0:702bf7b2b7d8 461 p_info_ch->p_aio_tx_curr->aio_return = EIO;
dkato 0:702bf7b2b7d8 462 ahf_complete(&p_info_ch->tx_que, p_info_ch->p_aio_tx_curr);
dkato 0:702bf7b2b7d8 463 p_info_ch->p_aio_tx_curr = NULL;
dkato 0:702bf7b2b7d8 464 }
dkato 0:702bf7b2b7d8 465 if (NULL != p_info_ch->p_aio_tx_next)
dkato 0:702bf7b2b7d8 466 {
dkato 0:702bf7b2b7d8 467 p_info_ch->p_aio_tx_next->aio_return = EIO;
dkato 0:702bf7b2b7d8 468 ahf_complete(&p_info_ch->tx_que, p_info_ch->p_aio_tx_next);
dkato 0:702bf7b2b7d8 469 p_info_ch->p_aio_tx_next = NULL;
dkato 0:702bf7b2b7d8 470 }
dkato 0:702bf7b2b7d8 471 if (NULL != p_info_ch->p_aio_rx_curr)
dkato 0:702bf7b2b7d8 472 {
dkato 0:702bf7b2b7d8 473 p_info_ch->p_aio_rx_curr->aio_return = EIO;
dkato 0:702bf7b2b7d8 474 ahf_complete(&p_info_ch->rx_que, p_info_ch->p_aio_rx_curr);
dkato 0:702bf7b2b7d8 475 p_info_ch->p_aio_rx_curr = NULL;
dkato 0:702bf7b2b7d8 476 }
dkato 0:702bf7b2b7d8 477 if (NULL != p_info_ch->p_aio_rx_next)
dkato 0:702bf7b2b7d8 478 {
dkato 0:702bf7b2b7d8 479 p_info_ch->p_aio_rx_next->aio_return = EIO;
dkato 0:702bf7b2b7d8 480 ahf_complete(&p_info_ch->rx_que, p_info_ch->p_aio_rx_next);
dkato 0:702bf7b2b7d8 481 p_info_ch->p_aio_rx_next = NULL;
dkato 0:702bf7b2b7d8 482 }
dkato 0:702bf7b2b7d8 483 }
dkato 0:702bf7b2b7d8 484
dkato 0:702bf7b2b7d8 485 /* configure channel hardware */
dkato 0:702bf7b2b7d8 486 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 487 {
dkato 0:702bf7b2b7d8 488 /* software reset */
dkato 0:702bf7b2b7d8 489 SSIF_Reset(ssif_ch);
dkato 0:702bf7b2b7d8 490
dkato 0:702bf7b2b7d8 491 /* Set control parameters */
dkato 0:702bf7b2b7d8 492 ercd = SSIF_SetCtrlParams(p_info_ch);
dkato 0:702bf7b2b7d8 493 }
dkato 0:702bf7b2b7d8 494
dkato 0:702bf7b2b7d8 495 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 496 {
dkato 0:702bf7b2b7d8 497 if (SSIF_CFG_ENABLE_ROMDEC_DIRECT
dkato 0:702bf7b2b7d8 498 != p_info_ch->romdec_direct.mode)
dkato 0:702bf7b2b7d8 499 {
dkato 0:702bf7b2b7d8 500 /* setup/restart DMA transfer */
dkato 0:702bf7b2b7d8 501 ercd = SSIF_RestartDMA(p_info_ch);
dkato 0:702bf7b2b7d8 502 }
dkato 0:702bf7b2b7d8 503 else
dkato 0:702bf7b2b7d8 504 {
dkato 0:702bf7b2b7d8 505 /* execute callback function */
dkato 0:702bf7b2b7d8 506 if (NULL != p_info_ch->romdec_direct.p_cbfunc)
dkato 0:702bf7b2b7d8 507 {
dkato 0:702bf7b2b7d8 508 (*p_info_ch->romdec_direct.p_cbfunc)();
dkato 0:702bf7b2b7d8 509 }
dkato 0:702bf7b2b7d8 510 }
dkato 0:702bf7b2b7d8 511 }
dkato 0:702bf7b2b7d8 512 }
dkato 0:702bf7b2b7d8 513
dkato 0:702bf7b2b7d8 514 if (ESUCCESS != ercd)
dkato 0:702bf7b2b7d8 515 {
dkato 0:702bf7b2b7d8 516 /* NON_NOTICE_ASSERT: cannot restart channel */
dkato 0:702bf7b2b7d8 517 }
dkato 0:702bf7b2b7d8 518
dkato 0:702bf7b2b7d8 519 return;
dkato 0:702bf7b2b7d8 520 }
dkato 0:702bf7b2b7d8 521
dkato 0:702bf7b2b7d8 522 /******************************************************************************
dkato 0:702bf7b2b7d8 523 * Function Name: SSIF_PostAsyncIo
dkato 0:702bf7b2b7d8 524 * @brief Enqueue asynchronous read/write request
dkato 0:702bf7b2b7d8 525 *
dkato 0:702bf7b2b7d8 526 * Description:<br>
dkato 0:702bf7b2b7d8 527 *
dkato 0:702bf7b2b7d8 528 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 529 * @param[in,out] p_aio :aio control block of read/write request
dkato 0:702bf7b2b7d8 530 * @retval none
dkato 0:702bf7b2b7d8 531 ******************************************************************************/
dkato 0:702bf7b2b7d8 532 void SSIF_PostAsyncIo(ssif_info_ch_t* const p_info_ch, AIOCB* const p_aio)
dkato 0:702bf7b2b7d8 533 {
dkato 0:702bf7b2b7d8 534 if ((NULL == p_info_ch) || (NULL == p_aio))
dkato 0:702bf7b2b7d8 535 {
dkato 0:702bf7b2b7d8 536 /* NON_NOTICE_ASSERT: illegal pointer */
dkato 0:702bf7b2b7d8 537 }
dkato 0:702bf7b2b7d8 538 else
dkato 0:702bf7b2b7d8 539 {
dkato 0:702bf7b2b7d8 540 if (SSIF_ASYNC_W == p_aio->aio_return)
dkato 0:702bf7b2b7d8 541 {
dkato 0:702bf7b2b7d8 542 ahf_addtail(&p_info_ch->tx_que, p_aio);
dkato 0:702bf7b2b7d8 543 }
dkato 0:702bf7b2b7d8 544 else if (SSIF_ASYNC_R == p_aio->aio_return)
dkato 0:702bf7b2b7d8 545 {
dkato 0:702bf7b2b7d8 546 ahf_addtail(&p_info_ch->rx_que, p_aio);
dkato 0:702bf7b2b7d8 547 }
dkato 0:702bf7b2b7d8 548 else
dkato 0:702bf7b2b7d8 549 {
dkato 0:702bf7b2b7d8 550 /* NON_NOTICE_ASSERT: illegal request type */
dkato 0:702bf7b2b7d8 551 }
dkato 0:702bf7b2b7d8 552 }
dkato 0:702bf7b2b7d8 553
dkato 0:702bf7b2b7d8 554 return;
dkato 0:702bf7b2b7d8 555 }
dkato 0:702bf7b2b7d8 556
dkato 0:702bf7b2b7d8 557 /******************************************************************************
dkato 0:702bf7b2b7d8 558 * Function Name: SSIF_PostAsyncCancel
dkato 0:702bf7b2b7d8 559 * @brief Cancel read or write request(s)
dkato 0:702bf7b2b7d8 560 *
dkato 0:702bf7b2b7d8 561 * Description:<br>
dkato 0:702bf7b2b7d8 562 *
dkato 0:702bf7b2b7d8 563 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 564 * @param[in,out] p_aio :aio control block to cancel or NULL to cancel all.
dkato 0:702bf7b2b7d8 565 * @retval none
dkato 0:702bf7b2b7d8 566 ******************************************************************************/
dkato 0:702bf7b2b7d8 567 void SSIF_PostAsyncCancel(ssif_info_ch_t* const p_info_ch, AIOCB* const p_aio)
dkato 0:702bf7b2b7d8 568 {
dkato 0:702bf7b2b7d8 569 int32_t ioif_ret;
dkato 0:702bf7b2b7d8 570
dkato 0:702bf7b2b7d8 571 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 572 {
dkato 0:702bf7b2b7d8 573 /* NON_NOTICE_ASSERT: illegal pointer */
dkato 0:702bf7b2b7d8 574 }
dkato 0:702bf7b2b7d8 575 else
dkato 0:702bf7b2b7d8 576 {
dkato 0:702bf7b2b7d8 577 if (NULL == p_aio)
dkato 0:702bf7b2b7d8 578 {
dkato 0:702bf7b2b7d8 579 ahf_cancelall(&p_info_ch->tx_que);
dkato 0:702bf7b2b7d8 580 ahf_cancelall(&p_info_ch->rx_que);
dkato 0:702bf7b2b7d8 581 }
dkato 0:702bf7b2b7d8 582 else
dkato 0:702bf7b2b7d8 583 {
dkato 0:702bf7b2b7d8 584 ioif_ret = ahf_cancel(&p_info_ch->tx_que, p_aio);
dkato 0:702bf7b2b7d8 585 if (ESUCCESS != ioif_ret)
dkato 0:702bf7b2b7d8 586 {
dkato 0:702bf7b2b7d8 587 /* NON_NOTICE_ASSERT: unexpected aioif error */
dkato 0:702bf7b2b7d8 588 }
dkato 0:702bf7b2b7d8 589
dkato 0:702bf7b2b7d8 590 ioif_ret = ahf_cancel(&p_info_ch->rx_que, p_aio);
dkato 0:702bf7b2b7d8 591 if (ESUCCESS != ioif_ret)
dkato 0:702bf7b2b7d8 592 {
dkato 0:702bf7b2b7d8 593 /* NON_NOTICE_ASSERT: unexpected aioif error */
dkato 0:702bf7b2b7d8 594 }
dkato 0:702bf7b2b7d8 595 }
dkato 0:702bf7b2b7d8 596 }
dkato 0:702bf7b2b7d8 597
dkato 0:702bf7b2b7d8 598 return;
dkato 0:702bf7b2b7d8 599 }
dkato 0:702bf7b2b7d8 600
dkato 0:702bf7b2b7d8 601 /******************************************************************************
dkato 0:702bf7b2b7d8 602 * Function Name: SSIF_IOCTL_ConfigChannel
dkato 0:702bf7b2b7d8 603 * @brief Save configuration to the SSIF driver.
dkato 0:702bf7b2b7d8 604 *
dkato 0:702bf7b2b7d8 605 * Description:<br>
dkato 0:702bf7b2b7d8 606 * Update channel object.
dkato 0:702bf7b2b7d8 607 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 608 * @param[in] p_ch_cfg :SSIF channel configuration parameter
dkato 0:702bf7b2b7d8 609 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 610 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 611 ******************************************************************************/
dkato 0:702bf7b2b7d8 612 int_t SSIF_IOCTL_ConfigChannel(ssif_info_ch_t* const p_info_ch,
dkato 0:702bf7b2b7d8 613 const ssif_channel_cfg_t* const p_ch_cfg)
dkato 0:702bf7b2b7d8 614 {
dkato 0:702bf7b2b7d8 615 int_t ercd;
dkato 0:702bf7b2b7d8 616
dkato 0:702bf7b2b7d8 617 if ((NULL == p_info_ch) || (NULL == p_ch_cfg))
dkato 0:702bf7b2b7d8 618 {
dkato 0:702bf7b2b7d8 619 ercd = EFAULT;
dkato 0:702bf7b2b7d8 620 }
dkato 0:702bf7b2b7d8 621 else
dkato 0:702bf7b2b7d8 622 {
dkato 0:702bf7b2b7d8 623 /* stop DMA transfer */
dkato 0:702bf7b2b7d8 624 ercd = SSIF_DisableChannel(p_info_ch);
dkato 0:702bf7b2b7d8 625
dkato 0:702bf7b2b7d8 626 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 627 {
dkato 0:702bf7b2b7d8 628 /* copy config data to channel info */
dkato 0:702bf7b2b7d8 629 ercd = SSIF_UpdateChannelConfig(p_info_ch, p_ch_cfg);
dkato 0:702bf7b2b7d8 630 }
dkato 0:702bf7b2b7d8 631
dkato 0:702bf7b2b7d8 632 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 633 {
dkato 0:702bf7b2b7d8 634 /* restart DMA transfer */
dkato 0:702bf7b2b7d8 635 ercd = SSIF_EnableChannel(p_info_ch);
dkato 0:702bf7b2b7d8 636 }
dkato 0:702bf7b2b7d8 637 }
dkato 0:702bf7b2b7d8 638
dkato 0:702bf7b2b7d8 639 return ercd;
dkato 0:702bf7b2b7d8 640 }
dkato 0:702bf7b2b7d8 641
dkato 0:702bf7b2b7d8 642 /******************************************************************************
dkato 0:702bf7b2b7d8 643 * Function Name: SSIF_IOCTL_GetStatus
dkato 0:702bf7b2b7d8 644 * @brief Get a value of SSISR register.
dkato 0:702bf7b2b7d8 645 *
dkato 0:702bf7b2b7d8 646 * Description:<br>
dkato 0:702bf7b2b7d8 647 *
dkato 0:702bf7b2b7d8 648 * @param[in] p_info_ch :channel object
dkato 0:702bf7b2b7d8 649 * @param[in,out] p_status :pointer of status value
dkato 0:702bf7b2b7d8 650 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 651 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 652 ******************************************************************************/
dkato 0:702bf7b2b7d8 653 int_t SSIF_IOCTL_GetStatus(const ssif_info_ch_t* const p_info_ch, uint32_t* const p_status)
dkato 0:702bf7b2b7d8 654 {
dkato 0:702bf7b2b7d8 655 int_t ret = ESUCCESS;
dkato 0:702bf7b2b7d8 656
dkato 0:702bf7b2b7d8 657 if ((NULL == p_info_ch) || (NULL == p_status))
dkato 0:702bf7b2b7d8 658 {
dkato 0:702bf7b2b7d8 659 ret = EFAULT;
dkato 0:702bf7b2b7d8 660 }
dkato 0:702bf7b2b7d8 661 else
dkato 0:702bf7b2b7d8 662 {
dkato 0:702bf7b2b7d8 663 *p_status = g_ssireg[p_info_ch->channel]->SSISR;
dkato 0:702bf7b2b7d8 664 }
dkato 0:702bf7b2b7d8 665
dkato 0:702bf7b2b7d8 666 return ret;
dkato 0:702bf7b2b7d8 667 }
dkato 0:702bf7b2b7d8 668
dkato 0:702bf7b2b7d8 669 /******************************************************************************
dkato 0:702bf7b2b7d8 670 * Function Name: SSIF_SWLtoLen
dkato 0:702bf7b2b7d8 671 * @brief Convert SSICR:SWL bits to system word length
dkato 0:702bf7b2b7d8 672 *
dkato 0:702bf7b2b7d8 673 * Description:<br>
dkato 0:702bf7b2b7d8 674 *
dkato 0:702bf7b2b7d8 675 * @param[in] ssicr_swl :SSICR register SWL field value(0 to 7)
dkato 0:702bf7b2b7d8 676 * @retval 8 to 256 :system word length(byte)
dkato 0:702bf7b2b7d8 677 ******************************************************************************/
dkato 0:702bf7b2b7d8 678 int_t SSIF_SWLtoLen(const ssif_chcfg_system_word_t ssicr_swl)
dkato 0:702bf7b2b7d8 679 {
dkato 0:702bf7b2b7d8 680 /* -> IPA M1.10.1 : This is conversion table that can't be macro-coding. */
dkato 0:702bf7b2b7d8 681 static const int_t decode_enum_swl[SSIF_CFG_SYSTEM_WORD_256+1] = {
dkato 0:702bf7b2b7d8 682 8, /* SSIF_CFG_SYSTEM_WORD_8 */
dkato 0:702bf7b2b7d8 683 16, /* SSIF_CFG_SYSTEM_WORD_16 */
dkato 0:702bf7b2b7d8 684 24, /* SSIF_CFG_SYSTEM_WORD_24 */
dkato 0:702bf7b2b7d8 685 32, /* SSIF_CFG_SYSTEM_WORD_32 */
dkato 0:702bf7b2b7d8 686 48, /* SSIF_CFG_SYSTEM_WORD_48 */
dkato 0:702bf7b2b7d8 687 64, /* SSIF_CFG_SYSTEM_WORD_64 */
dkato 0:702bf7b2b7d8 688 128, /* SSIF_CFG_SYSTEM_WORD_128 */
dkato 0:702bf7b2b7d8 689 256 /* SSIF_CFG_SYSTEM_WORD_256 */
dkato 0:702bf7b2b7d8 690 };
dkato 0:702bf7b2b7d8 691 /* <- IPA M1.10.1 */
dkato 0:702bf7b2b7d8 692
dkato 0:702bf7b2b7d8 693 return decode_enum_swl[ssicr_swl];
dkato 0:702bf7b2b7d8 694 }
dkato 0:702bf7b2b7d8 695
dkato 0:702bf7b2b7d8 696 /******************************************************************************
dkato 0:702bf7b2b7d8 697 * Function Name: SSIF_DWLtoLen
dkato 0:702bf7b2b7d8 698 * @brief Convert SSICR:DWL bits to data word length
dkato 0:702bf7b2b7d8 699 *
dkato 0:702bf7b2b7d8 700 * Description:<br>
dkato 0:702bf7b2b7d8 701 *
dkato 0:702bf7b2b7d8 702 * @param[in] ssicr_dwl :SSICR register DWL field value(0 to 6)
dkato 0:702bf7b2b7d8 703 * @retval 8 to 32 :data word length(byte)
dkato 0:702bf7b2b7d8 704 ******************************************************************************/
dkato 0:702bf7b2b7d8 705 int_t SSIF_DWLtoLen(const ssif_chcfg_data_word_t ssicr_dwl)
dkato 0:702bf7b2b7d8 706 {
dkato 0:702bf7b2b7d8 707 /* -> IPA M1.10.1 : This is conversion table that can't be macro-coding. */
dkato 0:702bf7b2b7d8 708 static const int_t decode_enum_dwl[SSIF_CFG_DATA_WORD_32+1] = {
dkato 0:702bf7b2b7d8 709 8, /* SSIF_CFG_DATA_WORD_8 */
dkato 0:702bf7b2b7d8 710 16, /* SSIF_CFG_DATA_WORD_16 */
dkato 0:702bf7b2b7d8 711 18, /* SSIF_CFG_DATA_WORD_18 */
dkato 0:702bf7b2b7d8 712 20, /* SSIF_CFG_DATA_WORD_20 */
dkato 0:702bf7b2b7d8 713 22, /* SSIF_CFG_DATA_WORD_22 */
dkato 0:702bf7b2b7d8 714 24, /* SSIF_CFG_DATA_WORD_24 */
dkato 0:702bf7b2b7d8 715 32 /* SSIF_CFG_DATA_WORD_32 */
dkato 0:702bf7b2b7d8 716 };
dkato 0:702bf7b2b7d8 717 /* <- IPA M1.10.1 */
dkato 0:702bf7b2b7d8 718
dkato 0:702bf7b2b7d8 719 return decode_enum_dwl[ssicr_dwl];
dkato 0:702bf7b2b7d8 720 }
dkato 0:702bf7b2b7d8 721
dkato 0:702bf7b2b7d8 722 /******************************************************************************
dkato 0:702bf7b2b7d8 723 Private functions
dkato 0:702bf7b2b7d8 724 ******************************************************************************/
dkato 0:702bf7b2b7d8 725
dkato 0:702bf7b2b7d8 726 /******************************************************************************
dkato 0:702bf7b2b7d8 727 * Function Name: SSIF_InitChannel
dkato 0:702bf7b2b7d8 728 * @brief Initialize for the SSIF channel
dkato 0:702bf7b2b7d8 729 *
dkato 0:702bf7b2b7d8 730 * Description:<br>
dkato 0:702bf7b2b7d8 731 * Create semaphore and queue for channel.<br>
dkato 0:702bf7b2b7d8 732 * And setup SSIF pin.
dkato 0:702bf7b2b7d8 733 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 734 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 735 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 736 ******************************************************************************/
dkato 0:702bf7b2b7d8 737 static int_t SSIF_InitChannel(ssif_info_ch_t* const p_info_ch)
dkato 0:702bf7b2b7d8 738 {
dkato 0:702bf7b2b7d8 739 int32_t os_ret;
dkato 0:702bf7b2b7d8 740 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 741 int_t ercd = ESUCCESS;
dkato 0:702bf7b2b7d8 742 static const osSemaphoreDef_t* semdef_access[SSIF_NUM_CHANS] =
dkato 0:702bf7b2b7d8 743 {
dkato 0:702bf7b2b7d8 744 osSemaphore(ssif_ch0_access),
dkato 0:702bf7b2b7d8 745 osSemaphore(ssif_ch1_access),
dkato 0:702bf7b2b7d8 746 osSemaphore(ssif_ch2_access),
dkato 0:702bf7b2b7d8 747 osSemaphore(ssif_ch3_access),
dkato 0:702bf7b2b7d8 748 osSemaphore(ssif_ch4_access),
dkato 0:702bf7b2b7d8 749 osSemaphore(ssif_ch5_access)
dkato 0:702bf7b2b7d8 750 };
dkato 0:702bf7b2b7d8 751 static const bool_t is_duplex_ch[SSIF_NUM_CHANS] =
dkato 0:702bf7b2b7d8 752 {
dkato 0:702bf7b2b7d8 753 true, /* SSIF0 is full duplex channel */
dkato 0:702bf7b2b7d8 754 true, /* SSIF1 is full duplex channel */
dkato 0:702bf7b2b7d8 755 false, /* SSIF2 is half duplex channel */
dkato 0:702bf7b2b7d8 756 true, /* SSIF3 is full duplex channel */
dkato 0:702bf7b2b7d8 757 false, /* SSIF4 is half duplex channel */
dkato 0:702bf7b2b7d8 758 true /* SSIF5 is full duplex channel */
dkato 0:702bf7b2b7d8 759 };
dkato 0:702bf7b2b7d8 760
dkato 0:702bf7b2b7d8 761 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 762 {
dkato 0:702bf7b2b7d8 763 ercd = EFAULT;
dkato 0:702bf7b2b7d8 764 }
dkato 0:702bf7b2b7d8 765 else
dkato 0:702bf7b2b7d8 766 {
dkato 0:702bf7b2b7d8 767 ssif_ch = p_info_ch->channel;
dkato 0:702bf7b2b7d8 768
dkato 0:702bf7b2b7d8 769 p_info_ch->is_full_duplex = is_duplex_ch[ssif_ch];
dkato 0:702bf7b2b7d8 770
dkato 0:702bf7b2b7d8 771 /* Create sem_access semaphore */
dkato 0:702bf7b2b7d8 772 p_info_ch->sem_access = osSemaphoreCreate(semdef_access[ssif_ch], 1);
dkato 0:702bf7b2b7d8 773
dkato 0:702bf7b2b7d8 774 if (NULL == p_info_ch->sem_access)
dkato 0:702bf7b2b7d8 775 {
dkato 0:702bf7b2b7d8 776 ercd = ENOMEM;
dkato 0:702bf7b2b7d8 777 }
dkato 0:702bf7b2b7d8 778
dkato 0:702bf7b2b7d8 779 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 780 {
dkato 0:702bf7b2b7d8 781 ercd = ahf_create(&p_info_ch->tx_que, AHF_LOCKINT);
dkato 0:702bf7b2b7d8 782 if (ESUCCESS != ercd)
dkato 0:702bf7b2b7d8 783 {
dkato 0:702bf7b2b7d8 784 ercd = ENOMEM;
dkato 0:702bf7b2b7d8 785 }
dkato 0:702bf7b2b7d8 786 }
dkato 0:702bf7b2b7d8 787
dkato 0:702bf7b2b7d8 788 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 789 {
dkato 0:702bf7b2b7d8 790 ercd = ahf_create(&p_info_ch->rx_que, AHF_LOCKINT);
dkato 0:702bf7b2b7d8 791 if (ESUCCESS != ercd)
dkato 0:702bf7b2b7d8 792 {
dkato 0:702bf7b2b7d8 793 ercd = ENOMEM;
dkato 0:702bf7b2b7d8 794 }
dkato 0:702bf7b2b7d8 795 }
dkato 0:702bf7b2b7d8 796
dkato 0:702bf7b2b7d8 797 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 798 {
dkato 0:702bf7b2b7d8 799 /* set channel initialize */
dkato 0:702bf7b2b7d8 800 p_info_ch->openflag = 0;
dkato 0:702bf7b2b7d8 801
dkato 0:702bf7b2b7d8 802 p_info_ch->p_aio_tx_curr = NULL; /* tx request pointer */
dkato 0:702bf7b2b7d8 803 p_info_ch->p_aio_tx_next = NULL; /* tx request pointer */
dkato 0:702bf7b2b7d8 804 p_info_ch->p_aio_rx_curr = NULL; /* rx request pointer */
dkato 0:702bf7b2b7d8 805 p_info_ch->p_aio_rx_next = NULL; /* rx request pointer */
dkato 0:702bf7b2b7d8 806 }
dkato 0:702bf7b2b7d8 807
dkato 0:702bf7b2b7d8 808 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 809 {
dkato 0:702bf7b2b7d8 810 ercd = R_SSIF_Userdef_InitPinMux(ssif_ch);
dkato 0:702bf7b2b7d8 811 }
dkato 0:702bf7b2b7d8 812
dkato 0:702bf7b2b7d8 813 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 814 {
dkato 0:702bf7b2b7d8 815 p_info_ch->ch_stat = SSIF_CHSTS_INIT;
dkato 0:702bf7b2b7d8 816 }
dkato 0:702bf7b2b7d8 817 else
dkato 0:702bf7b2b7d8 818 {
dkato 0:702bf7b2b7d8 819 if (NULL != p_info_ch->sem_access)
dkato 0:702bf7b2b7d8 820 {
dkato 0:702bf7b2b7d8 821 os_ret = osSemaphoreDelete(p_info_ch->sem_access);
dkato 0:702bf7b2b7d8 822 if (osOK != os_ret)
dkato 0:702bf7b2b7d8 823 {
dkato 0:702bf7b2b7d8 824 /* NON_NOTICE_ASSERT: unexpected semaphore error */
dkato 0:702bf7b2b7d8 825 }
dkato 0:702bf7b2b7d8 826 p_info_ch->sem_access = NULL;
dkato 0:702bf7b2b7d8 827 }
dkato 0:702bf7b2b7d8 828 }
dkato 0:702bf7b2b7d8 829 }
dkato 0:702bf7b2b7d8 830
dkato 0:702bf7b2b7d8 831 return ercd;
dkato 0:702bf7b2b7d8 832 }
dkato 0:702bf7b2b7d8 833
dkato 0:702bf7b2b7d8 834 /******************************************************************************
dkato 0:702bf7b2b7d8 835 * Function Name: SSIF_UnInitChannel
dkato 0:702bf7b2b7d8 836 * @brief Uninitialise the SSIF channel.
dkato 0:702bf7b2b7d8 837 *
dkato 0:702bf7b2b7d8 838 * Description:<br>
dkato 0:702bf7b2b7d8 839 *
dkato 0:702bf7b2b7d8 840 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 841 * @retval none
dkato 0:702bf7b2b7d8 842 ******************************************************************************/
dkato 0:702bf7b2b7d8 843 static void SSIF_UnInitChannel(ssif_info_ch_t* const p_info_ch)
dkato 0:702bf7b2b7d8 844 {
dkato 0:702bf7b2b7d8 845 int32_t os_ret;
dkato 0:702bf7b2b7d8 846 int_t was_masked;
dkato 0:702bf7b2b7d8 847 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 848
dkato 0:702bf7b2b7d8 849 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 850 {
dkato 0:702bf7b2b7d8 851 /* NON_NOTICE_ASSERT: illegal pointer */
dkato 0:702bf7b2b7d8 852 }
dkato 0:702bf7b2b7d8 853 else
dkato 0:702bf7b2b7d8 854 {
dkato 0:702bf7b2b7d8 855 ssif_ch = p_info_ch->channel;
dkato 0:702bf7b2b7d8 856
dkato 0:702bf7b2b7d8 857 if (SSIF_CHSTS_INIT != p_info_ch->ch_stat)
dkato 0:702bf7b2b7d8 858 {
dkato 0:702bf7b2b7d8 859 /* NON_NOTICE_ASSERT: unexpected channel status */
dkato 0:702bf7b2b7d8 860 }
dkato 0:702bf7b2b7d8 861
dkato 0:702bf7b2b7d8 862 p_info_ch->ch_stat = SSIF_CHSTS_UNINIT;
dkato 0:702bf7b2b7d8 863
dkato 0:702bf7b2b7d8 864 SSIF_DisableErrorInterrupt(ssif_ch);
dkato 0:702bf7b2b7d8 865
dkato 0:702bf7b2b7d8 866 was_masked = __disable_irq();
dkato 0:702bf7b2b7d8 867
dkato 0:702bf7b2b7d8 868 /* delete the tx queue */
dkato 0:702bf7b2b7d8 869 ahf_cancelall(&p_info_ch->tx_que);
dkato 0:702bf7b2b7d8 870 ahf_destroy(&p_info_ch->tx_que);
dkato 0:702bf7b2b7d8 871
dkato 0:702bf7b2b7d8 872 /* delete the rx queue */
dkato 0:702bf7b2b7d8 873 ahf_cancelall(&p_info_ch->rx_que);
dkato 0:702bf7b2b7d8 874 ahf_destroy(&p_info_ch->rx_que);
dkato 0:702bf7b2b7d8 875
dkato 0:702bf7b2b7d8 876 /* delete the private semaphore */
dkato 0:702bf7b2b7d8 877 os_ret = osSemaphoreDelete(p_info_ch->sem_access);
dkato 0:702bf7b2b7d8 878 if (osOK != os_ret)
dkato 0:702bf7b2b7d8 879 {
dkato 0:702bf7b2b7d8 880 /* NON_NOTICE_ASSERT: unexpected semaphore error */
dkato 0:702bf7b2b7d8 881 }
dkato 0:702bf7b2b7d8 882
dkato 0:702bf7b2b7d8 883 SSIF_InterruptShutdown(ssif_ch);
dkato 0:702bf7b2b7d8 884
dkato 0:702bf7b2b7d8 885 if (0 == was_masked)
dkato 0:702bf7b2b7d8 886 {
dkato 0:702bf7b2b7d8 887 __enable_irq();
dkato 0:702bf7b2b7d8 888 }
dkato 0:702bf7b2b7d8 889 }
dkato 0:702bf7b2b7d8 890
dkato 0:702bf7b2b7d8 891 return;
dkato 0:702bf7b2b7d8 892 }
dkato 0:702bf7b2b7d8 893
dkato 0:702bf7b2b7d8 894 /******************************************************************************
dkato 0:702bf7b2b7d8 895 * Function Name: SSIF_UpdateChannelConfig
dkato 0:702bf7b2b7d8 896 * @brief Save configuration to the SSIF driver.
dkato 0:702bf7b2b7d8 897 *
dkato 0:702bf7b2b7d8 898 * Description:<br>
dkato 0:702bf7b2b7d8 899 * Update channel object.
dkato 0:702bf7b2b7d8 900 * @param[in,out] p_info_ch :channel object
dkato 0:702bf7b2b7d8 901 * @param[in] p_ch_cfg :SSIF channel configuration parameter
dkato 0:702bf7b2b7d8 902 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 903 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 904 ******************************************************************************/
dkato 0:702bf7b2b7d8 905 static int_t SSIF_UpdateChannelConfig(ssif_info_ch_t* const p_info_ch,
dkato 0:702bf7b2b7d8 906 const ssif_channel_cfg_t* const p_ch_cfg)
dkato 0:702bf7b2b7d8 907 {
dkato 0:702bf7b2b7d8 908 int_t ercd;
dkato 0:702bf7b2b7d8 909
dkato 0:702bf7b2b7d8 910 if ((NULL == p_info_ch) || (NULL == p_ch_cfg))
dkato 0:702bf7b2b7d8 911 {
dkato 0:702bf7b2b7d8 912 ercd = EFAULT;
dkato 0:702bf7b2b7d8 913 }
dkato 0:702bf7b2b7d8 914 else
dkato 0:702bf7b2b7d8 915 {
dkato 0:702bf7b2b7d8 916 ercd = SSIF_CheckChannelCfg(p_ch_cfg);
dkato 0:702bf7b2b7d8 917
dkato 0:702bf7b2b7d8 918 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 919 {
dkato 0:702bf7b2b7d8 920 p_info_ch->slave_mode = p_ch_cfg->slave_mode;
dkato 0:702bf7b2b7d8 921
dkato 0:702bf7b2b7d8 922 if (false != p_info_ch->slave_mode)
dkato 0:702bf7b2b7d8 923 {
dkato 0:702bf7b2b7d8 924 /* slave mode */
dkato 0:702bf7b2b7d8 925 p_info_ch->clock_direction = SSIF_CFG_CLOCK_IN;
dkato 0:702bf7b2b7d8 926 p_info_ch->ws_direction = SSIF_CFG_WS_IN;
dkato 0:702bf7b2b7d8 927 }
dkato 0:702bf7b2b7d8 928 else
dkato 0:702bf7b2b7d8 929 {
dkato 0:702bf7b2b7d8 930 /* master mode */
dkato 0:702bf7b2b7d8 931 p_info_ch->clock_direction = SSIF_CFG_CLOCK_OUT;
dkato 0:702bf7b2b7d8 932 p_info_ch->ws_direction = SSIF_CFG_WS_OUT;
dkato 0:702bf7b2b7d8 933
dkato 0:702bf7b2b7d8 934 /* when master mode, always disable noise cancel */
dkato 0:702bf7b2b7d8 935 p_info_ch->noise_cancel = SSIF_CFG_DISABLE_NOISE_CANCEL;
dkato 0:702bf7b2b7d8 936 }
dkato 0:702bf7b2b7d8 937
dkato 0:702bf7b2b7d8 938 p_info_ch->sample_freq = p_ch_cfg->sample_freq;
dkato 0:702bf7b2b7d8 939
dkato 0:702bf7b2b7d8 940 p_info_ch->clk_select = p_ch_cfg->clk_select;
dkato 0:702bf7b2b7d8 941 p_info_ch->multi_ch = p_ch_cfg->multi_ch;
dkato 0:702bf7b2b7d8 942 p_info_ch->data_word = p_ch_cfg->data_word;
dkato 0:702bf7b2b7d8 943 p_info_ch->system_word = p_ch_cfg->system_word;
dkato 0:702bf7b2b7d8 944 p_info_ch->bclk_pol = p_ch_cfg->bclk_pol;
dkato 0:702bf7b2b7d8 945 p_info_ch->ws_pol = p_ch_cfg->ws_pol;
dkato 0:702bf7b2b7d8 946 p_info_ch->padding_pol = p_ch_cfg->padding_pol;
dkato 0:702bf7b2b7d8 947 p_info_ch->serial_alignment = p_ch_cfg->serial_alignment;
dkato 0:702bf7b2b7d8 948 p_info_ch->parallel_alignment = p_ch_cfg->parallel_alignment;
dkato 0:702bf7b2b7d8 949 p_info_ch->ws_delay = p_ch_cfg->ws_delay;
dkato 0:702bf7b2b7d8 950 p_info_ch->noise_cancel = p_ch_cfg->noise_cancel;
dkato 0:702bf7b2b7d8 951 p_info_ch->tdm_mode = p_ch_cfg->tdm_mode;
dkato 0:702bf7b2b7d8 952 p_info_ch->romdec_direct.mode = p_ch_cfg->romdec_direct.mode;
dkato 0:702bf7b2b7d8 953 p_info_ch->romdec_direct.p_cbfunc = p_ch_cfg->romdec_direct.p_cbfunc;
dkato 0:702bf7b2b7d8 954
dkato 0:702bf7b2b7d8 955 if (SSIF_CFG_ENABLE_TDM == p_info_ch->tdm_mode)
dkato 0:702bf7b2b7d8 956 {
dkato 0:702bf7b2b7d8 957 /* check combination of parameters */
dkato 0:702bf7b2b7d8 958 if ((SSIF_CFG_MULTI_CH_1 == p_info_ch->multi_ch)
dkato 0:702bf7b2b7d8 959 || (SSIF_CFG_WS_HIGH == p_info_ch->ws_pol))
dkato 0:702bf7b2b7d8 960 {
dkato 0:702bf7b2b7d8 961 ercd = EINVAL;
dkato 0:702bf7b2b7d8 962 }
dkato 0:702bf7b2b7d8 963 }
dkato 0:702bf7b2b7d8 964 }
dkato 0:702bf7b2b7d8 965
dkato 0:702bf7b2b7d8 966 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 967 {
dkato 0:702bf7b2b7d8 968 ercd = SSIF_CheckWordSize(p_info_ch);
dkato 0:702bf7b2b7d8 969 }
dkato 0:702bf7b2b7d8 970
dkato 0:702bf7b2b7d8 971 if (ESUCCESS == ercd)
dkato 0:702bf7b2b7d8 972 {
dkato 0:702bf7b2b7d8 973 if (false == p_info_ch->slave_mode)
dkato 0:702bf7b2b7d8 974 {
dkato 0:702bf7b2b7d8 975 /* Master: call user own clock setting function */
dkato 0:702bf7b2b7d8 976 ercd = R_SSIF_Userdef_SetClockDiv(p_ch_cfg, &p_info_ch->clk_div);
dkato 0:702bf7b2b7d8 977 }
dkato 0:702bf7b2b7d8 978 else
dkato 0:702bf7b2b7d8 979 {
dkato 0:702bf7b2b7d8 980 /* Slave: set dummy value for clear */
dkato 0:702bf7b2b7d8 981 p_info_ch->clk_div = SSIF_CFG_CKDV_BITS_1;
dkato 0:702bf7b2b7d8 982 }
dkato 0:702bf7b2b7d8 983 }
dkato 0:702bf7b2b7d8 984 }
dkato 0:702bf7b2b7d8 985
dkato 0:702bf7b2b7d8 986 return ercd;
dkato 0:702bf7b2b7d8 987 }
dkato 0:702bf7b2b7d8 988
dkato 0:702bf7b2b7d8 989 /******************************************************************************
dkato 0:702bf7b2b7d8 990 * Function Name: SSIF_SetCtrlParams
dkato 0:702bf7b2b7d8 991 * @brief Set SSIF configuration to hardware.
dkato 0:702bf7b2b7d8 992 *
dkato 0:702bf7b2b7d8 993 * Description:<br>
dkato 0:702bf7b2b7d8 994 * Update SSICR register.
dkato 0:702bf7b2b7d8 995 * @param[in] p_info_ch :channel object
dkato 0:702bf7b2b7d8 996 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 997 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 998 ******************************************************************************/
dkato 0:702bf7b2b7d8 999 static int_t SSIF_SetCtrlParams(const ssif_info_ch_t* const p_info_ch)
dkato 0:702bf7b2b7d8 1000 {
dkato 0:702bf7b2b7d8 1001 int_t ret = ESUCCESS;
dkato 0:702bf7b2b7d8 1002 int_t was_masked;
dkato 0:702bf7b2b7d8 1003 uint32_t ssif_ch;
dkato 0:702bf7b2b7d8 1004 static const uint32_t gpio_sncr_bit[SSIF_NUM_CHANS] =
dkato 0:702bf7b2b7d8 1005 {
dkato 0:702bf7b2b7d8 1006 GPIO_SNCR_BIT_SSI0NCE, /* SSIF0 */
dkato 0:702bf7b2b7d8 1007 GPIO_SNCR_BIT_SSI1NCE, /* SSIF1 */
dkato 0:702bf7b2b7d8 1008 GPIO_SNCR_BIT_SSI2NCE, /* SSIF2 */
dkato 0:702bf7b2b7d8 1009 GPIO_SNCR_BIT_SSI3NCE, /* SSIF3 */
dkato 0:702bf7b2b7d8 1010 GPIO_SNCR_BIT_SSI4NCE, /* SSIF4 */
dkato 0:702bf7b2b7d8 1011 GPIO_SNCR_BIT_SSI5NCE /* SSIF5 */
dkato 0:702bf7b2b7d8 1012 };
dkato 0:702bf7b2b7d8 1013
dkato 0:702bf7b2b7d8 1014 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 1015 {
dkato 0:702bf7b2b7d8 1016 ret = EFAULT;
dkato 0:702bf7b2b7d8 1017 }
dkato 0:702bf7b2b7d8 1018 else
dkato 0:702bf7b2b7d8 1019 {
dkato 0:702bf7b2b7d8 1020 ssif_ch = p_info_ch->channel;
dkato 0:702bf7b2b7d8 1021
dkato 0:702bf7b2b7d8 1022 /* ALL CLEAR */
dkato 0:702bf7b2b7d8 1023 g_ssireg[ssif_ch]->SSICR = 0u;
dkato 0:702bf7b2b7d8 1024 g_ssireg[ssif_ch]->SSISR = 0u;
dkato 0:702bf7b2b7d8 1025 g_ssireg[ssif_ch]->SSIFCCR = 0u;
dkato 0:702bf7b2b7d8 1026
dkato 0:702bf7b2b7d8 1027 g_ssireg[ssif_ch]->SSICR = (uint32_t)(
dkato 0:702bf7b2b7d8 1028 ((uint32_t)(p_info_ch->clk_select) << SSIF_CR_SHIFT_CKS) |
dkato 0:702bf7b2b7d8 1029 ((uint32_t)(p_info_ch->multi_ch) << SSIF_CR_SHIFT_CHNL) |
dkato 0:702bf7b2b7d8 1030 ((uint32_t)(p_info_ch->data_word) << SSIF_CR_SHIFT_DWL) |
dkato 0:702bf7b2b7d8 1031 ((uint32_t)(p_info_ch->system_word) << SSIF_CR_SHIFT_SWL) |
dkato 0:702bf7b2b7d8 1032 ((uint32_t)(p_info_ch->bclk_pol) << SSIF_CR_SHIFT_SCKP) |
dkato 0:702bf7b2b7d8 1033 ((uint32_t)(p_info_ch->ws_pol) << SSIF_CR_SHIFT_SWSP) |
dkato 0:702bf7b2b7d8 1034 ((uint32_t)(p_info_ch->padding_pol) << SSIF_CR_SHIFT_SPDP) |
dkato 0:702bf7b2b7d8 1035 ((uint32_t)(p_info_ch->serial_alignment) << SSIF_CR_SHIFT_SDTA) |
dkato 0:702bf7b2b7d8 1036 ((uint32_t)(p_info_ch->parallel_alignment) << SSIF_CR_SHIFT_PDTA) |
dkato 0:702bf7b2b7d8 1037 ((uint32_t)(p_info_ch->ws_delay) << SSIF_CR_SHIFT_DEL) |
dkato 0:702bf7b2b7d8 1038 ((uint32_t)(p_info_ch->clock_direction) << SSIF_CR_SHIFT_SCKD) |
dkato 0:702bf7b2b7d8 1039 ((uint32_t)(p_info_ch->ws_direction) << SSIF_CR_SHIFT_SWSD) |
dkato 0:702bf7b2b7d8 1040 ((uint32_t)(p_info_ch->clk_div) << SSIF_CR_SHIFT_CKDV)
dkato 0:702bf7b2b7d8 1041 );
dkato 0:702bf7b2b7d8 1042
dkato 0:702bf7b2b7d8 1043 g_ssireg[ssif_ch]->SSITDMR = ((uint32_t)(p_info_ch->tdm_mode) << SSIF_TDMR_SHIFT_TDM);
dkato 0:702bf7b2b7d8 1044
dkato 0:702bf7b2b7d8 1045 /* change SNCR register: enter exclusive */
dkato 0:702bf7b2b7d8 1046 was_masked = __disable_irq();
dkato 0:702bf7b2b7d8 1047
dkato 0:702bf7b2b7d8 1048 if ((SSIF_CFG_ENABLE_NOISE_CANCEL == p_info_ch->noise_cancel)
dkato 0:702bf7b2b7d8 1049 && (false != p_info_ch->slave_mode))
dkato 0:702bf7b2b7d8 1050 {
dkato 0:702bf7b2b7d8 1051 /* ENABLE_NOISE_CANCEL && slave mode */
dkato 0:702bf7b2b7d8 1052 GPIO.SNCR |= (uint32_t)gpio_sncr_bit[ssif_ch];
dkato 0:702bf7b2b7d8 1053 }
dkato 0:702bf7b2b7d8 1054 else
dkato 0:702bf7b2b7d8 1055 {
dkato 0:702bf7b2b7d8 1056 /* DISABLE_NOISE_CANCEL || master mode */
dkato 0:702bf7b2b7d8 1057 GPIO.SNCR &= ~((uint32_t)gpio_sncr_bit[ssif_ch]);
dkato 0:702bf7b2b7d8 1058 }
dkato 0:702bf7b2b7d8 1059
dkato 0:702bf7b2b7d8 1060 /* change SNCR register: exit exclusive */
dkato 0:702bf7b2b7d8 1061 if (0 == was_masked)
dkato 0:702bf7b2b7d8 1062 {
dkato 0:702bf7b2b7d8 1063 __enable_irq();
dkato 0:702bf7b2b7d8 1064 }
dkato 0:702bf7b2b7d8 1065 }
dkato 0:702bf7b2b7d8 1066
dkato 0:702bf7b2b7d8 1067 return ret;
dkato 0:702bf7b2b7d8 1068 }
dkato 0:702bf7b2b7d8 1069
dkato 0:702bf7b2b7d8 1070 /******************************************************************************
dkato 0:702bf7b2b7d8 1071 * Function Name: SSIF_CheckChannelCfg
dkato 0:702bf7b2b7d8 1072 * @brief Check channel configuration parameters are valid or not.
dkato 0:702bf7b2b7d8 1073 *
dkato 0:702bf7b2b7d8 1074 * Description:<br>
dkato 0:702bf7b2b7d8 1075 *
dkato 0:702bf7b2b7d8 1076 * @param[in] p_ch_cfg :channel configuration
dkato 0:702bf7b2b7d8 1077 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 1078 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 1079 ******************************************************************************/
dkato 0:702bf7b2b7d8 1080 static int_t SSIF_CheckChannelCfg(const ssif_channel_cfg_t* const p_ch_cfg)
dkato 0:702bf7b2b7d8 1081 {
dkato 0:702bf7b2b7d8 1082 int_t ret = ESUCCESS;
dkato 0:702bf7b2b7d8 1083
dkato 0:702bf7b2b7d8 1084 if (NULL == p_ch_cfg)
dkato 0:702bf7b2b7d8 1085 {
dkato 0:702bf7b2b7d8 1086 ret = EFAULT;
dkato 0:702bf7b2b7d8 1087 }
dkato 0:702bf7b2b7d8 1088 else
dkato 0:702bf7b2b7d8 1089 {
dkato 0:702bf7b2b7d8 1090 switch (p_ch_cfg->clk_select)
dkato 0:702bf7b2b7d8 1091 {
dkato 0:702bf7b2b7d8 1092 case SSIF_CFG_CKS_AUDIO_X1:
dkato 0:702bf7b2b7d8 1093 /* fall through */
dkato 0:702bf7b2b7d8 1094 case SSIF_CFG_CKS_AUDIO_CLK:
dkato 0:702bf7b2b7d8 1095 /* do nothing */
dkato 0:702bf7b2b7d8 1096 break;
dkato 0:702bf7b2b7d8 1097 default:
dkato 0:702bf7b2b7d8 1098 ret = EINVAL;
dkato 0:702bf7b2b7d8 1099 break;
dkato 0:702bf7b2b7d8 1100 }
dkato 0:702bf7b2b7d8 1101
dkato 0:702bf7b2b7d8 1102 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1103 {
dkato 0:702bf7b2b7d8 1104 switch (p_ch_cfg->multi_ch)
dkato 0:702bf7b2b7d8 1105 {
dkato 0:702bf7b2b7d8 1106 case SSIF_CFG_MULTI_CH_1:
dkato 0:702bf7b2b7d8 1107 /* fall through */
dkato 0:702bf7b2b7d8 1108 case SSIF_CFG_MULTI_CH_2:
dkato 0:702bf7b2b7d8 1109 /* fall through */
dkato 0:702bf7b2b7d8 1110 case SSIF_CFG_MULTI_CH_3:
dkato 0:702bf7b2b7d8 1111 /* fall through */
dkato 0:702bf7b2b7d8 1112 case SSIF_CFG_MULTI_CH_4:
dkato 0:702bf7b2b7d8 1113 /* do nothing */
dkato 0:702bf7b2b7d8 1114 break;
dkato 0:702bf7b2b7d8 1115 default:
dkato 0:702bf7b2b7d8 1116 ret = EINVAL;
dkato 0:702bf7b2b7d8 1117 break;
dkato 0:702bf7b2b7d8 1118 }
dkato 0:702bf7b2b7d8 1119 }
dkato 0:702bf7b2b7d8 1120
dkato 0:702bf7b2b7d8 1121 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1122 {
dkato 0:702bf7b2b7d8 1123 switch (p_ch_cfg->data_word)
dkato 0:702bf7b2b7d8 1124 {
dkato 0:702bf7b2b7d8 1125 case SSIF_CFG_DATA_WORD_8:
dkato 0:702bf7b2b7d8 1126 /* fall through */
dkato 0:702bf7b2b7d8 1127 case SSIF_CFG_DATA_WORD_16:
dkato 0:702bf7b2b7d8 1128 /* fall through */
dkato 0:702bf7b2b7d8 1129 case SSIF_CFG_DATA_WORD_18:
dkato 0:702bf7b2b7d8 1130 /* fall through */
dkato 0:702bf7b2b7d8 1131 case SSIF_CFG_DATA_WORD_20:
dkato 0:702bf7b2b7d8 1132 /* fall through */
dkato 0:702bf7b2b7d8 1133 case SSIF_CFG_DATA_WORD_22:
dkato 0:702bf7b2b7d8 1134 /* fall through */
dkato 0:702bf7b2b7d8 1135 case SSIF_CFG_DATA_WORD_24:
dkato 0:702bf7b2b7d8 1136 /* fall through */
dkato 0:702bf7b2b7d8 1137 case SSIF_CFG_DATA_WORD_32:
dkato 0:702bf7b2b7d8 1138 /* do nothing */
dkato 0:702bf7b2b7d8 1139 break;
dkato 0:702bf7b2b7d8 1140 default:
dkato 0:702bf7b2b7d8 1141 ret = EINVAL;
dkato 0:702bf7b2b7d8 1142 break;
dkato 0:702bf7b2b7d8 1143 }
dkato 0:702bf7b2b7d8 1144 }
dkato 0:702bf7b2b7d8 1145
dkato 0:702bf7b2b7d8 1146 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1147 {
dkato 0:702bf7b2b7d8 1148 switch (p_ch_cfg->system_word)
dkato 0:702bf7b2b7d8 1149 {
dkato 0:702bf7b2b7d8 1150 case SSIF_CFG_SYSTEM_WORD_8:
dkato 0:702bf7b2b7d8 1151 /* fall through */
dkato 0:702bf7b2b7d8 1152 case SSIF_CFG_SYSTEM_WORD_16:
dkato 0:702bf7b2b7d8 1153 /* fall through */
dkato 0:702bf7b2b7d8 1154 case SSIF_CFG_SYSTEM_WORD_24:
dkato 0:702bf7b2b7d8 1155 /* fall through */
dkato 0:702bf7b2b7d8 1156 case SSIF_CFG_SYSTEM_WORD_32:
dkato 0:702bf7b2b7d8 1157 /* fall through */
dkato 0:702bf7b2b7d8 1158 case SSIF_CFG_SYSTEM_WORD_48:
dkato 0:702bf7b2b7d8 1159 /* fall through */
dkato 0:702bf7b2b7d8 1160 case SSIF_CFG_SYSTEM_WORD_64:
dkato 0:702bf7b2b7d8 1161 /* fall through */
dkato 0:702bf7b2b7d8 1162 case SSIF_CFG_SYSTEM_WORD_128:
dkato 0:702bf7b2b7d8 1163 /* fall through */
dkato 0:702bf7b2b7d8 1164 case SSIF_CFG_SYSTEM_WORD_256:
dkato 0:702bf7b2b7d8 1165 /* do nothing */
dkato 0:702bf7b2b7d8 1166 break;
dkato 0:702bf7b2b7d8 1167 default:
dkato 0:702bf7b2b7d8 1168 ret = EINVAL;
dkato 0:702bf7b2b7d8 1169 break;
dkato 0:702bf7b2b7d8 1170 }
dkato 0:702bf7b2b7d8 1171 }
dkato 0:702bf7b2b7d8 1172
dkato 0:702bf7b2b7d8 1173 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1174 {
dkato 0:702bf7b2b7d8 1175 switch (p_ch_cfg->bclk_pol)
dkato 0:702bf7b2b7d8 1176 {
dkato 0:702bf7b2b7d8 1177 case SSIF_CFG_FALLING:
dkato 0:702bf7b2b7d8 1178 /* fall through */
dkato 0:702bf7b2b7d8 1179 case SSIF_CFG_RISING:
dkato 0:702bf7b2b7d8 1180 /* do nothing */
dkato 0:702bf7b2b7d8 1181 break;
dkato 0:702bf7b2b7d8 1182 default:
dkato 0:702bf7b2b7d8 1183 ret = EINVAL;
dkato 0:702bf7b2b7d8 1184 break;
dkato 0:702bf7b2b7d8 1185 }
dkato 0:702bf7b2b7d8 1186 }
dkato 0:702bf7b2b7d8 1187
dkato 0:702bf7b2b7d8 1188 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1189 {
dkato 0:702bf7b2b7d8 1190 switch (p_ch_cfg->ws_pol)
dkato 0:702bf7b2b7d8 1191 {
dkato 0:702bf7b2b7d8 1192 case SSIF_CFG_WS_LOW:
dkato 0:702bf7b2b7d8 1193 /* fall through */
dkato 0:702bf7b2b7d8 1194 case SSIF_CFG_WS_HIGH:
dkato 0:702bf7b2b7d8 1195 /* do nothing */
dkato 0:702bf7b2b7d8 1196 break;
dkato 0:702bf7b2b7d8 1197 default:
dkato 0:702bf7b2b7d8 1198 ret = EINVAL;
dkato 0:702bf7b2b7d8 1199 break;
dkato 0:702bf7b2b7d8 1200 }
dkato 0:702bf7b2b7d8 1201 }
dkato 0:702bf7b2b7d8 1202
dkato 0:702bf7b2b7d8 1203 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1204 {
dkato 0:702bf7b2b7d8 1205 switch (p_ch_cfg->padding_pol)
dkato 0:702bf7b2b7d8 1206 {
dkato 0:702bf7b2b7d8 1207 case SSIF_CFG_PADDING_LOW:
dkato 0:702bf7b2b7d8 1208 /* fall through */
dkato 0:702bf7b2b7d8 1209 case SSIF_CFG_PADDING_HIGH:
dkato 0:702bf7b2b7d8 1210 /* do nothing */
dkato 0:702bf7b2b7d8 1211 break;
dkato 0:702bf7b2b7d8 1212 default:
dkato 0:702bf7b2b7d8 1213 ret = EINVAL;
dkato 0:702bf7b2b7d8 1214 break;
dkato 0:702bf7b2b7d8 1215 }
dkato 0:702bf7b2b7d8 1216 }
dkato 0:702bf7b2b7d8 1217
dkato 0:702bf7b2b7d8 1218 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1219 {
dkato 0:702bf7b2b7d8 1220 switch (p_ch_cfg->serial_alignment)
dkato 0:702bf7b2b7d8 1221 {
dkato 0:702bf7b2b7d8 1222 case SSIF_CFG_DATA_FIRST:
dkato 0:702bf7b2b7d8 1223 /* fall through */
dkato 0:702bf7b2b7d8 1224 case SSIF_CFG_PADDING_FIRST:
dkato 0:702bf7b2b7d8 1225 /* do nothing */
dkato 0:702bf7b2b7d8 1226 break;
dkato 0:702bf7b2b7d8 1227 default:
dkato 0:702bf7b2b7d8 1228 ret = EINVAL;
dkato 0:702bf7b2b7d8 1229 break;
dkato 0:702bf7b2b7d8 1230 }
dkato 0:702bf7b2b7d8 1231 }
dkato 0:702bf7b2b7d8 1232
dkato 0:702bf7b2b7d8 1233 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1234 {
dkato 0:702bf7b2b7d8 1235 switch (p_ch_cfg->parallel_alignment)
dkato 0:702bf7b2b7d8 1236 {
dkato 0:702bf7b2b7d8 1237 case SSIF_CFG_LEFT:
dkato 0:702bf7b2b7d8 1238 /* fall through */
dkato 0:702bf7b2b7d8 1239 case SSIF_CFG_RIGHT:
dkato 0:702bf7b2b7d8 1240 /* do nothing */
dkato 0:702bf7b2b7d8 1241 break;
dkato 0:702bf7b2b7d8 1242 default:
dkato 0:702bf7b2b7d8 1243 ret = EINVAL;
dkato 0:702bf7b2b7d8 1244 break;
dkato 0:702bf7b2b7d8 1245 }
dkato 0:702bf7b2b7d8 1246 }
dkato 0:702bf7b2b7d8 1247
dkato 0:702bf7b2b7d8 1248 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1249 {
dkato 0:702bf7b2b7d8 1250 switch (p_ch_cfg->ws_delay)
dkato 0:702bf7b2b7d8 1251 {
dkato 0:702bf7b2b7d8 1252 case SSIF_CFG_DELAY:
dkato 0:702bf7b2b7d8 1253 /* fall through */
dkato 0:702bf7b2b7d8 1254 case SSIF_CFG_NO_DELAY:
dkato 0:702bf7b2b7d8 1255 /* do nothing */
dkato 0:702bf7b2b7d8 1256 break;
dkato 0:702bf7b2b7d8 1257 default:
dkato 0:702bf7b2b7d8 1258 ret = EINVAL;
dkato 0:702bf7b2b7d8 1259 break;
dkato 0:702bf7b2b7d8 1260 }
dkato 0:702bf7b2b7d8 1261 }
dkato 0:702bf7b2b7d8 1262
dkato 0:702bf7b2b7d8 1263 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1264 {
dkato 0:702bf7b2b7d8 1265 switch (p_ch_cfg->noise_cancel)
dkato 0:702bf7b2b7d8 1266 {
dkato 0:702bf7b2b7d8 1267 case SSIF_CFG_DISABLE_NOISE_CANCEL:
dkato 0:702bf7b2b7d8 1268 /* fall through */
dkato 0:702bf7b2b7d8 1269 case SSIF_CFG_ENABLE_NOISE_CANCEL:
dkato 0:702bf7b2b7d8 1270 /* do nothing */
dkato 0:702bf7b2b7d8 1271 break;
dkato 0:702bf7b2b7d8 1272 default:
dkato 0:702bf7b2b7d8 1273 ret = EINVAL;
dkato 0:702bf7b2b7d8 1274 break;
dkato 0:702bf7b2b7d8 1275 }
dkato 0:702bf7b2b7d8 1276 }
dkato 0:702bf7b2b7d8 1277
dkato 0:702bf7b2b7d8 1278 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1279 {
dkato 0:702bf7b2b7d8 1280 switch (p_ch_cfg->tdm_mode)
dkato 0:702bf7b2b7d8 1281 {
dkato 0:702bf7b2b7d8 1282 case SSIF_CFG_DISABLE_TDM:
dkato 0:702bf7b2b7d8 1283 /* fall through */
dkato 0:702bf7b2b7d8 1284 case SSIF_CFG_ENABLE_TDM:
dkato 0:702bf7b2b7d8 1285 /* do nothing */
dkato 0:702bf7b2b7d8 1286 break;
dkato 0:702bf7b2b7d8 1287 default:
dkato 0:702bf7b2b7d8 1288 ret = EINVAL;
dkato 0:702bf7b2b7d8 1289 break;
dkato 0:702bf7b2b7d8 1290 }
dkato 0:702bf7b2b7d8 1291 }
dkato 0:702bf7b2b7d8 1292
dkato 0:702bf7b2b7d8 1293 if (ESUCCESS == ret)
dkato 0:702bf7b2b7d8 1294 {
dkato 0:702bf7b2b7d8 1295 switch (p_ch_cfg->romdec_direct.mode)
dkato 0:702bf7b2b7d8 1296 {
dkato 0:702bf7b2b7d8 1297 case SSIF_CFG_DISABLE_ROMDEC_DIRECT:
dkato 0:702bf7b2b7d8 1298 /* fall through */
dkato 0:702bf7b2b7d8 1299 case SSIF_CFG_ENABLE_ROMDEC_DIRECT:
dkato 0:702bf7b2b7d8 1300 /* do nothing */
dkato 0:702bf7b2b7d8 1301 break;
dkato 0:702bf7b2b7d8 1302 default:
dkato 0:702bf7b2b7d8 1303 ret = EINVAL;
dkato 0:702bf7b2b7d8 1304 break;
dkato 0:702bf7b2b7d8 1305 }
dkato 0:702bf7b2b7d8 1306 }
dkato 0:702bf7b2b7d8 1307 }
dkato 0:702bf7b2b7d8 1308
dkato 0:702bf7b2b7d8 1309 return ret;
dkato 0:702bf7b2b7d8 1310 }
dkato 0:702bf7b2b7d8 1311
dkato 0:702bf7b2b7d8 1312 /******************************************************************************
dkato 0:702bf7b2b7d8 1313 * Function Name: SSIF_CheckWordSize
dkato 0:702bf7b2b7d8 1314 * @brief Check system word size whether that is valid or not.
dkato 0:702bf7b2b7d8 1315 *
dkato 0:702bf7b2b7d8 1316 * Description:<br>
dkato 0:702bf7b2b7d8 1317 * if system_words couldn't involve specified number of<br>
dkato 0:702bf7b2b7d8 1318 * data_words then error.
dkato 0:702bf7b2b7d8 1319 * @param[in] p_info_ch :channel object
dkato 0:702bf7b2b7d8 1320 * @retval ESUCCESS :Success.
dkato 0:702bf7b2b7d8 1321 * @retval error code :Failure.
dkato 0:702bf7b2b7d8 1322 ******************************************************************************/
dkato 0:702bf7b2b7d8 1323 static int_t SSIF_CheckWordSize(const ssif_info_ch_t* const p_info_ch)
dkato 0:702bf7b2b7d8 1324 {
dkato 0:702bf7b2b7d8 1325 uint32_t ssicr_chnl;
dkato 0:702bf7b2b7d8 1326 uint32_t dw_per_sw;
dkato 0:702bf7b2b7d8 1327 uint32_t datawd_len;
dkato 0:702bf7b2b7d8 1328 uint32_t syswd_len;
dkato 0:702bf7b2b7d8 1329 int_t ret = ESUCCESS;
dkato 0:702bf7b2b7d8 1330
dkato 0:702bf7b2b7d8 1331 if (NULL == p_info_ch)
dkato 0:702bf7b2b7d8 1332 {
dkato 0:702bf7b2b7d8 1333 ret = EFAULT;
dkato 0:702bf7b2b7d8 1334 }
dkato 0:702bf7b2b7d8 1335 else
dkato 0:702bf7b2b7d8 1336 {
dkato 0:702bf7b2b7d8 1337 ssicr_chnl = p_info_ch->multi_ch;
dkato 0:702bf7b2b7d8 1338 /* ->MISRA 13.7 : This is verbose error check by way of precaution */
dkato 0:702bf7b2b7d8 1339 if (SSIF_CFG_MULTI_CH_4 < ssicr_chnl)
dkato 0:702bf7b2b7d8 1340 /* <-MISRA 13.7 */
dkato 0:702bf7b2b7d8 1341 {
dkato 0:702bf7b2b7d8 1342 ret = EINVAL;
dkato 0:702bf7b2b7d8 1343 }
dkato 0:702bf7b2b7d8 1344 else
dkato 0:702bf7b2b7d8 1345 {
dkato 0:702bf7b2b7d8 1346 /* data_words number per system_words */
dkato 0:702bf7b2b7d8 1347 if (SSIF_CFG_ENABLE_TDM == p_info_ch->tdm_mode)
dkato 0:702bf7b2b7d8 1348 {
dkato 0:702bf7b2b7d8 1349 /* When TDM Mode data_word number per system_words fixed to 1 */
dkato 0:702bf7b2b7d8 1350 dw_per_sw = 1u;
dkato 0:702bf7b2b7d8 1351 }
dkato 0:702bf7b2b7d8 1352 else
dkato 0:702bf7b2b7d8 1353 {
dkato 0:702bf7b2b7d8 1354 /* When not TDM data_word number per system_words depends CHNL */
dkato 0:702bf7b2b7d8 1355 dw_per_sw = ssicr_chnl + 1u;
dkato 0:702bf7b2b7d8 1356 }
dkato 0:702bf7b2b7d8 1357
dkato 0:702bf7b2b7d8 1358 /* size of data_words */
dkato 0:702bf7b2b7d8 1359 datawd_len = (uint32_t)SSIF_DWLtoLen(p_info_ch->data_word);
dkato 0:702bf7b2b7d8 1360
dkato 0:702bf7b2b7d8 1361 if (0u == datawd_len)
dkato 0:702bf7b2b7d8 1362 {
dkato 0:702bf7b2b7d8 1363 ret = EINVAL;
dkato 0:702bf7b2b7d8 1364 }
dkato 0:702bf7b2b7d8 1365 else
dkato 0:702bf7b2b7d8 1366 {
dkato 0:702bf7b2b7d8 1367 /* size of system_words */
dkato 0:702bf7b2b7d8 1368 syswd_len = (uint32_t)SSIF_SWLtoLen(p_info_ch->system_word);
dkato 0:702bf7b2b7d8 1369
dkato 0:702bf7b2b7d8 1370 if (syswd_len < (datawd_len * dw_per_sw))
dkato 0:702bf7b2b7d8 1371 {
dkato 0:702bf7b2b7d8 1372 ret = EINVAL;
dkato 0:702bf7b2b7d8 1373 }
dkato 0:702bf7b2b7d8 1374 }
dkato 0:702bf7b2b7d8 1375 }
dkato 0:702bf7b2b7d8 1376 }
dkato 0:702bf7b2b7d8 1377
dkato 0:702bf7b2b7d8 1378 return ret;
dkato 0:702bf7b2b7d8 1379 }
dkato 0:702bf7b2b7d8 1380
dkato 0:702bf7b2b7d8 1381 /******************************************************************************
dkato 0:702bf7b2b7d8 1382 * Function Name: SSIF_Reset
dkato 0:702bf7b2b7d8 1383 * @brief SSIF software reset
dkato 0:702bf7b2b7d8 1384 *
dkato 0:702bf7b2b7d8 1385 * Description:<br>
dkato 0:702bf7b2b7d8 1386 *
dkato 0:702bf7b2b7d8 1387 * @param[in] ssif_ch :SSIF channel
dkato 0:702bf7b2b7d8 1388 * @retval none
dkato 0:702bf7b2b7d8 1389 ******************************************************************************/
dkato 0:702bf7b2b7d8 1390 static void SSIF_Reset(const uint32_t ssif_ch)
dkato 0:702bf7b2b7d8 1391 {
dkato 0:702bf7b2b7d8 1392 int_t was_masked;
dkato 0:702bf7b2b7d8 1393 uint8_t dummy_read_u8;
dkato 0:702bf7b2b7d8 1394 static const uint32_t cpg_swrst_bit[SSIF_NUM_CHANS] =
dkato 0:702bf7b2b7d8 1395 {
dkato 0:702bf7b2b7d8 1396 CPG_SWRSTCR1_BIT_SRST16, /* SSIF0 */
dkato 0:702bf7b2b7d8 1397 CPG_SWRSTCR1_BIT_SRST15, /* SSIF1 */
dkato 0:702bf7b2b7d8 1398 CPG_SWRSTCR1_BIT_SRST14, /* SSIF2 */
dkato 0:702bf7b2b7d8 1399 CPG_SWRSTCR1_BIT_SRST13, /* SSIF3 */
dkato 0:702bf7b2b7d8 1400 CPG_SWRSTCR1_BIT_SRST12, /* SSIF4 */
dkato 0:702bf7b2b7d8 1401 CPG_SWRSTCR1_BIT_SRST11 /* SSIF5 */
dkato 0:702bf7b2b7d8 1402 };
dkato 0:702bf7b2b7d8 1403
dkato 0:702bf7b2b7d8 1404 /* change register: enter exclusive */
dkato 0:702bf7b2b7d8 1405 was_masked = __disable_irq();
dkato 0:702bf7b2b7d8 1406
dkato 0:702bf7b2b7d8 1407 /* SW Reset ON */
dkato 0:702bf7b2b7d8 1408 /* ->IPA R2.4.2 : This is implicit type conversion that doesn't have bad effect on accessing to 8bit register. */
dkato 0:702bf7b2b7d8 1409 CPGSWRSTCR1 |= (uint8_t)cpg_swrst_bit[ssif_ch];
dkato 0:702bf7b2b7d8 1410 dummy_read_u8 = CPGSWRSTCR1;
dkato 0:702bf7b2b7d8 1411 /* <-IPA R2.4.2 */
dkato 0:702bf7b2b7d8 1412 UNUSED_ARG(dummy_read_u8);
dkato 0:702bf7b2b7d8 1413
dkato 0:702bf7b2b7d8 1414 /* SW Reset OFF */
dkato 0:702bf7b2b7d8 1415 /* ->IPA R2.4.2 : This is implicit type conversion that doesn't have bad effect on accessing to 8bit register. */
dkato 0:702bf7b2b7d8 1416 CPGSWRSTCR1 &= (uint8_t)~((uint8_t)cpg_swrst_bit[ssif_ch]);
dkato 0:702bf7b2b7d8 1417 dummy_read_u8 = CPGSWRSTCR1;
dkato 0:702bf7b2b7d8 1418 /* <-IPA R2.4.2 */
dkato 0:702bf7b2b7d8 1419 UNUSED_ARG(dummy_read_u8);
dkato 0:702bf7b2b7d8 1420
dkato 0:702bf7b2b7d8 1421 /* change register: exit exclusive */
dkato 0:702bf7b2b7d8 1422 if (0 == was_masked)
dkato 0:702bf7b2b7d8 1423 {
dkato 0:702bf7b2b7d8 1424 __enable_irq();
dkato 0:702bf7b2b7d8 1425 }
dkato 0:702bf7b2b7d8 1426
dkato 0:702bf7b2b7d8 1427 return;
dkato 0:702bf7b2b7d8 1428 }
dkato 0:702bf7b2b7d8 1429