Graphics framework for GR-PEACH. When you use this program, we judge you have agreed to the following contents. https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

Dependents:   ImageZoomInout_Sample ImageRotaion_Sample ImageScroll_Sample GR-PEACH_LCD_4_3inch_Save_to_USB ... more

License

When you use this library, we judge you have agreed to the following contents.

https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

Note

If you import the GraphicsFramework library, please import GR-PEACH_video library and R_BSP library together.



JPEG Converter

The JPEG Converter driver implements encode and decode functionality which uses the JCU of the RZ/A Series.

Hello World!

Import programJCU_HelloWorld

Hello World for JCU(JPEG Codec Unit). JCU is JPEG codec unit of RZ/A1. When you use this program, we judge you have agreed to the following contents. https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

API

Import library

Data Structures

struct bitmap_buff_info_t
Bitmap data setting struct. More...
struct encode_options_t
Encode option setting. More...

Public Types

enum jpeg_conv_error_t {
JPEG_CONV_OK = 0, JPEG_CONV_JCU_ERR = -1, JPEG_CONV_FORMA_ERR = -2, JPEG_CONV_PARAM_ERR = -3,
JPEG_CONV_BUSY = -4, JPEG_CONV_PARAM_RANGE_ERR = -7
}

Error codes.

More...
enum wr_rd_swa_t {
WR_RD_WRSWA_NON = 0, WR_RD_WRSWA_8BIT = 1, WR_RD_WRSWA_16BIT = 2, WR_RD_WRSWA_16_8BIT = 3,
WR_RD_WRSWA_32BIT = 4, WR_RD_WRSWA_32_8BIT = 5, WR_RD_WRSWA_32_16BIT = 6, WR_RD_WRSWA_32_16_8BIT = 7
}

Write/Read image pixcel frame buffer swap setting.

More...
enum wr_rd_format_t { WR_RD_YCbCr422 = 0x00, WR_RD_ARGB8888 = 0x01, WR_RD_RGB565 = 0x02 }

Write/Read image pixcel format selects.

More...
enum sub_sampling_t { SUB_SAMPLING_1_1 = 0x00, SUB_SAMPLING_1_2 = 0x01, SUB_SAMPLING_1_4 = 0x02, SUB_SAMPLING_1_8 = 0x03 }

Thinning output image selects.

More...
enum cbcr_offset_t { CBCR_OFFSET_0 = 0x00, CBCR_OFFSET_128 = 0x01 }

Cb/Cr range selects for decode.

More...

Public Member Functions

JPEG_Converter ()
Constructor method of JPEG converter(encode/decode)
virtual ~JPEG_Converter ()
Destructor method of JPEG converter(encode/decode)
JPEG_Converter::jpeg_conv_error_t decode (void *pJpegBuff, bitmap_buff_info_t *psOutputBuff)
Decode JPEG to rinear data.
JPEG_Converter::jpeg_conv_error_t decode (void *pJpegBuff, bitmap_buff_info_t *psOutputBuff, decode_options_t *pOptions)
JPEG data decode to bitmap.
JPEG_Converter::jpeg_conv_error_t encode ( bitmap_buff_info_t *psInputBuff, void *pJpegBuff, size_t *pEncodeSize)
Encode rinear data to JPEG.
JPEG_Converter::jpeg_conv_error_t encode ( bitmap_buff_info_t *psInputBuff, void *pJpegBuff, size_t *pEncodeSize, encode_options_t *pOptions)
Bitmap data encode to JPEG.
JPEG_Converter::jpeg_conv_error_t SetQuality (const uint8_t qual)
Set encode quality.

Correspondence file

A correspondence file of JPEG Converter is as the following table.

JPEGCorrespondence
Width>0(greater than 0)
Height>0(greater than 0)
Color formatYCbCr444, YCbCr422, YCbCr420, YCbCr411
BitmapCorrespondence
Width>0(greater than 0)
Height>0(greater than 0)
Color formatYCbCr422

Notice

You run JPEG converter once destruction each time.

You set whether these JPEG files aren't input, or it check error setting decode(set in "flag" = true). The JPEG file which becomes correspondence outside will be the following condition.

  • File besides the above-mentioned correspondence file.
  • As information in the JPEG file, WIDTH or HEIGHT is larger than output buffer setting.

Buffer area is used encode/decode, set 8 bytes align and non-cash memory area. The output buffer when decoding, is made beyond the size decided in the size of the JPEG file, the format, setting of thinning out. You make output buffer for decode/encode to enough big size in order to stock this result. JPEG Converter, if you do not particularly perform specified, does not check size against the output data at the time of encoding and decoding. You set the output buffer so that there is no effect of corruption by the output data.

Color format

Color format in case to be converted from Bitmap to JPEG is either ARGB8888 or RGB555, YCbCr422. Color format of the If you want to convert from JPEG file to Bitmap file is YCbCr422. You correct "alpha(member of decode_options_t)" of setting and "output_cb_cr_offset(member of decode_options_t)" according to color format when decoding.

  • example
    decode to ARGB8888(WR_RD_ARGB8888 set in format member of bitmap_buff_info_t)
    alpha = 0x01-0xFF
    output_cb_cr_offset = CBCR_OFFSET_0

    decode to YCbCr422(WR_RD_YCbCr422 set in format member of bitmap_buff_info_t)
    alpha = 0
    output_cb_cr_offset = CBCR_OFFSET_0 or CBCR_OFFSET_128

    decode to RGB565(WR_RD_RGB565 set in format member of bitmap_buff_info_t)
    alpha = 0
    output_cb_cr_offset = CBCR_OFFSET_0

Decode/encode settings are optional

If omitted encode/decode settings, it will work with the following settings.
[Decode option setting (member of decode_options_t)]

  • Vertical sub sampling is thinning output image to 1/1.
  • Horizontal sub sampling is thinning output image to 1/1.
  • Output data of Cb/Cr range is -128 to 127.
  • Output data of swap in 8-bit units: 2-1-4-3-6-5-8-7.
  • Alpha value of 0.
  • JPEG format correspondence outside error check.
  • It decode in a synchronous function.

[Encode option setting (member of encode_options_t)]

  • DRI value is 0.
  • Encoding JPEG file start width offset is 0.
  • Encoding JPEG file start height offset is 0.
  • Input data of Cb/Cr range of input data is -128 to 127.
  • Input data swap in 8-bit units: 2-1-4-3-6-5-8-7.
  • It don't check encode size.
  • Quantization Y use default table(Quality75).
  • Quantization C use default table(Quality75).
  • Huffman Y DC use default table.
  • Huffman C DC use default table.
  • Huffman Y AC use default table.
  • Huffman C AC use default table.
  • It encode in a synchronous function.

Synchronous/asynchronous switching

Decoding and encoding setting to operate asynchronously by setting a callback function(decode_options_t and encode_options_t).

Quality

Quality changes are possible. If you want to change the Quality, please specify the table made of Quality you want to change the address of the setting. If you do not want to change the Quality, it will operate at Quality75.

RGA

The RGA library implements fast drawing functionality which uses the RGA of the RZ/A Series.
Supporting compiler is ARMCC, GCC ARM and IAR.

Hello World!

Import programRGA_HelloWorld

Hello World for RGA(Renesas Graphics Architecture). RGA is the Graphics Library of RZ/A1. When you use this program, we judge you have agreed to the following contents. https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

Committer:
dkato
Date:
Mon Apr 24 08:16:23 2017 +0000
Revision:
13:1ee2176ef13f
Parent:
0:37e1e6a45ced
Add "SetQuality()" to JCU.
; Bug fixes.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:37e1e6a45ced 1 /*******************************************************************************
dkato 0:37e1e6a45ced 2 * DISCLAIMER
dkato 0:37e1e6a45ced 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:37e1e6a45ced 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:37e1e6a45ced 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:37e1e6a45ced 6 * all applicable laws, including copyright laws.
dkato 0:37e1e6a45ced 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:37e1e6a45ced 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:37e1e6a45ced 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:37e1e6a45ced 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:37e1e6a45ced 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:37e1e6a45ced 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:37e1e6a45ced 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:37e1e6a45ced 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:37e1e6a45ced 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:37e1e6a45ced 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:37e1e6a45ced 17 * and to discontinue the availability of this software. By using this software,
dkato 0:37e1e6a45ced 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:37e1e6a45ced 19 * following link:
dkato 0:37e1e6a45ced 20 * http://www.renesas.com/disclaimer
dkato 0:37e1e6a45ced 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
dkato 0:37e1e6a45ced 22 *******************************************************************************/
dkato 0:37e1e6a45ced 23 /*******************************************************************************
dkato 0:37e1e6a45ced 24 * File Name : cpg_iobitmask.h
dkato 0:37e1e6a45ced 25 * $Rev: 809 $
dkato 0:37e1e6a45ced 26 * $Date:: 2014-04-09 15:06:36 +0900#$
dkato 0:37e1e6a45ced 27 * Description : CPG register define header
dkato 0:37e1e6a45ced 28 *******************************************************************************/
dkato 0:37e1e6a45ced 29 #ifndef CPG_IOBITMASK_H
dkato 0:37e1e6a45ced 30 #define CPG_IOBITMASK_H
dkato 0:37e1e6a45ced 31
dkato 0:37e1e6a45ced 32
dkato 0:37e1e6a45ced 33 /* ==== Mask values for IO registers ==== */
dkato 0:37e1e6a45ced 34 #define CPG_FRQCR_IFC (0x0300u)
dkato 0:37e1e6a45ced 35 #define CPG_FRQCR_CKOEN (0x3000u)
dkato 0:37e1e6a45ced 36 #define CPG_FRQCR_CKOEN2 (0x4000u)
dkato 0:37e1e6a45ced 37
dkato 0:37e1e6a45ced 38 #define CPG_FRQCR2_GFC (0x0003u)
dkato 0:37e1e6a45ced 39
dkato 0:37e1e6a45ced 40 #define CPG_CPUSTS_ISBUSY (0x10u)
dkato 0:37e1e6a45ced 41
dkato 0:37e1e6a45ced 42 #define CPG_STBCR1_DEEP (0x40u)
dkato 0:37e1e6a45ced 43 #define CPG_STBCR1_STBY (0x80u)
dkato 0:37e1e6a45ced 44
dkato 0:37e1e6a45ced 45 #define CPG_STBCR2_MSTP20 (0x01u)
dkato 0:37e1e6a45ced 46 #define CPG_STBCR2_HIZ (0x80u)
dkato 0:37e1e6a45ced 47
dkato 0:37e1e6a45ced 48 #define CPG_STBREQ1_STBRQ10 (0x01u)
dkato 0:37e1e6a45ced 49 #define CPG_STBREQ1_STBRQ12 (0x04u)
dkato 0:37e1e6a45ced 50 #define CPG_STBREQ1_STBRQ13 (0x08u)
dkato 0:37e1e6a45ced 51 #define CPG_STBREQ1_STBRQ15 (0x20u)
dkato 0:37e1e6a45ced 52
dkato 0:37e1e6a45ced 53 #define CPG_STBREQ2_STBRQ20 (0x01u)
dkato 0:37e1e6a45ced 54 #define CPG_STBREQ2_STBRQ21 (0x02u)
dkato 0:37e1e6a45ced 55 #define CPG_STBREQ2_STBRQ22 (0x04u)
dkato 0:37e1e6a45ced 56 #define CPG_STBREQ2_STBRQ23 (0x08u)
dkato 0:37e1e6a45ced 57 #define CPG_STBREQ2_STBRQ24 (0x10u)
dkato 0:37e1e6a45ced 58 #define CPG_STBREQ2_STBRQ25 (0x20u)
dkato 0:37e1e6a45ced 59 #define CPG_STBREQ2_STBRQ26 (0x40u)
dkato 0:37e1e6a45ced 60 #define CPG_STBREQ2_STBRQ27 (0x80u)
dkato 0:37e1e6a45ced 61
dkato 0:37e1e6a45ced 62 #define CPG_STBACK1_STBAK10 (0x01u)
dkato 0:37e1e6a45ced 63 #define CPG_STBACK1_STBAK12 (0x04u)
dkato 0:37e1e6a45ced 64 #define CPG_STBACK1_STBAK13 (0x08u)
dkato 0:37e1e6a45ced 65 #define CPG_STBACK1_STBAK15 (0x20u)
dkato 0:37e1e6a45ced 66
dkato 0:37e1e6a45ced 67 #define CPG_STBACK2_STBAK20 (0x01u)
dkato 0:37e1e6a45ced 68 #define CPG_STBACK2_STBAK21 (0x02u)
dkato 0:37e1e6a45ced 69 #define CPG_STBACK2_STBAK22 (0x04u)
dkato 0:37e1e6a45ced 70 #define CPG_STBACK2_STBAK23 (0x08u)
dkato 0:37e1e6a45ced 71 #define CPG_STBACK2_STBAK24 (0x10u)
dkato 0:37e1e6a45ced 72 #define CPG_STBACK2_STBAK25 (0x20u)
dkato 0:37e1e6a45ced 73 #define CPG_STBACK2_STBAK26 (0x40u)
dkato 0:37e1e6a45ced 74 #define CPG_STBACK2_STBAK27 (0x80u)
dkato 0:37e1e6a45ced 75
dkato 0:37e1e6a45ced 76 #define CPG_SYSCR1_VRAME0 (0x01u)
dkato 0:37e1e6a45ced 77 #define CPG_SYSCR1_VRAME1 (0x02u)
dkato 0:37e1e6a45ced 78 #define CPG_SYSCR1_VRAME2 (0x04u)
dkato 0:37e1e6a45ced 79 #define CPG_SYSCR1_VRAME3 (0x08u)
dkato 0:37e1e6a45ced 80 #define CPG_SYSCR1_VRAME4 (0x10u)
dkato 0:37e1e6a45ced 81
dkato 0:37e1e6a45ced 82 #define CPG_SYSCR2_VRAMWE0 (0x01u)
dkato 0:37e1e6a45ced 83 #define CPG_SYSCR2_VRAMWE1 (0x02u)
dkato 0:37e1e6a45ced 84 #define CPG_SYSCR2_VRAMWE2 (0x04u)
dkato 0:37e1e6a45ced 85 #define CPG_SYSCR2_VRAMWE3 (0x08u)
dkato 0:37e1e6a45ced 86 #define CPG_SYSCR2_VRAMWE4 (0x10u)
dkato 0:37e1e6a45ced 87
dkato 0:37e1e6a45ced 88 #define CPG_SYSCR3_RRAMWE0 (0x01u)
dkato 0:37e1e6a45ced 89 #define CPG_SYSCR3_RRAMWE1 (0x02u)
dkato 0:37e1e6a45ced 90 #define CPG_SYSCR3_RRAMWE2 (0x04u)
dkato 0:37e1e6a45ced 91 #define CPG_SYSCR3_RRAMWE3 (0x08u)
dkato 0:37e1e6a45ced 92
dkato 0:37e1e6a45ced 93 #define CPG_STBCR3_MSTP30 (0x01u)
dkato 0:37e1e6a45ced 94 #define CPG_STBCR3_MSTP31 (0x02u)
dkato 0:37e1e6a45ced 95 #define CPG_STBCR3_MSTP32 (0x04u)
dkato 0:37e1e6a45ced 96 #define CPG_STBCR3_MSTP33 (0x08u)
dkato 0:37e1e6a45ced 97 #define CPG_STBCR3_MSTP34 (0x10u)
dkato 0:37e1e6a45ced 98 #define CPG_STBCR3_MSTP35 (0x20u)
dkato 0:37e1e6a45ced 99 #define CPG_STBCR3_MSTP36 (0x40u)
dkato 0:37e1e6a45ced 100 #define CPG_STBCR3_MSTP37 (0x80u)
dkato 0:37e1e6a45ced 101
dkato 0:37e1e6a45ced 102 #define CPG_STBCR4_MSTP40 (0x01u)
dkato 0:37e1e6a45ced 103 #define CPG_STBCR4_MSTP41 (0x02u)
dkato 0:37e1e6a45ced 104 #define CPG_STBCR4_MSTP42 (0x04u)
dkato 0:37e1e6a45ced 105 #define CPG_STBCR4_MSTP43 (0x08u)
dkato 0:37e1e6a45ced 106 #define CPG_STBCR4_MSTP44 (0x10u)
dkato 0:37e1e6a45ced 107 #define CPG_STBCR4_MSTP45 (0x20u)
dkato 0:37e1e6a45ced 108 #define CPG_STBCR4_MSTP46 (0x40u)
dkato 0:37e1e6a45ced 109 #define CPG_STBCR4_MSTP47 (0x80u)
dkato 0:37e1e6a45ced 110
dkato 0:37e1e6a45ced 111 #define CPG_STBCR5_MSTP50 (0x01u)
dkato 0:37e1e6a45ced 112 #define CPG_STBCR5_MSTP51 (0x02u)
dkato 0:37e1e6a45ced 113 #define CPG_STBCR5_MSTP52 (0x04u)
dkato 0:37e1e6a45ced 114 #define CPG_STBCR5_MSTP53 (0x08u)
dkato 0:37e1e6a45ced 115 #define CPG_STBCR5_MSTP54 (0x10u)
dkato 0:37e1e6a45ced 116 #define CPG_STBCR5_MSTP55 (0x20u)
dkato 0:37e1e6a45ced 117 #define CPG_STBCR5_MSTP56 (0x40u)
dkato 0:37e1e6a45ced 118 #define CPG_STBCR5_MSTP57 (0x80u)
dkato 0:37e1e6a45ced 119
dkato 0:37e1e6a45ced 120 #define CPG_STBCR6_MSTP60 (0x01u)
dkato 0:37e1e6a45ced 121 #define CPG_STBCR6_MSTP61 (0x02u)
dkato 0:37e1e6a45ced 122 #define CPG_STBCR6_MSTP62 (0x04u)
dkato 0:37e1e6a45ced 123 #define CPG_STBCR6_MSTP63 (0x08u)
dkato 0:37e1e6a45ced 124 #define CPG_STBCR6_MSTP64 (0x10u)
dkato 0:37e1e6a45ced 125 #define CPG_STBCR6_MSTP65 (0x20u)
dkato 0:37e1e6a45ced 126 #define CPG_STBCR6_MSTP66 (0x40u)
dkato 0:37e1e6a45ced 127 #define CPG_STBCR6_MSTP67 (0x80u)
dkato 0:37e1e6a45ced 128
dkato 0:37e1e6a45ced 129 #define CPG_STBCR7_MSTP70 (0x01u)
dkato 0:37e1e6a45ced 130 #define CPG_STBCR7_MSTP71 (0x02u)
dkato 0:37e1e6a45ced 131 #define CPG_STBCR7_MSTP73 (0x08u)
dkato 0:37e1e6a45ced 132 #define CPG_STBCR7_MSTP74 (0x10u)
dkato 0:37e1e6a45ced 133 #define CPG_STBCR7_MSTP76 (0x40u)
dkato 0:37e1e6a45ced 134 #define CPG_STBCR7_MSTP77 (0x80u)
dkato 0:37e1e6a45ced 135
dkato 0:37e1e6a45ced 136 #define CPG_STBCR8_MSTP81 (0x02u)
dkato 0:37e1e6a45ced 137 #define CPG_STBCR8_MSTP82 (0x04u)
dkato 0:37e1e6a45ced 138 #define CPG_STBCR8_MSTP83 (0x08u)
dkato 0:37e1e6a45ced 139 #define CPG_STBCR8_MSTP84 (0x10u)
dkato 0:37e1e6a45ced 140 #define CPG_STBCR8_MSTP85 (0x20u)
dkato 0:37e1e6a45ced 141 #define CPG_STBCR8_MSTP86 (0x40u)
dkato 0:37e1e6a45ced 142 #define CPG_STBCR8_MSTP87 (0x80u)
dkato 0:37e1e6a45ced 143
dkato 0:37e1e6a45ced 144 #define CPG_STBCR9_MSTP90 (0x01u)
dkato 0:37e1e6a45ced 145 #define CPG_STBCR9_MSTP91 (0x02u)
dkato 0:37e1e6a45ced 146 #define CPG_STBCR9_MSTP92 (0x04u)
dkato 0:37e1e6a45ced 147 #define CPG_STBCR9_MSTP93 (0x08u)
dkato 0:37e1e6a45ced 148 #define CPG_STBCR9_MSTP94 (0x10u)
dkato 0:37e1e6a45ced 149 #define CPG_STBCR9_MSTP95 (0x20u)
dkato 0:37e1e6a45ced 150 #define CPG_STBCR9_MSTP96 (0x40u)
dkato 0:37e1e6a45ced 151 #define CPG_STBCR9_MSTP97 (0x80u)
dkato 0:37e1e6a45ced 152
dkato 0:37e1e6a45ced 153 #define CPG_STBCR10_MSTP100 (0x01u)
dkato 0:37e1e6a45ced 154 #define CPG_STBCR10_MSTP101 (0x02u)
dkato 0:37e1e6a45ced 155 #define CPG_STBCR10_MSTP102 (0x04u)
dkato 0:37e1e6a45ced 156 #define CPG_STBCR10_MSTP103 (0x08u)
dkato 0:37e1e6a45ced 157 #define CPG_STBCR10_MSTP104 (0x10u)
dkato 0:37e1e6a45ced 158 #define CPG_STBCR10_MSTP105 (0x20u)
dkato 0:37e1e6a45ced 159 #define CPG_STBCR10_MSTP106 (0x40u)
dkato 0:37e1e6a45ced 160 #define CPG_STBCR10_MSTP107 (0x80u)
dkato 0:37e1e6a45ced 161
dkato 0:37e1e6a45ced 162 #define CPG_STBCR11_MSTP110 (0x01u)
dkato 0:37e1e6a45ced 163 #define CPG_STBCR11_MSTP111 (0x02u)
dkato 0:37e1e6a45ced 164 #define CPG_STBCR11_MSTP112 (0x04u)
dkato 0:37e1e6a45ced 165 #define CPG_STBCR11_MSTP113 (0x08u)
dkato 0:37e1e6a45ced 166 #define CPG_STBCR11_MSTP114 (0x10u)
dkato 0:37e1e6a45ced 167 #define CPG_STBCR11_MSTP115 (0x20u)
dkato 0:37e1e6a45ced 168
dkato 0:37e1e6a45ced 169 #define CPG_STBCR12_MSTP120 (0x01u)
dkato 0:37e1e6a45ced 170 #define CPG_STBCR12_MSTP121 (0x02u)
dkato 0:37e1e6a45ced 171 #define CPG_STBCR12_MSTP122 (0x04u)
dkato 0:37e1e6a45ced 172 #define CPG_STBCR12_MSTP123 (0x08u)
dkato 0:37e1e6a45ced 173
dkato 0:37e1e6a45ced 174 #define CPG_STBCR13_MSTP131 (0x02u)
dkato 0:37e1e6a45ced 175 #define CPG_STBCR13_MSTP132 (0x04u)
dkato 0:37e1e6a45ced 176
dkato 0:37e1e6a45ced 177 #define CPG_SWRSTCR1_SRST11 (0x02u)
dkato 0:37e1e6a45ced 178 #define CPG_SWRSTCR1_SRST12 (0x04u)
dkato 0:37e1e6a45ced 179 #define CPG_SWRSTCR1_SRST13 (0x08u)
dkato 0:37e1e6a45ced 180 #define CPG_SWRSTCR1_SRST14 (0x10u)
dkato 0:37e1e6a45ced 181 #define CPG_SWRSTCR1_SRST15 (0x20u)
dkato 0:37e1e6a45ced 182 #define CPG_SWRSTCR1_SRST16 (0x40u)
dkato 0:37e1e6a45ced 183 #define CPG_SWRSTCR1_AXTALE (0x80u)
dkato 0:37e1e6a45ced 184
dkato 0:37e1e6a45ced 185 #define CPG_SWRSTCR2_SRST21 (0x02u)
dkato 0:37e1e6a45ced 186
dkato 0:37e1e6a45ced 187 #define CPG_SWRSTCR3_SRST32 (0x04u)
dkato 0:37e1e6a45ced 188
dkato 0:37e1e6a45ced 189 #define CPG_RRAMKP_RRAMKP0 (0x01u)
dkato 0:37e1e6a45ced 190 #define CPG_RRAMKP_RRAMKP1 (0x02u)
dkato 0:37e1e6a45ced 191 #define CPG_RRAMKP_RRAMKP2 (0x04u)
dkato 0:37e1e6a45ced 192 #define CPG_RRAMKP_RRAMKP3 (0x08u)
dkato 0:37e1e6a45ced 193
dkato 0:37e1e6a45ced 194 #define CPG_DSCTR_RAMBOOT (0x40u)
dkato 0:37e1e6a45ced 195 #define CPG_DSCTR_EBUSKEEPE (0x80u)
dkato 0:37e1e6a45ced 196
dkato 0:37e1e6a45ced 197 #define CPG_DSSSR_P8_2 (0x0001u)
dkato 0:37e1e6a45ced 198 #define CPG_DSSSR_P9_1 (0x0002u)
dkato 0:37e1e6a45ced 199 #define CPG_DSSSR_P2_15 (0x0004u)
dkato 0:37e1e6a45ced 200 #define CPG_DSSSR_P7_8 (0x0008u)
dkato 0:37e1e6a45ced 201 #define CPG_DSSSR_P5_9 (0x0010u)
dkato 0:37e1e6a45ced 202 #define CPG_DSSSR_P6_4 (0x0020u)
dkato 0:37e1e6a45ced 203 #define CPG_DSSSR_RTCAR (0x0040u)
dkato 0:37e1e6a45ced 204 #define CPG_DSSSR_NMI (0x0100u)
dkato 0:37e1e6a45ced 205 #define CPG_DSSSR_P3_3 (0x0200u)
dkato 0:37e1e6a45ced 206 #define CPG_DSSSR_P8_7 (0x0400u)
dkato 0:37e1e6a45ced 207 #define CPG_DSSSR_P2_12 (0x0800u)
dkato 0:37e1e6a45ced 208 #define CPG_DSSSR_P3_1 (0x1000u)
dkato 0:37e1e6a45ced 209 #define CPG_DSSSR_P3_9 (0x2000u)
dkato 0:37e1e6a45ced 210 #define CPG_DSSSR_P6_2 (0x4000u)
dkato 0:37e1e6a45ced 211
dkato 0:37e1e6a45ced 212 #define CPG_DSESR_P8_2E (0x0001u)
dkato 0:37e1e6a45ced 213 #define CPG_DSESR_P9_1E (0x0002u)
dkato 0:37e1e6a45ced 214 #define CPG_DSESR_P2_15E (0x0004u)
dkato 0:37e1e6a45ced 215 #define CPG_DSESR_P7_8E (0x0008u)
dkato 0:37e1e6a45ced 216 #define CPG_DSESR_P5_9E (0x0010u)
dkato 0:37e1e6a45ced 217 #define CPG_DSESR_P6_4E (0x0020u)
dkato 0:37e1e6a45ced 218 #define CPG_DSESR_NMIE (0x0100u)
dkato 0:37e1e6a45ced 219 #define CPG_DSESR_P3_3E (0x0200u)
dkato 0:37e1e6a45ced 220 #define CPG_DSESR_P8_7E (0x0400u)
dkato 0:37e1e6a45ced 221 #define CPG_DSESR_P2_12E (0x0800u)
dkato 0:37e1e6a45ced 222 #define CPG_DSESR_P3_1E (0x1000u)
dkato 0:37e1e6a45ced 223 #define CPG_DSESR_P3_9E (0x2000u)
dkato 0:37e1e6a45ced 224 #define CPG_DSESR_P6_2E (0x4000u)
dkato 0:37e1e6a45ced 225
dkato 0:37e1e6a45ced 226 #define CPG_DSFR_P8_2F (0x0001u)
dkato 0:37e1e6a45ced 227 #define CPG_DSFR_P9_1F (0x0002u)
dkato 0:37e1e6a45ced 228 #define CPG_DSFR_P2_15F (0x0004u)
dkato 0:37e1e6a45ced 229 #define CPG_DSFR_P7_8F (0x0008u)
dkato 0:37e1e6a45ced 230 #define CPG_DSFR_P5_9F (0x0010u)
dkato 0:37e1e6a45ced 231 #define CPG_DSFR_P6_4F (0x0020u)
dkato 0:37e1e6a45ced 232 #define CPG_DSFR_RTCARF (0x0040u)
dkato 0:37e1e6a45ced 233 #define CPG_DSFR_NMIF (0x0100u)
dkato 0:37e1e6a45ced 234 #define CPG_DSFR_P3_3F (0x0200u)
dkato 0:37e1e6a45ced 235 #define CPG_DSFR_P8_7F (0x0400u)
dkato 0:37e1e6a45ced 236 #define CPG_DSFR_P2_12F (0x0800u)
dkato 0:37e1e6a45ced 237 #define CPG_DSFR_P3_1F (0x1000u)
dkato 0:37e1e6a45ced 238 #define CPG_DSFR_P3_9F (0x2000u)
dkato 0:37e1e6a45ced 239 #define CPG_DSFR_P6_2F (0x4000u)
dkato 0:37e1e6a45ced 240 #define CPG_DSFR_IOKEEP (0x8000u)
dkato 0:37e1e6a45ced 241
dkato 0:37e1e6a45ced 242 #define CPG_XTALCTR_GAIN0 (0x01u)
dkato 0:37e1e6a45ced 243 #define CPG_XTALCTR_GAIN1 (0x02u)
dkato 0:37e1e6a45ced 244
dkato 0:37e1e6a45ced 245
dkato 0:37e1e6a45ced 246 /* ==== Shift values for IO registers ==== */
dkato 0:37e1e6a45ced 247 #define CPG_FRQCR_IFC_SHIFT (8u)
dkato 0:37e1e6a45ced 248 #define CPG_FRQCR_CKOEN_SHIFT (12u)
dkato 0:37e1e6a45ced 249 #define CPG_FRQCR_CKOEN2_SHIFT (14u)
dkato 0:37e1e6a45ced 250
dkato 0:37e1e6a45ced 251 #define CPG_FRQCR2_GFC_SHIFT (0u)
dkato 0:37e1e6a45ced 252
dkato 0:37e1e6a45ced 253 #define CPG_CPUSTS_ISBUSY_SHIFT (4u)
dkato 0:37e1e6a45ced 254
dkato 0:37e1e6a45ced 255 #define CPG_STBCR1_DEEP_SHIFT (6u)
dkato 0:37e1e6a45ced 256 #define CPG_STBCR1_STBY_SHIFT (7u)
dkato 0:37e1e6a45ced 257
dkato 0:37e1e6a45ced 258 #define CPG_STBCR2_MSTP20_SHIFT (0u)
dkato 0:37e1e6a45ced 259 #define CPG_STBCR2_HIZ_SHIFT (7u)
dkato 0:37e1e6a45ced 260
dkato 0:37e1e6a45ced 261 #define CPG_STBREQ1_STBRQ10_SHIFT (0u)
dkato 0:37e1e6a45ced 262 #define CPG_STBREQ1_STBRQ12_SHIFT (2u)
dkato 0:37e1e6a45ced 263 #define CPG_STBREQ1_STBRQ13_SHIFT (3u)
dkato 0:37e1e6a45ced 264 #define CPG_STBREQ1_STBRQ15_SHIFT (5u)
dkato 0:37e1e6a45ced 265
dkato 0:37e1e6a45ced 266 #define CPG_STBREQ2_STBRQ20_SHIFT (0u)
dkato 0:37e1e6a45ced 267 #define CPG_STBREQ2_STBRQ21_SHIFT (1u)
dkato 0:37e1e6a45ced 268 #define CPG_STBREQ2_STBRQ22_SHIFT (2u)
dkato 0:37e1e6a45ced 269 #define CPG_STBREQ2_STBRQ23_SHIFT (3u)
dkato 0:37e1e6a45ced 270 #define CPG_STBREQ2_STBRQ24_SHIFT (4u)
dkato 0:37e1e6a45ced 271 #define CPG_STBREQ2_STBRQ25_SHIFT (5u)
dkato 0:37e1e6a45ced 272 #define CPG_STBREQ2_STBRQ26_SHIFT (6u)
dkato 0:37e1e6a45ced 273 #define CPG_STBREQ2_STBRQ27_SHIFT (7u)
dkato 0:37e1e6a45ced 274
dkato 0:37e1e6a45ced 275 #define CPG_STBACK1_STBAK10_SHIFT (0u)
dkato 0:37e1e6a45ced 276 #define CPG_STBACK1_STBAK12_SHIFT (2u)
dkato 0:37e1e6a45ced 277 #define CPG_STBACK1_STBAK13_SHIFT (3u)
dkato 0:37e1e6a45ced 278 #define CPG_STBACK1_STBAK15_SHIFT (5u)
dkato 0:37e1e6a45ced 279
dkato 0:37e1e6a45ced 280 #define CPG_STBACK2_STBAK20_SHIFT (0u)
dkato 0:37e1e6a45ced 281 #define CPG_STBACK2_STBAK21_SHIFT (1u)
dkato 0:37e1e6a45ced 282 #define CPG_STBACK2_STBAK22_SHIFT (2u)
dkato 0:37e1e6a45ced 283 #define CPG_STBACK2_STBAK23_SHIFT (3u)
dkato 0:37e1e6a45ced 284 #define CPG_STBACK2_STBAK24_SHIFT (4u)
dkato 0:37e1e6a45ced 285 #define CPG_STBACK2_STBAK25_SHIFT (5u)
dkato 0:37e1e6a45ced 286 #define CPG_STBACK2_STBAK26_SHIFT (6u)
dkato 0:37e1e6a45ced 287 #define CPG_STBACK2_STBAK27_SHIFT (7u)
dkato 0:37e1e6a45ced 288
dkato 0:37e1e6a45ced 289 #define CPG_SYSCR1_VRAME0_SHIFT (0u)
dkato 0:37e1e6a45ced 290 #define CPG_SYSCR1_VRAME1_SHIFT (1u)
dkato 0:37e1e6a45ced 291 #define CPG_SYSCR1_VRAME2_SHIFT (2u)
dkato 0:37e1e6a45ced 292 #define CPG_SYSCR1_VRAME3_SHIFT (3u)
dkato 0:37e1e6a45ced 293 #define CPG_SYSCR1_VRAME4_SHIFT (4u)
dkato 0:37e1e6a45ced 294
dkato 0:37e1e6a45ced 295 #define CPG_SYSCR2_VRAMWE0_SHIFT (0u)
dkato 0:37e1e6a45ced 296 #define CPG_SYSCR2_VRAMWE1_SHIFT (1u)
dkato 0:37e1e6a45ced 297 #define CPG_SYSCR2_VRAMWE2_SHIFT (2u)
dkato 0:37e1e6a45ced 298 #define CPG_SYSCR2_VRAMWE3_SHIFT (3u)
dkato 0:37e1e6a45ced 299 #define CPG_SYSCR2_VRAMWE4_SHIFT (4u)
dkato 0:37e1e6a45ced 300
dkato 0:37e1e6a45ced 301 #define CPG_SYSCR3_RRAMWE0_SHIFT (0u)
dkato 0:37e1e6a45ced 302 #define CPG_SYSCR3_RRAMWE1_SHIFT (1u)
dkato 0:37e1e6a45ced 303 #define CPG_SYSCR3_RRAMWE2_SHIFT (2u)
dkato 0:37e1e6a45ced 304 #define CPG_SYSCR3_RRAMWE3_SHIFT (3u)
dkato 0:37e1e6a45ced 305
dkato 0:37e1e6a45ced 306 #define CPG_STBCR3_MSTP30_SHIFT (0u)
dkato 0:37e1e6a45ced 307 #define CPG_STBCR3_MSTP31_SHIFT (1u)
dkato 0:37e1e6a45ced 308 #define CPG_STBCR3_MSTP32_SHIFT (2u)
dkato 0:37e1e6a45ced 309 #define CPG_STBCR3_MSTP33_SHIFT (3u)
dkato 0:37e1e6a45ced 310 #define CPG_STBCR3_MSTP34_SHIFT (4u)
dkato 0:37e1e6a45ced 311 #define CPG_STBCR3_MSTP35_SHIFT (5u)
dkato 0:37e1e6a45ced 312 #define CPG_STBCR3_MSTP36_SHIFT (6u)
dkato 0:37e1e6a45ced 313 #define CPG_STBCR3_MSTP37_SHIFT (7u)
dkato 0:37e1e6a45ced 314
dkato 0:37e1e6a45ced 315 #define CPG_STBCR4_MSTP40_SHIFT (0u)
dkato 0:37e1e6a45ced 316 #define CPG_STBCR4_MSTP41_SHIFT (1u)
dkato 0:37e1e6a45ced 317 #define CPG_STBCR4_MSTP42_SHIFT (2u)
dkato 0:37e1e6a45ced 318 #define CPG_STBCR4_MSTP43_SHIFT (3u)
dkato 0:37e1e6a45ced 319 #define CPG_STBCR4_MSTP44_SHIFT (4u)
dkato 0:37e1e6a45ced 320 #define CPG_STBCR4_MSTP45_SHIFT (5u)
dkato 0:37e1e6a45ced 321 #define CPG_STBCR4_MSTP46_SHIFT (6u)
dkato 0:37e1e6a45ced 322 #define CPG_STBCR4_MSTP47_SHIFT (7u)
dkato 0:37e1e6a45ced 323
dkato 0:37e1e6a45ced 324 #define CPG_STBCR5_MSTP50_SHIFT (0u)
dkato 0:37e1e6a45ced 325 #define CPG_STBCR5_MSTP51_SHIFT (1u)
dkato 0:37e1e6a45ced 326 #define CPG_STBCR5_MSTP52_SHIFT (2u)
dkato 0:37e1e6a45ced 327 #define CPG_STBCR5_MSTP53_SHIFT (3u)
dkato 0:37e1e6a45ced 328 #define CPG_STBCR5_MSTP54_SHIFT (4u)
dkato 0:37e1e6a45ced 329 #define CPG_STBCR5_MSTP55_SHIFT (5u)
dkato 0:37e1e6a45ced 330 #define CPG_STBCR5_MSTP56_SHIFT (6u)
dkato 0:37e1e6a45ced 331 #define CPG_STBCR5_MSTP57_SHIFT (7u)
dkato 0:37e1e6a45ced 332
dkato 0:37e1e6a45ced 333 #define CPG_STBCR6_MSTP60_SHIFT (0u)
dkato 0:37e1e6a45ced 334 #define CPG_STBCR6_MSTP61_SHIFT (1u)
dkato 0:37e1e6a45ced 335 #define CPG_STBCR6_MSTP62_SHIFT (2u)
dkato 0:37e1e6a45ced 336 #define CPG_STBCR6_MSTP63_SHIFT (3u)
dkato 0:37e1e6a45ced 337 #define CPG_STBCR6_MSTP64_SHIFT (4u)
dkato 0:37e1e6a45ced 338 #define CPG_STBCR6_MSTP65_SHIFT (5u)
dkato 0:37e1e6a45ced 339 #define CPG_STBCR6_MSTP66_SHIFT (6u)
dkato 0:37e1e6a45ced 340 #define CPG_STBCR6_MSTP67_SHIFT (7u)
dkato 0:37e1e6a45ced 341
dkato 0:37e1e6a45ced 342 #define CPG_STBCR7_MSTP70_SHIFT (0u)
dkato 0:37e1e6a45ced 343 #define CPG_STBCR7_MSTP71_SHIFT (1u)
dkato 0:37e1e6a45ced 344 #define CPG_STBCR7_MSTP73_SHIFT (3u)
dkato 0:37e1e6a45ced 345 #define CPG_STBCR7_MSTP74_SHIFT (4u)
dkato 0:37e1e6a45ced 346 #define CPG_STBCR7_MSTP76_SHIFT (6u)
dkato 0:37e1e6a45ced 347 #define CPG_STBCR7_MSTP77_SHIFT (7u)
dkato 0:37e1e6a45ced 348
dkato 0:37e1e6a45ced 349 #define CPG_STBCR8_MSTP81_SHIFT (1u)
dkato 0:37e1e6a45ced 350 #define CPG_STBCR8_MSTP82_SHIFT (2u)
dkato 0:37e1e6a45ced 351 #define CPG_STBCR8_MSTP83_SHIFT (3u)
dkato 0:37e1e6a45ced 352 #define CPG_STBCR8_MSTP84_SHIFT (4u)
dkato 0:37e1e6a45ced 353 #define CPG_STBCR8_MSTP85_SHIFT (5u)
dkato 0:37e1e6a45ced 354 #define CPG_STBCR8_MSTP86_SHIFT (6u)
dkato 0:37e1e6a45ced 355 #define CPG_STBCR8_MSTP87_SHIFT (7u)
dkato 0:37e1e6a45ced 356
dkato 0:37e1e6a45ced 357 #define CPG_STBCR9_MSTP90_SHIFT (0u)
dkato 0:37e1e6a45ced 358 #define CPG_STBCR9_MSTP91_SHIFT (1u)
dkato 0:37e1e6a45ced 359 #define CPG_STBCR9_MSTP92_SHIFT (2u)
dkato 0:37e1e6a45ced 360 #define CPG_STBCR9_MSTP93_SHIFT (3u)
dkato 0:37e1e6a45ced 361 #define CPG_STBCR9_MSTP94_SHIFT (4u)
dkato 0:37e1e6a45ced 362 #define CPG_STBCR9_MSTP95_SHIFT (5u)
dkato 0:37e1e6a45ced 363 #define CPG_STBCR9_MSTP96_SHIFT (6u)
dkato 0:37e1e6a45ced 364 #define CPG_STBCR9_MSTP97_SHIFT (7u)
dkato 0:37e1e6a45ced 365
dkato 0:37e1e6a45ced 366 #define CPG_STBCR10_MSTP100_SHIFT (0u)
dkato 0:37e1e6a45ced 367 #define CPG_STBCR10_MSTP101_SHIFT (1u)
dkato 0:37e1e6a45ced 368 #define CPG_STBCR10_MSTP102_SHIFT (2u)
dkato 0:37e1e6a45ced 369 #define CPG_STBCR10_MSTP103_SHIFT (3u)
dkato 0:37e1e6a45ced 370 #define CPG_STBCR10_MSTP104_SHIFT (4u)
dkato 0:37e1e6a45ced 371 #define CPG_STBCR10_MSTP105_SHIFT (5u)
dkato 0:37e1e6a45ced 372 #define CPG_STBCR10_MSTP106_SHIFT (6u)
dkato 0:37e1e6a45ced 373 #define CPG_STBCR10_MSTP107_SHIFT (7u)
dkato 0:37e1e6a45ced 374
dkato 0:37e1e6a45ced 375 #define CPG_STBCR11_MSTP110_SHIFT (0u)
dkato 0:37e1e6a45ced 376 #define CPG_STBCR11_MSTP111_SHIFT (1u)
dkato 0:37e1e6a45ced 377 #define CPG_STBCR11_MSTP112_SHIFT (2u)
dkato 0:37e1e6a45ced 378 #define CPG_STBCR11_MSTP113_SHIFT (3u)
dkato 0:37e1e6a45ced 379 #define CPG_STBCR11_MSTP114_SHIFT (4u)
dkato 0:37e1e6a45ced 380 #define CPG_STBCR11_MSTP115_SHIFT (5u)
dkato 0:37e1e6a45ced 381
dkato 0:37e1e6a45ced 382 #define CPG_STBCR12_MSTP120_SHIFT (0u)
dkato 0:37e1e6a45ced 383 #define CPG_STBCR12_MSTP121_SHIFT (1u)
dkato 0:37e1e6a45ced 384 #define CPG_STBCR12_MSTP122_SHIFT (2u)
dkato 0:37e1e6a45ced 385 #define CPG_STBCR12_MSTP123_SHIFT (3u)
dkato 0:37e1e6a45ced 386
dkato 0:37e1e6a45ced 387 #define CPG_STBCR13_MSTP131_SHIFT (1u)
dkato 0:37e1e6a45ced 388 #define CPG_STBCR13_MSTP132_SHIFT (2u)
dkato 0:37e1e6a45ced 389
dkato 0:37e1e6a45ced 390 #define CPG_SWRSTCR1_SRST11_SHIFT (1u)
dkato 0:37e1e6a45ced 391 #define CPG_SWRSTCR1_SRST12_SHIFT (2u)
dkato 0:37e1e6a45ced 392 #define CPG_SWRSTCR1_SRST13_SHIFT (3u)
dkato 0:37e1e6a45ced 393 #define CPG_SWRSTCR1_SRST14_SHIFT (4u)
dkato 0:37e1e6a45ced 394 #define CPG_SWRSTCR1_SRST15_SHIFT (5u)
dkato 0:37e1e6a45ced 395 #define CPG_SWRSTCR1_SRST16_SHIFT (6u)
dkato 0:37e1e6a45ced 396 #define CPG_SWRSTCR1_AXTALE_SHIFT (7u)
dkato 0:37e1e6a45ced 397
dkato 0:37e1e6a45ced 398 #define CPG_SWRSTCR2_SRST21_SHIFT (1u)
dkato 0:37e1e6a45ced 399
dkato 0:37e1e6a45ced 400 #define CPG_SWRSTCR3_SRST32_SHIFT (2u)
dkato 0:37e1e6a45ced 401
dkato 0:37e1e6a45ced 402 #define CPG_RRAMKP_RRAMKP0_SHIFT (0u)
dkato 0:37e1e6a45ced 403 #define CPG_RRAMKP_RRAMKP1_SHIFT (1u)
dkato 0:37e1e6a45ced 404 #define CPG_RRAMKP_RRAMKP2_SHIFT (2u)
dkato 0:37e1e6a45ced 405 #define CPG_RRAMKP_RRAMKP3_SHIFT (3u)
dkato 0:37e1e6a45ced 406
dkato 0:37e1e6a45ced 407 #define CPG_DSCTR_RAMBOOT_SHIFT (6u)
dkato 0:37e1e6a45ced 408 #define CPG_DSCTR_EBUSKEEPE_SHIFT (7u)
dkato 0:37e1e6a45ced 409
dkato 0:37e1e6a45ced 410 #define CPG_DSSSR_P8_2_SHIFT (0u)
dkato 0:37e1e6a45ced 411 #define CPG_DSSSR_P9_1_SHIFT (1u)
dkato 0:37e1e6a45ced 412 #define CPG_DSSSR_P2_15_SHIFT (2u)
dkato 0:37e1e6a45ced 413 #define CPG_DSSSR_P7_8_SHIFT (3u)
dkato 0:37e1e6a45ced 414 #define CPG_DSSSR_P5_9_SHIFT (4u)
dkato 0:37e1e6a45ced 415 #define CPG_DSSSR_P6_4_SHIFT (5u)
dkato 0:37e1e6a45ced 416 #define CPG_DSSSR_RTCAR_SHIFT (6u)
dkato 0:37e1e6a45ced 417 #define CPG_DSSSR_NMI_SHIFT (8u)
dkato 0:37e1e6a45ced 418 #define CPG_DSSSR_P3_3_SHIFT (9u)
dkato 0:37e1e6a45ced 419 #define CPG_DSSSR_P8_7_SHIFT (10u)
dkato 0:37e1e6a45ced 420 #define CPG_DSSSR_P2_12_SHIFT (11u)
dkato 0:37e1e6a45ced 421 #define CPG_DSSSR_P3_1_SHIFT (12u)
dkato 0:37e1e6a45ced 422 #define CPG_DSSSR_P3_9_SHIFT (13u)
dkato 0:37e1e6a45ced 423 #define CPG_DSSSR_P6_2_SHIFT (14u)
dkato 0:37e1e6a45ced 424
dkato 0:37e1e6a45ced 425 #define CPG_DSESR_P8_2E_SHIFT (0u)
dkato 0:37e1e6a45ced 426 #define CPG_DSESR_P9_1E_SHIFT (1u)
dkato 0:37e1e6a45ced 427 #define CPG_DSESR_P2_15E_SHIFT (2u)
dkato 0:37e1e6a45ced 428 #define CPG_DSESR_P7_8E_SHIFT (3u)
dkato 0:37e1e6a45ced 429 #define CPG_DSESR_P5_9E_SHIFT (4u)
dkato 0:37e1e6a45ced 430 #define CPG_DSESR_P6_4E_SHIFT (5u)
dkato 0:37e1e6a45ced 431 #define CPG_DSESR_NMIE_SHIFT (8u)
dkato 0:37e1e6a45ced 432 #define CPG_DSESR_P3_3E_SHIFT (9u)
dkato 0:37e1e6a45ced 433 #define CPG_DSESR_P8_7E_SHIFT (10u)
dkato 0:37e1e6a45ced 434 #define CPG_DSESR_P2_12E_SHIFT (11u)
dkato 0:37e1e6a45ced 435 #define CPG_DSESR_P3_1E_SHIFT (12u)
dkato 0:37e1e6a45ced 436 #define CPG_DSESR_P3_9E_SHIFT (13u)
dkato 0:37e1e6a45ced 437 #define CPG_DSESR_P6_2E_SHIFT (14u)
dkato 0:37e1e6a45ced 438
dkato 0:37e1e6a45ced 439 #define CPG_DSFR_P8_2F_SHIFT (0u)
dkato 0:37e1e6a45ced 440 #define CPG_DSFR_P9_1F_SHIFT (1u)
dkato 0:37e1e6a45ced 441 #define CPG_DSFR_P2_15F_SHIFT (2u)
dkato 0:37e1e6a45ced 442 #define CPG_DSFR_P7_8F_SHIFT (3u)
dkato 0:37e1e6a45ced 443 #define CPG_DSFR_P5_9F_SHIFT (4u)
dkato 0:37e1e6a45ced 444 #define CPG_DSFR_P6_4F_SHIFT (5u)
dkato 0:37e1e6a45ced 445 #define CPG_DSFR_RTCARF_SHIFT (6u)
dkato 0:37e1e6a45ced 446 #define CPG_DSFR_NMIF_SHIFT (8u)
dkato 0:37e1e6a45ced 447 #define CPG_DSFR_P3_3F_SHIFT (9u)
dkato 0:37e1e6a45ced 448 #define CPG_DSFR_P8_7F_SHIFT (10u)
dkato 0:37e1e6a45ced 449 #define CPG_DSFR_P2_12F_SHIFT (11u)
dkato 0:37e1e6a45ced 450 #define CPG_DSFR_P3_1F_SHIFT (12u)
dkato 0:37e1e6a45ced 451 #define CPG_DSFR_P3_9F_SHIFT (13u)
dkato 0:37e1e6a45ced 452 #define CPG_DSFR_P6_2F_SHIFT (14u)
dkato 0:37e1e6a45ced 453 #define CPG_DSFR_IOKEEP_SHIFT (15u)
dkato 0:37e1e6a45ced 454
dkato 0:37e1e6a45ced 455 #define CPG_XTALCTR_GAIN0_SHIFT (0u)
dkato 0:37e1e6a45ced 456 #define CPG_XTALCTR_GAIN1_SHIFT (1u)
dkato 0:37e1e6a45ced 457
dkato 0:37e1e6a45ced 458
dkato 0:37e1e6a45ced 459 #endif /* CPG_IOBITMASK_H */
dkato 0:37e1e6a45ced 460
dkato 0:37e1e6a45ced 461 /* End of File */