Video library for GR-PEACH

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lcd_analog_rgb_ch0.c

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00001 /*******************************************************************************
00002 * DISCLAIMER
00003 * This software is supplied by Renesas Electronics Corporation and is only
00004 * intended for use with Renesas products. No other uses are authorized. This
00005 * software is owned by Renesas Electronics Corporation and is protected under
00006 * all applicable laws, including copyright laws.
00007 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
00008 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
00009 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
00010 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
00011 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
00012 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
00013 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
00014 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
00015 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
00016 * Renesas reserves the right, without notice, to make changes to this software
00017 * and to discontinue the availability of this software. By using this software,
00018 * you agree to the additional terms and conditions found by accessing the
00019 * following link:
00020 * http://www.renesas.com/disclaimer
00021 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
00022 *******************************************************************************/
00023 /**************************************************************************//**
00024 * @file         lcd_analog_rgb_ch0.c
00025 * @version      1.00
00026 * $Rev: 199 $
00027 * $Date:: 2014-05-23 16:33:52 +0900#$
00028 * @brief        LCD panel for vdc5 channel 0 function
00029 ******************************************************************************/
00030 
00031 /******************************************************************************
00032 Includes   <System Includes> , "Project Includes"
00033 ******************************************************************************/
00034 #include    <string.h>
00035 
00036 #include    "r_typedefs.h"
00037 
00038 #include    "r_vdc5.h"
00039 
00040 #include    "iodefine.h"
00041 #include    "lcd_panel.h"
00042 
00043 #if     (LCD_VDC5_CH0_PANEL==1)
00044 
00045 /******************************************************************************
00046 Macro definitions
00047 ******************************************************************************/
00048 /* Port 11 */
00049 #define LCD_PORT11_5TH (0xE0FFu)
00050 /* Port 10 */
00051 #define LCD_PORT10_5TH (0xFFFFu)
00052 
00053 #define FH_1_2_CYCLE   (2u)
00054 
00055 /******************************************************************************
00056 Typedef definitions
00057 ******************************************************************************/
00058 
00059 /******************************************************************************
00060 Imported global variables and functions (from other files)
00061 ******************************************************************************/
00062 
00063 /******************************************************************************
00064 Exported global variables (to be accessed by other files)
00065 ******************************************************************************/
00066 
00067 /******************************************************************************
00068 Private global variables and functions
00069 ******************************************************************************/
00070 
00071 /**************************************************************************//**
00072  * @brief       LCD panel I/O port setup (VDC5 channel 0)
00073  * @param[in]   void
00074  * @retval      None
00075 ******************************************************************************/
00076 void GRAPHICS_SetLcdPanel_Ch0 (void)
00077 {
00078     volatile uint32_t   dummy_read;
00079     uint32_t            reg_data;
00080 
00081     /*  Analog RGB D-sub15 (RGB888)
00082                         : LCD0_CLK              ... P11_15, 5th alternative function
00083             HSYNC       : LCD0_TCON0            ... P11_14, 5th alternative function
00084             VSYNC       : LCD0_TCON1            ... P11_13, 5th alternative function
00085         LCD0_DATA
00086             R[7:0]      : LCD0_DATA[23:16]      ... P10_0 ~ P10_7, 5th alternative function
00087             G[7:0]      : LCD0_DATA[15:8]       ... P10_8 ~ P10_15, 5th alternative function
00088             B[7:0]      : LCD0_DATA[7:0]        ... P11_0 ~ P11_7, 5th alternative function
00089     */
00090     /* Port 11 */
00091     reg_data        = (uint32_t)GPIO.PMC11 & (uint32_t)~LCD_PORT11_5TH;
00092     GPIO.PMC11      = (uint16_t)reg_data;
00093     reg_data        = (uint32_t)GPIO.PMC11;
00094     dummy_read      = reg_data;
00095     /* PFCAE11, PFCE11, PFC11 ... 5th alternative function
00096        PIPC11, PMC11
00097        b15:b13  : P11_15 ~ P11_13
00098        b7:b0    : P11_7 ~ P11_0 */
00099     reg_data        = (uint32_t)GPIO.PFCAE11 | (uint32_t)LCD_PORT11_5TH;
00100     GPIO.PFCAE11    = (uint16_t)reg_data;
00101     reg_data        = (uint32_t)GPIO.PFCE11 & (uint32_t)~LCD_PORT11_5TH;
00102     GPIO.PFCE11     = (uint16_t)reg_data;
00103     reg_data        = (uint32_t)GPIO.PFC11 & (uint32_t)~LCD_PORT11_5TH;
00104     GPIO.PFC11      = (uint16_t)reg_data;
00105     reg_data        = (uint32_t)GPIO.PIPC11 | (uint32_t)LCD_PORT11_5TH;
00106     GPIO.PIPC11     = (uint16_t)reg_data;
00107     reg_data        = (uint32_t)GPIO.PMC11 | (uint32_t)LCD_PORT11_5TH;
00108     GPIO.PMC11      = (uint16_t)reg_data;
00109 
00110     /* Port 10 */
00111     reg_data        = (uint32_t)GPIO.PMC10 & (uint32_t)~LCD_PORT10_5TH;
00112     GPIO.PMC10      = (uint16_t)reg_data;
00113     reg_data        = (uint32_t)GPIO.PMC10;
00114     dummy_read      = reg_data;
00115     /* PFCAE10, PFCE10, PFC10 ... 5th alternative function
00116        PIPC10, PMC10
00117        b15:b0   : P10_15 ~ P10_0 */
00118     reg_data        = (uint32_t)GPIO.PFCAE10 | (uint32_t)LCD_PORT10_5TH;
00119     GPIO.PFCAE10    = (uint16_t)reg_data;
00120     reg_data        = (uint32_t)GPIO.PFCE10 & (uint32_t)~LCD_PORT10_5TH;
00121     GPIO.PFCE10     = (uint16_t)reg_data;
00122     reg_data        = (uint32_t)GPIO.PFC10 & (uint32_t)~LCD_PORT10_5TH;
00123     GPIO.PFC10      = (uint16_t)reg_data;
00124     reg_data        = (uint32_t)GPIO.PIPC10 | (uint32_t)LCD_PORT10_5TH;
00125     GPIO.PIPC10     = (uint16_t)reg_data;
00126     reg_data        = (uint32_t)GPIO.PMC10 | (uint32_t)LCD_PORT10_5TH;
00127     GPIO.PMC10      = (uint16_t)reg_data;
00128 }   /* End of function GRAPHICS_SetLcdPanel_Ch0() */
00129 
00130 /**************************************************************************//**
00131  * @brief       LCD TCON setup parameter acquisition processing (VDC5 channel 0)
00132  * @param[out]  outctrl     : Address of the area for storing the LCD TCON timing setup data table
00133  * @retval      None
00134 ******************************************************************************/
00135 void GRAPHICS_SetLcdTconSettings_Ch0 (const vdc5_lcd_tcon_timing_t  * * const outctrl)
00136 {
00137     /* Analog RGB D-sub15 (RGB888), SVGA signal 800x600 */
00138     /* TCON timing setting, VS */
00139     static const vdc5_lcd_tcon_timing_t  lcd_tcon_timing_VS = {
00140         (uint16_t)(LCD_CH0_S_VSYNC * FH_1_2_CYCLE),   /* Signal pulse start position */
00141         (uint16_t)(LCD_CH0_W_VSYNC * FH_1_2_CYCLE),   /* Pulse width */
00142         VDC5_LCD_TCON_POLMD_NORMAL ,
00143         VDC5_LCD_TCON_REFSEL_HSYNC ,
00144         LCD_CH0_POL_VSYNC,                  /* Polarity inversion control of signal */
00145         VDC5_LCD_TCON_PIN_1 ,                /* Output pin for LCD driving signal */
00146         LCD_CH0_OUT_EDGE                    /* Output phase control of signal */
00147     };
00148     /* TCON timing setting, HS */
00149     static const vdc5_lcd_tcon_timing_t  lcd_tcon_timing_HS = {
00150         (uint16_t)LCD_CH0_S_HSYNC,          /* Signal pulse start position */
00151         (uint16_t)LCD_CH0_W_HSYNC,          /* Pulse width */
00152         VDC5_LCD_TCON_POLMD_NORMAL ,
00153         VDC5_LCD_TCON_REFSEL_HSYNC ,         /* Signal operating reference select */
00154         LCD_CH0_POL_HSYNC,                  /* Polarity inversion control of signal */
00155         VDC5_LCD_TCON_PIN_0 ,                /* Output pin for LCD driving signal */
00156         LCD_CH0_OUT_EDGE                    /* Output phase control of signal */
00157     };
00158 
00159     if (outctrl != NULL) {
00160         outctrl[VDC5_LCD_TCONSIG_STVA_VS ]   = &lcd_tcon_timing_VS;  /* STVA/VS: Vsync */
00161         outctrl[VDC5_LCD_TCONSIG_STVB_VE ]   = NULL;                 /* STVB/VE: Not used */
00162         outctrl[VDC5_LCD_TCONSIG_STH_SP_HS ] = &lcd_tcon_timing_HS;  /* STH/SP/HS: Hsync */
00163         outctrl[VDC5_LCD_TCONSIG_STB_LP_HE ] = NULL;                 /* STB/LP/HE: Not used */
00164         outctrl[VDC5_LCD_TCONSIG_CPV_GCK ]   = NULL;                 /* CPV/GCK: Not used */
00165         outctrl[VDC5_LCD_TCONSIG_POLA ]      = NULL;                 /* POLA: Not used */
00166         outctrl[VDC5_LCD_TCONSIG_POLB ]      = NULL;                 /* POLB: Not used */
00167         outctrl[VDC5_LCD_TCONSIG_DE ]        = NULL;                 /* DE: Not used */
00168     }
00169 }   /* End of function GRAPHICS_SetLcdTconSettings_Ch0() */
00170 
00171 #endif  /* LCD_VDC5_CH0_PANEL==LCD_CH0_PANEL_ANALOG_RGB */
00172