Video library for GR-PEACH
Dependents: Trace_Program2 GR-PEACH_Camera_in_barcode GR-PEACH_LCD_sample GR-PEACH_LCD_4_3inch_sample ... more
Video library for GR-PEACH.
Hello World!
Import programGR-PEACH_Camera_in
Camera in sample for GR-PEACH. This sample works on GR-LYCHEE besides GR-PEACH.
API
Import library
Interface
See the Pinout page for more details
common/lcd_panel/lcd_analog_rgb_ch0.c@4:aeefe5171463, 2016-06-30 (annotated)
- Committer:
- dkato
- Date:
- Thu Jun 30 11:00:37 2016 +0000
- Revision:
- 4:aeefe5171463
- Parent:
- 0:853f5b7408a7
Add ARGB4444 to graphics layer read format.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
dkato | 0:853f5b7408a7 | 1 | /******************************************************************************* |
dkato | 0:853f5b7408a7 | 2 | * DISCLAIMER |
dkato | 0:853f5b7408a7 | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
dkato | 0:853f5b7408a7 | 4 | * intended for use with Renesas products. No other uses are authorized. This |
dkato | 0:853f5b7408a7 | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
dkato | 0:853f5b7408a7 | 6 | * all applicable laws, including copyright laws. |
dkato | 0:853f5b7408a7 | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
dkato | 0:853f5b7408a7 | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
dkato | 0:853f5b7408a7 | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
dkato | 0:853f5b7408a7 | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
dkato | 0:853f5b7408a7 | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
dkato | 0:853f5b7408a7 | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
dkato | 0:853f5b7408a7 | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
dkato | 0:853f5b7408a7 | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
dkato | 0:853f5b7408a7 | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
dkato | 0:853f5b7408a7 | 16 | * Renesas reserves the right, without notice, to make changes to this software |
dkato | 0:853f5b7408a7 | 17 | * and to discontinue the availability of this software. By using this software, |
dkato | 0:853f5b7408a7 | 18 | * you agree to the additional terms and conditions found by accessing the |
dkato | 0:853f5b7408a7 | 19 | * following link: |
dkato | 0:853f5b7408a7 | 20 | * http://www.renesas.com/disclaimer |
dkato | 0:853f5b7408a7 | 21 | * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved. |
dkato | 0:853f5b7408a7 | 22 | *******************************************************************************/ |
dkato | 0:853f5b7408a7 | 23 | /**************************************************************************//** |
dkato | 0:853f5b7408a7 | 24 | * @file lcd_analog_rgb_ch0.c |
dkato | 0:853f5b7408a7 | 25 | * @version 1.00 |
dkato | 0:853f5b7408a7 | 26 | * $Rev: 199 $ |
dkato | 0:853f5b7408a7 | 27 | * $Date:: 2014-05-23 16:33:52 +0900#$ |
dkato | 0:853f5b7408a7 | 28 | * @brief LCD panel for vdc5 channel 0 function |
dkato | 0:853f5b7408a7 | 29 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 30 | |
dkato | 0:853f5b7408a7 | 31 | /****************************************************************************** |
dkato | 0:853f5b7408a7 | 32 | Includes <System Includes> , "Project Includes" |
dkato | 0:853f5b7408a7 | 33 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 34 | #include <string.h> |
dkato | 0:853f5b7408a7 | 35 | |
dkato | 0:853f5b7408a7 | 36 | #include "r_typedefs.h" |
dkato | 0:853f5b7408a7 | 37 | |
dkato | 0:853f5b7408a7 | 38 | #include "r_vdc5.h" |
dkato | 0:853f5b7408a7 | 39 | |
dkato | 0:853f5b7408a7 | 40 | #include "iodefine.h" |
dkato | 0:853f5b7408a7 | 41 | #include "lcd_panel.h" |
dkato | 0:853f5b7408a7 | 42 | |
dkato | 0:853f5b7408a7 | 43 | #if (LCD_VDC5_CH0_PANEL==1) |
dkato | 0:853f5b7408a7 | 44 | |
dkato | 0:853f5b7408a7 | 45 | /****************************************************************************** |
dkato | 0:853f5b7408a7 | 46 | Macro definitions |
dkato | 0:853f5b7408a7 | 47 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 48 | /* Port 11 */ |
dkato | 0:853f5b7408a7 | 49 | #define LCD_PORT11_5TH (0xE0FFu) |
dkato | 0:853f5b7408a7 | 50 | /* Port 10 */ |
dkato | 0:853f5b7408a7 | 51 | #define LCD_PORT10_5TH (0xFFFFu) |
dkato | 0:853f5b7408a7 | 52 | |
dkato | 0:853f5b7408a7 | 53 | #define FH_1_2_CYCLE (2u) |
dkato | 0:853f5b7408a7 | 54 | |
dkato | 0:853f5b7408a7 | 55 | /****************************************************************************** |
dkato | 0:853f5b7408a7 | 56 | Typedef definitions |
dkato | 0:853f5b7408a7 | 57 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 58 | |
dkato | 0:853f5b7408a7 | 59 | /****************************************************************************** |
dkato | 0:853f5b7408a7 | 60 | Imported global variables and functions (from other files) |
dkato | 0:853f5b7408a7 | 61 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 62 | |
dkato | 0:853f5b7408a7 | 63 | /****************************************************************************** |
dkato | 0:853f5b7408a7 | 64 | Exported global variables (to be accessed by other files) |
dkato | 0:853f5b7408a7 | 65 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 66 | |
dkato | 0:853f5b7408a7 | 67 | /****************************************************************************** |
dkato | 0:853f5b7408a7 | 68 | Private global variables and functions |
dkato | 0:853f5b7408a7 | 69 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 70 | |
dkato | 0:853f5b7408a7 | 71 | /**************************************************************************//** |
dkato | 0:853f5b7408a7 | 72 | * @brief LCD panel I/O port setup (VDC5 channel 0) |
dkato | 0:853f5b7408a7 | 73 | * @param[in] void |
dkato | 0:853f5b7408a7 | 74 | * @retval None |
dkato | 0:853f5b7408a7 | 75 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 76 | void GRAPHICS_SetLcdPanel_Ch0 (void) |
dkato | 0:853f5b7408a7 | 77 | { |
dkato | 0:853f5b7408a7 | 78 | volatile uint32_t dummy_read; |
dkato | 0:853f5b7408a7 | 79 | uint32_t reg_data; |
dkato | 0:853f5b7408a7 | 80 | |
dkato | 0:853f5b7408a7 | 81 | /* Analog RGB D-sub15 (RGB888) |
dkato | 0:853f5b7408a7 | 82 | : LCD0_CLK ... P11_15, 5th alternative function |
dkato | 0:853f5b7408a7 | 83 | HSYNC : LCD0_TCON0 ... P11_14, 5th alternative function |
dkato | 0:853f5b7408a7 | 84 | VSYNC : LCD0_TCON1 ... P11_13, 5th alternative function |
dkato | 0:853f5b7408a7 | 85 | LCD0_DATA |
dkato | 0:853f5b7408a7 | 86 | R[7:0] : LCD0_DATA[23:16] ... P10_0 ~ P10_7, 5th alternative function |
dkato | 0:853f5b7408a7 | 87 | G[7:0] : LCD0_DATA[15:8] ... P10_8 ~ P10_15, 5th alternative function |
dkato | 0:853f5b7408a7 | 88 | B[7:0] : LCD0_DATA[7:0] ... P11_0 ~ P11_7, 5th alternative function |
dkato | 0:853f5b7408a7 | 89 | */ |
dkato | 0:853f5b7408a7 | 90 | /* Port 11 */ |
dkato | 0:853f5b7408a7 | 91 | reg_data = (uint32_t)GPIO.PMC11 & (uint32_t)~LCD_PORT11_5TH; |
dkato | 0:853f5b7408a7 | 92 | GPIO.PMC11 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 93 | reg_data = (uint32_t)GPIO.PMC11; |
dkato | 0:853f5b7408a7 | 94 | dummy_read = reg_data; |
dkato | 0:853f5b7408a7 | 95 | /* PFCAE11, PFCE11, PFC11 ... 5th alternative function |
dkato | 0:853f5b7408a7 | 96 | PIPC11, PMC11 |
dkato | 0:853f5b7408a7 | 97 | b15:b13 : P11_15 ~ P11_13 |
dkato | 0:853f5b7408a7 | 98 | b7:b0 : P11_7 ~ P11_0 */ |
dkato | 0:853f5b7408a7 | 99 | reg_data = (uint32_t)GPIO.PFCAE11 | (uint32_t)LCD_PORT11_5TH; |
dkato | 0:853f5b7408a7 | 100 | GPIO.PFCAE11 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 101 | reg_data = (uint32_t)GPIO.PFCE11 & (uint32_t)~LCD_PORT11_5TH; |
dkato | 0:853f5b7408a7 | 102 | GPIO.PFCE11 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 103 | reg_data = (uint32_t)GPIO.PFC11 & (uint32_t)~LCD_PORT11_5TH; |
dkato | 0:853f5b7408a7 | 104 | GPIO.PFC11 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 105 | reg_data = (uint32_t)GPIO.PIPC11 | (uint32_t)LCD_PORT11_5TH; |
dkato | 0:853f5b7408a7 | 106 | GPIO.PIPC11 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 107 | reg_data = (uint32_t)GPIO.PMC11 | (uint32_t)LCD_PORT11_5TH; |
dkato | 0:853f5b7408a7 | 108 | GPIO.PMC11 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 109 | |
dkato | 0:853f5b7408a7 | 110 | /* Port 10 */ |
dkato | 0:853f5b7408a7 | 111 | reg_data = (uint32_t)GPIO.PMC10 & (uint32_t)~LCD_PORT10_5TH; |
dkato | 0:853f5b7408a7 | 112 | GPIO.PMC10 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 113 | reg_data = (uint32_t)GPIO.PMC10; |
dkato | 0:853f5b7408a7 | 114 | dummy_read = reg_data; |
dkato | 0:853f5b7408a7 | 115 | /* PFCAE10, PFCE10, PFC10 ... 5th alternative function |
dkato | 0:853f5b7408a7 | 116 | PIPC10, PMC10 |
dkato | 0:853f5b7408a7 | 117 | b15:b0 : P10_15 ~ P10_0 */ |
dkato | 0:853f5b7408a7 | 118 | reg_data = (uint32_t)GPIO.PFCAE10 | (uint32_t)LCD_PORT10_5TH; |
dkato | 0:853f5b7408a7 | 119 | GPIO.PFCAE10 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 120 | reg_data = (uint32_t)GPIO.PFCE10 & (uint32_t)~LCD_PORT10_5TH; |
dkato | 0:853f5b7408a7 | 121 | GPIO.PFCE10 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 122 | reg_data = (uint32_t)GPIO.PFC10 & (uint32_t)~LCD_PORT10_5TH; |
dkato | 0:853f5b7408a7 | 123 | GPIO.PFC10 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 124 | reg_data = (uint32_t)GPIO.PIPC10 | (uint32_t)LCD_PORT10_5TH; |
dkato | 0:853f5b7408a7 | 125 | GPIO.PIPC10 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 126 | reg_data = (uint32_t)GPIO.PMC10 | (uint32_t)LCD_PORT10_5TH; |
dkato | 0:853f5b7408a7 | 127 | GPIO.PMC10 = (uint16_t)reg_data; |
dkato | 0:853f5b7408a7 | 128 | } /* End of function GRAPHICS_SetLcdPanel_Ch0() */ |
dkato | 0:853f5b7408a7 | 129 | |
dkato | 0:853f5b7408a7 | 130 | /**************************************************************************//** |
dkato | 0:853f5b7408a7 | 131 | * @brief LCD TCON setup parameter acquisition processing (VDC5 channel 0) |
dkato | 0:853f5b7408a7 | 132 | * @param[out] outctrl : Address of the area for storing the LCD TCON timing setup data table |
dkato | 0:853f5b7408a7 | 133 | * @retval None |
dkato | 0:853f5b7408a7 | 134 | ******************************************************************************/ |
dkato | 0:853f5b7408a7 | 135 | void GRAPHICS_SetLcdTconSettings_Ch0 (const vdc5_lcd_tcon_timing_t * * const outctrl) |
dkato | 0:853f5b7408a7 | 136 | { |
dkato | 0:853f5b7408a7 | 137 | /* Analog RGB D-sub15 (RGB888), SVGA signal 800x600 */ |
dkato | 0:853f5b7408a7 | 138 | /* TCON timing setting, VS */ |
dkato | 0:853f5b7408a7 | 139 | static const vdc5_lcd_tcon_timing_t lcd_tcon_timing_VS = { |
dkato | 0:853f5b7408a7 | 140 | (uint16_t)(LCD_CH0_S_VSYNC * FH_1_2_CYCLE), /* Signal pulse start position */ |
dkato | 0:853f5b7408a7 | 141 | (uint16_t)(LCD_CH0_W_VSYNC * FH_1_2_CYCLE), /* Pulse width */ |
dkato | 0:853f5b7408a7 | 142 | VDC5_LCD_TCON_POLMD_NORMAL, |
dkato | 0:853f5b7408a7 | 143 | VDC5_LCD_TCON_REFSEL_HSYNC, |
dkato | 0:853f5b7408a7 | 144 | LCD_CH0_POL_VSYNC, /* Polarity inversion control of signal */ |
dkato | 0:853f5b7408a7 | 145 | VDC5_LCD_TCON_PIN_1, /* Output pin for LCD driving signal */ |
dkato | 0:853f5b7408a7 | 146 | LCD_CH0_OUT_EDGE /* Output phase control of signal */ |
dkato | 0:853f5b7408a7 | 147 | }; |
dkato | 0:853f5b7408a7 | 148 | /* TCON timing setting, HS */ |
dkato | 0:853f5b7408a7 | 149 | static const vdc5_lcd_tcon_timing_t lcd_tcon_timing_HS = { |
dkato | 0:853f5b7408a7 | 150 | (uint16_t)LCD_CH0_S_HSYNC, /* Signal pulse start position */ |
dkato | 0:853f5b7408a7 | 151 | (uint16_t)LCD_CH0_W_HSYNC, /* Pulse width */ |
dkato | 0:853f5b7408a7 | 152 | VDC5_LCD_TCON_POLMD_NORMAL, |
dkato | 0:853f5b7408a7 | 153 | VDC5_LCD_TCON_REFSEL_HSYNC, /* Signal operating reference select */ |
dkato | 0:853f5b7408a7 | 154 | LCD_CH0_POL_HSYNC, /* Polarity inversion control of signal */ |
dkato | 0:853f5b7408a7 | 155 | VDC5_LCD_TCON_PIN_0, /* Output pin for LCD driving signal */ |
dkato | 0:853f5b7408a7 | 156 | LCD_CH0_OUT_EDGE /* Output phase control of signal */ |
dkato | 0:853f5b7408a7 | 157 | }; |
dkato | 0:853f5b7408a7 | 158 | |
dkato | 0:853f5b7408a7 | 159 | if (outctrl != NULL) { |
dkato | 0:853f5b7408a7 | 160 | outctrl[VDC5_LCD_TCONSIG_STVA_VS] = &lcd_tcon_timing_VS; /* STVA/VS: Vsync */ |
dkato | 0:853f5b7408a7 | 161 | outctrl[VDC5_LCD_TCONSIG_STVB_VE] = NULL; /* STVB/VE: Not used */ |
dkato | 0:853f5b7408a7 | 162 | outctrl[VDC5_LCD_TCONSIG_STH_SP_HS] = &lcd_tcon_timing_HS; /* STH/SP/HS: Hsync */ |
dkato | 0:853f5b7408a7 | 163 | outctrl[VDC5_LCD_TCONSIG_STB_LP_HE] = NULL; /* STB/LP/HE: Not used */ |
dkato | 0:853f5b7408a7 | 164 | outctrl[VDC5_LCD_TCONSIG_CPV_GCK] = NULL; /* CPV/GCK: Not used */ |
dkato | 0:853f5b7408a7 | 165 | outctrl[VDC5_LCD_TCONSIG_POLA] = NULL; /* POLA: Not used */ |
dkato | 0:853f5b7408a7 | 166 | outctrl[VDC5_LCD_TCONSIG_POLB] = NULL; /* POLB: Not used */ |
dkato | 0:853f5b7408a7 | 167 | outctrl[VDC5_LCD_TCONSIG_DE] = NULL; /* DE: Not used */ |
dkato | 0:853f5b7408a7 | 168 | } |
dkato | 0:853f5b7408a7 | 169 | } /* End of function GRAPHICS_SetLcdTconSettings_Ch0() */ |
dkato | 0:853f5b7408a7 | 170 | |
dkato | 0:853f5b7408a7 | 171 | #endif /* LCD_VDC5_CH0_PANEL==LCD_CH0_PANEL_ANALOG_RGB */ |
dkato | 0:853f5b7408a7 | 172 |