Team X / Mbed 2 deprecated final_mbed

mbed

Dependencies:   LSM9DS1_Library_cal RPCInterface final mbed

Fork of SDFileSystem_HelloWorld by mbed official

VS1053.h@2:55495227fcca, 2017-05-01 (annotated)

Committer:
mikebenq
Date:
Mon May 01 11:05:37 2017 +0000
Revision:
2:55495227fcca
Parent:
1:f54bee9d59de 
Final_mbed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mikebenq 1:f54bee9d59de 1 #ifndef VS1053_H
mikebenq 1:f54bee9d59de 2 #define VS1053_H
mikebenq 1:f54bee9d59de 3
mikebenq 1:f54bee9d59de 4 #define FIXED_VOL
mikebenq 1:f54bee9d59de 5
mikebenq 1:f54bee9d59de 6 // the following two is exclusive use
mikebenq 1:f54bee9d59de 7 #define VS_PATCH
mikebenq 1:f54bee9d59de 8 //#define VS_SPECANA
mikebenq 1:f54bee9d59de 9
mikebenq 1:f54bee9d59de 10 #include "mbed.h"
mikebenq 1:f54bee9d59de 11 //#include "SDFileSystem.h"
mikebenq 1:f54bee9d59de 12 #include "string"
mikebenq 1:f54bee9d59de 13 #include "string.h"
mikebenq 1:f54bee9d59de 14
mikebenq 1:f54bee9d59de 15 // SCI register address assignment
mikebenq 1:f54bee9d59de 16 #define SCI_MODE 0x0
mikebenq 1:f54bee9d59de 17 #define SCI_STATUS 0x1
mikebenq 1:f54bee9d59de 18 #define SCI_BASS 0x2
mikebenq 1:f54bee9d59de 19 #define SCI_CLOCKF 0x3
mikebenq 1:f54bee9d59de 20 #define SCI_DECODE_TOME 0x4
mikebenq 1:f54bee9d59de 21 #define SCI_AUDATA 0x5
mikebenq 1:f54bee9d59de 22 #define SCI_WRAM 0x6
mikebenq 1:f54bee9d59de 23 #define SCI_WRAMADDR 0x7
mikebenq 1:f54bee9d59de 24 #define SCI_HDAT0 0x8
mikebenq 1:f54bee9d59de 25 #define SCI_HDAT1 0x9
mikebenq 1:f54bee9d59de 26 #define SCI_AIADDR 0xA
mikebenq 1:f54bee9d59de 27 #define SCI_VOL 0xB
mikebenq 1:f54bee9d59de 28 #define SCI_AICTRL0 0xC
mikebenq 1:f54bee9d59de 29 #define SCI_AICTRL1 0xD
mikebenq 1:f54bee9d59de 30 #define SCI_AICTRL2 0xE
mikebenq 1:f54bee9d59de 31 #define SCI_AICTRL3 0xF
mikebenq 1:f54bee9d59de 32
mikebenq 1:f54bee9d59de 33
mikebenq 1:f54bee9d59de 34 //SCI_MODE register bits as of p.38 of the datasheet
mikebenq 1:f54bee9d59de 35 #define SM_DIFF 0x0001
mikebenq 1:f54bee9d59de 36 #define SM_LAYER12 0x0002
mikebenq 1:f54bee9d59de 37 #define SM_RESET 0x0004
mikebenq 1:f54bee9d59de 38 #define SM_CANCEL 0x0008
mikebenq 1:f54bee9d59de 39 #define SM_EARSPEAKER_LO 0x0010
mikebenq 1:f54bee9d59de 40 #define SM_TESTS 0x0020
mikebenq 1:f54bee9d59de 41 #define SM_STREAM 0x0040
mikebenq 1:f54bee9d59de 42 #define SM_EARSPEAKER_HI 0x0080
mikebenq 1:f54bee9d59de 43 #define SM_DACT 0x0100
mikebenq 1:f54bee9d59de 44 #define SM_SDIORD 0x0200
mikebenq 1:f54bee9d59de 45 #define SM_SDISHARE 0x0400
mikebenq 1:f54bee9d59de 46 #define SM_SDINEW 0x0800
mikebenq 1:f54bee9d59de 47 #define SM_ADPCM 0x1000
mikebenq 1:f54bee9d59de 48 #define SM_B13 0x2000
mikebenq 1:f54bee9d59de 49 #define SM_LINE1 0x4000
mikebenq 1:f54bee9d59de 50 #define SM_CLK_RANGE 0x8000
mikebenq 1:f54bee9d59de 51
mikebenq 1:f54bee9d59de 52 //SCI_CLOCKF register bits as of p.42 of the datasheet
mikebenq 1:f54bee9d59de 53 #define SC_MULT_XTALI 0x0000
mikebenq 1:f54bee9d59de 54 #define SC_MULT_XTALIx20 0x2000
mikebenq 1:f54bee9d59de 55 #define SC_MULT_XTALIx25 0x4000
mikebenq 1:f54bee9d59de 56 #define SC_MULT_XTALIx30 0x6000
mikebenq 1:f54bee9d59de 57 #define SC_MULT_XTALIx35 0x8000
mikebenq 1:f54bee9d59de 58 #define SC_MULT_XTALIx40 0xA000
mikebenq 1:f54bee9d59de 59 #define SC_MULT_XTALIx45 0xC000
mikebenq 1:f54bee9d59de 60 #define SC_MULT_XTALIx50 0xE000
mikebenq 1:f54bee9d59de 61 //
mikebenq 1:f54bee9d59de 62 #define SC_ADD_NOMOD 0x0000
mikebenq 1:f54bee9d59de 63 #define SC_ADD_10x 0x0800
mikebenq 1:f54bee9d59de 64 #define SC_ADD_15x 0x1000
mikebenq 1:f54bee9d59de 65 #define SC_ADD_20x 0x1800
mikebenq 1:f54bee9d59de 66
mikebenq 1:f54bee9d59de 67
mikebenq 1:f54bee9d59de 68 // Extra Parameter in X memory (refer to p.58 of the datasheet)
mikebenq 1:f54bee9d59de 69 #define para_chipID_0 0x1E00
mikebenq 1:f54bee9d59de 70 #define para_chipID_1 0x1E01
mikebenq 1:f54bee9d59de 71 #define para_version 0x1E02
mikebenq 1:f54bee9d59de 72 #define para_config1 0x1E03
mikebenq 1:f54bee9d59de 73 #define para_playSpeed 0x1E04
mikebenq 1:f54bee9d59de 74 #define para_byteRate 0x1E05
mikebenq 1:f54bee9d59de 75 #define para_endFillByte 0x1E06
mikebenq 1:f54bee9d59de 76 //
mikebenq 1:f54bee9d59de 77 #define para_positionMsec_0 0x1E27
mikebenq 1:f54bee9d59de 78 #define para_positionMsec_1 0x1E28
mikebenq 1:f54bee9d59de 79 #define para_resync 0x1E29
mikebenq 1:f54bee9d59de 80
mikebenq 1:f54bee9d59de 81
mikebenq 1:f54bee9d59de 82 class VS1053 {
mikebenq 1:f54bee9d59de 83
mikebenq 1:f54bee9d59de 84 public:
mikebenq 1:f54bee9d59de 85 VS1053(
mikebenq 1:f54bee9d59de 86 //PinName _mmosi, PinName _mmiso, PinName _ssck, PinName _ccs, const char* _name,
mikebenq 1:f54bee9d59de 87 PinName _mosi, PinName _miso, PinName _sck, PinName _cs, PinName _rst, PinName _dreq,
mikebenq 1:f54bee9d59de 88 PinName _dcs, PinName _vol);
mikebenq 1:f54bee9d59de 89
mikebenq 1:f54bee9d59de 90 void cs_low(void);
mikebenq 1:f54bee9d59de 91 void cs_high(void);
mikebenq 1:f54bee9d59de 92 void dcs_low(void);
mikebenq 1:f54bee9d59de 93 void dcs_high(void);
mikebenq 1:f54bee9d59de 94 void sci_en(void);
mikebenq 1:f54bee9d59de 95 void sci_dis(void);
mikebenq 1:f54bee9d59de 96 void sdi_en(void);
mikebenq 1:f54bee9d59de 97 void sdi_dis(void);
mikebenq 1:f54bee9d59de 98
mikebenq 1:f54bee9d59de 99 void sci_initialise(void);
mikebenq 1:f54bee9d59de 100 void sdi_initialise(void);
mikebenq 1:f54bee9d59de 101 void reset(void);
mikebenq 1:f54bee9d59de 102 void power_down(void);
mikebenq 1:f54bee9d59de 103
mikebenq 1:f54bee9d59de 104 void sci_write(unsigned char, unsigned short int);
mikebenq 1:f54bee9d59de 105 void sdi_write(unsigned char);
mikebenq 1:f54bee9d59de 106 unsigned short int sci_read(unsigned short int);
mikebenq 1:f54bee9d59de 107 void sine_test_activate(unsigned char);
mikebenq 1:f54bee9d59de 108 void volume(void);
mikebenq 1:f54bee9d59de 109 void sine_test_deactivate(void);
mikebenq 1:f54bee9d59de 110 void writeStream(unsigned char *, int);
mikebenq 1:f54bee9d59de 111 #if 0
mikebenq 1:f54bee9d59de 112 void putcStream(unsigned char);
mikebenq 1:f54bee9d59de 113 #endif
mikebenq 1:f54bee9d59de 114 void terminateStream(void);
mikebenq 1:f54bee9d59de 115 // void write_plugin(const unsigned short *, unsigned int);
mikebenq 1:f54bee9d59de 116 void initialize(void);
mikebenq 1:f54bee9d59de 117
mikebenq 1:f54bee9d59de 118 DigitalIn _DREQ;
mikebenq 1:f54bee9d59de 119 DigitalOut _RST;
mikebenq 1:f54bee9d59de 120 AnalogIn _VOL;
mikebenq 1:f54bee9d59de 121
mikebenq 1:f54bee9d59de 122 protected:
mikebenq 1:f54bee9d59de 123 unsigned short int wram_read(unsigned short int);
mikebenq 1:f54bee9d59de 124 void wram_write(unsigned short int, unsigned short int);
mikebenq 1:f54bee9d59de 125 void write_plugin(const unsigned short *, unsigned int);
mikebenq 1:f54bee9d59de 126 SPI _spi;
mikebenq 1:f54bee9d59de 127 DigitalOut _CS;
mikebenq 1:f54bee9d59de 128 DigitalOut _DCS;
mikebenq 1:f54bee9d59de 129 int firstTime;
mikebenq 1:f54bee9d59de 130
mikebenq 1:f54bee9d59de 131 };
mikebenq 1:f54bee9d59de 132 #endif