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Dependencies:   mbed

SysClockConf.cpp@0:f428b670026a, 2019-10-26 (annotated)

Committer:
Mgiris
Date:
Sat Oct 26 03:57:39 2019 +0000
Revision:
0:f428b670026a
Torreta

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Mgiris 0:f428b670026a 1 /*
Mgiris 0:f428b670026a 2 ******************************************************************************
Mgiris 0:f428b670026a 3 * @file SysClockConf.c
Mgiris 0:f428b670026a 4 * @version
Mgiris 0:f428b670026a 5 * @date 05-July-2016
Mgiris 0:f428b670026a 6 * @brief System Clock configuration for STM32F103C8T6
Mgiris 0:f428b670026a 7 *****************************************************************************
Mgiris 0:f428b670026a 8 *
Mgiris 0:f428b670026a 9 * All rights reserved.
Mgiris 0:f428b670026a 10
Mgiris 0:f428b670026a 11 This program is free software: you can redistribute it and/or modify
Mgiris 0:f428b670026a 12 it under the terms of the GNU General Public License as published by
Mgiris 0:f428b670026a 13 the Free Software Foundation, either version 3 of the License, or
Mgiris 0:f428b670026a 14 (at your option) any later version.
Mgiris 0:f428b670026a 15
Mgiris 0:f428b670026a 16 This program is distributed in the hope that it will be useful,
Mgiris 0:f428b670026a 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
Mgiris 0:f428b670026a 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Mgiris 0:f428b670026a 19 GNU General Public License for more details.
Mgiris 0:f428b670026a 20
Mgiris 0:f428b670026a 21 You should have received a copy of the GNU General Public License
Mgiris 0:f428b670026a 22 along with this program. If not, see <http://www.gnu.org/licenses/>.
Mgiris 0:f428b670026a 23 */
Mgiris 0:f428b670026a 24
Mgiris 0:f428b670026a 25 #include "SysClockConf.h"
Mgiris 0:f428b670026a 26 #include "mbed.h"
Mgiris 0:f428b670026a 27
Mgiris 0:f428b670026a 28 void HSE_SystemClock_Config(void) {
Mgiris 0:f428b670026a 29 RCC_OscInitTypeDef RCC_OscInitStruct;
Mgiris 0:f428b670026a 30 RCC_ClkInitTypeDef RCC_ClkInitStruct;
Mgiris 0:f428b670026a 31 RCC_PeriphCLKInitTypeDef PeriphClkInit;
Mgiris 0:f428b670026a 32
Mgiris 0:f428b670026a 33 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
Mgiris 0:f428b670026a 34 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
Mgiris 0:f428b670026a 35 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
Mgiris 0:f428b670026a 36 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
Mgiris 0:f428b670026a 37 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
Mgiris 0:f428b670026a 38 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
Mgiris 0:f428b670026a 39 HAL_RCC_OscConfig(&RCC_OscInitStruct);
Mgiris 0:f428b670026a 40 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
Mgiris 0:f428b670026a 41 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
Mgiris 0:f428b670026a 42 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
Mgiris 0:f428b670026a 43 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
Mgiris 0:f428b670026a 44 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
Mgiris 0:f428b670026a 45 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
Mgiris 0:f428b670026a 46 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
Mgiris 0:f428b670026a 47 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
Mgiris 0:f428b670026a 48 PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
Mgiris 0:f428b670026a 49 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
Mgiris 0:f428b670026a 50 }
Mgiris 0:f428b670026a 51
Mgiris 0:f428b670026a 52 void confSysClock(void) {
Mgiris 0:f428b670026a 53 HAL_RCC_DeInit();
Mgiris 0:f428b670026a 54 HSE_SystemClock_Config();
Mgiris 0:f428b670026a 55 SystemCoreClockUpdate();
Mgiris 0:f428b670026a 56 }