mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************
bogdanm 0:9b334a45a8ff 2 *
bogdanm 0:9b334a45a8ff 3 * Part one of the system initialization code, contains low-level
bogdanm 0:9b334a45a8ff 4 * initialization, plain thumb variant.
bogdanm 0:9b334a45a8ff 5 *
bogdanm 0:9b334a45a8ff 6 * Copyright 2011 IAR Systems. All rights reserved.
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * $Revision: 47876 $
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 **************************************************/
bogdanm 0:9b334a45a8ff 11
bogdanm 0:9b334a45a8ff 12 ;
bogdanm 0:9b334a45a8ff 13 ; The modules in this file are included in the libraries, and may be replaced
bogdanm 0:9b334a45a8ff 14 ; by any user-defined modules that define the PUBLIC symbol _program_start or
bogdanm 0:9b334a45a8ff 15 ; a user defined start symbol.
bogdanm 0:9b334a45a8ff 16 ; To override the cstartup defined in the library, simply add your modified
bogdanm 0:9b334a45a8ff 17 ; version to the workbench project.
bogdanm 0:9b334a45a8ff 18 ;
bogdanm 0:9b334a45a8ff 19 ; The vector table is normally located at address 0.
bogdanm 0:9b334a45a8ff 20 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
bogdanm 0:9b334a45a8ff 21 ; The name "__vector_table" has special meaning for C-SPY:
bogdanm 0:9b334a45a8ff 22 ; it is where the SP start value is found, and the NVIC vector
bogdanm 0:9b334a45a8ff 23 ; table register (VTOR) is initialized to this address if != 0.
bogdanm 0:9b334a45a8ff 24 ;
bogdanm 0:9b334a45a8ff 25 ; Cortex-M version
bogdanm 0:9b334a45a8ff 26 ;
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 MODULE ?cstartup
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 ;; Forward declaration of sections.
bogdanm 0:9b334a45a8ff 32 SECTION CSTACK:DATA:NOROOT(3)
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 SECTION .intvec:CODE:NOROOT(2)
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 EXTERN __iar_program_start
bogdanm 0:9b334a45a8ff 37 EXTERN SystemInit
bogdanm 0:9b334a45a8ff 38 PUBLIC __vector_table
bogdanm 0:9b334a45a8ff 39 PUBLIC __vector_table_0x1c
bogdanm 0:9b334a45a8ff 40 PUBLIC __Vectors
bogdanm 0:9b334a45a8ff 41 PUBLIC __Vectors_End
bogdanm 0:9b334a45a8ff 42 PUBLIC __Vectors_Size
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 DATA
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 __vector_table
bogdanm 0:9b334a45a8ff 47 DCD sfe(CSTACK)
bogdanm 0:9b334a45a8ff 48 DCD Reset_Handler
bogdanm 0:9b334a45a8ff 49 DCD NMI_Handler
bogdanm 0:9b334a45a8ff 50 DCD HardFault_Handler
bogdanm 0:9b334a45a8ff 51 DCD 0
bogdanm 0:9b334a45a8ff 52 DCD 0
bogdanm 0:9b334a45a8ff 53 DCD 0
bogdanm 0:9b334a45a8ff 54 __vector_table_0x1c
bogdanm 0:9b334a45a8ff 55 DCD 0
bogdanm 0:9b334a45a8ff 56 DCD 0
bogdanm 0:9b334a45a8ff 57 DCD 0
bogdanm 0:9b334a45a8ff 58 DCD 0
bogdanm 0:9b334a45a8ff 59 DCD SVC_Handler
bogdanm 0:9b334a45a8ff 60 DCD 0
bogdanm 0:9b334a45a8ff 61 DCD 0
bogdanm 0:9b334a45a8ff 62 DCD PendSV_Handler
bogdanm 0:9b334a45a8ff 63 DCD SysTick_Handler
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 ; External Interrupts
bogdanm 0:9b334a45a8ff 66 DCD SPI0_IRQHandler ; SPI0 controller
bogdanm 0:9b334a45a8ff 67 DCD SPI1_IRQHandler ; SPI1 controller
bogdanm 0:9b334a45a8ff 68 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 69 DCD UART0_IRQHandler ; UART0
bogdanm 0:9b334a45a8ff 70 DCD UART1_IRQHandler ; UART1
bogdanm 0:9b334a45a8ff 71 DCD UART2_IRQHandler ; UART2
bogdanm 0:9b334a45a8ff 72 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 73 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 74 DCD I2C_IRQHandler ; I2C controller
bogdanm 0:9b334a45a8ff 75 DCD SCT_IRQHandler ; Smart Counter Timer
bogdanm 0:9b334a45a8ff 76 DCD MRT_IRQHandler ; Multi-Rate Timer
bogdanm 0:9b334a45a8ff 77 DCD CMP_IRQHandler ; Comparator
bogdanm 0:9b334a45a8ff 78 DCD WDT_IRQHandler ; PIO1 (0:11)
bogdanm 0:9b334a45a8ff 79 DCD BOD_IRQHandler ; Brown Out Detect
bogdanm 0:9b334a45a8ff 80 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 81 DCD WKT_IRQHandler ; Wakeup timer
bogdanm 0:9b334a45a8ff 82 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 83 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 84 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 85 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 86 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 87 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 88 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 89 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 90 DCD PININT0_IRQHandler ; PIO INT0
bogdanm 0:9b334a45a8ff 91 DCD PININT1_IRQHandler ; PIO INT1
bogdanm 0:9b334a45a8ff 92 DCD PININT2_IRQHandler ; PIO INT2
bogdanm 0:9b334a45a8ff 93 DCD PININT3_IRQHandler ; PIO INT3
bogdanm 0:9b334a45a8ff 94 DCD PININT4_IRQHandler ; PIO INT4
bogdanm 0:9b334a45a8ff 95 DCD PININT5_IRQHandler ; PIO INT5
bogdanm 0:9b334a45a8ff 96 DCD PININT6_IRQHandler ; PIO INT6
bogdanm 0:9b334a45a8ff 97 DCD PININT7_IRQHandler ; PIO INT7
bogdanm 0:9b334a45a8ff 98 __Vectors_End
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 __Vectors EQU __vector_table
bogdanm 0:9b334a45a8ff 101 __Vectors_Size EQU __Vectors_End - __Vectors
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
bogdanm 0:9b334a45a8ff 104 ;;
bogdanm 0:9b334a45a8ff 105 ;; Default interrupt handlers.
bogdanm 0:9b334a45a8ff 106 ;;
bogdanm 0:9b334a45a8ff 107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 THUMB
bogdanm 0:9b334a45a8ff 110 PUBWEAK Reset_Handler
bogdanm 0:9b334a45a8ff 111 SECTION .text:CODE:NOROOT:REORDER(2)
bogdanm 0:9b334a45a8ff 112 Reset_Handler
bogdanm 0:9b334a45a8ff 113 LDR R0, =SystemInit
bogdanm 0:9b334a45a8ff 114 BLX R0
bogdanm 0:9b334a45a8ff 115 LDR R0, =__iar_program_start
bogdanm 0:9b334a45a8ff 116 BX R0
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 PUBWEAK NMI_Handler
bogdanm 0:9b334a45a8ff 119 PUBWEAK HardFault_Handler
bogdanm 0:9b334a45a8ff 120 PUBWEAK SVC_Handler
bogdanm 0:9b334a45a8ff 121 PUBWEAK PendSV_Handler
bogdanm 0:9b334a45a8ff 122 PUBWEAK SysTick_Handler
bogdanm 0:9b334a45a8ff 123 PUBWEAK SPI0_IRQHandler
bogdanm 0:9b334a45a8ff 124 PUBWEAK SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 125 PUBWEAK UART0_IRQHandler
bogdanm 0:9b334a45a8ff 126 PUBWEAK UART1_IRQHandler
bogdanm 0:9b334a45a8ff 127 PUBWEAK UART2_IRQHandler
bogdanm 0:9b334a45a8ff 128 PUBWEAK I2C_IRQHandler
bogdanm 0:9b334a45a8ff 129 PUBWEAK SCT_IRQHandler
bogdanm 0:9b334a45a8ff 130 PUBWEAK MRT_IRQHandler
bogdanm 0:9b334a45a8ff 131 PUBWEAK CMP_IRQHandler
bogdanm 0:9b334a45a8ff 132 PUBWEAK WDT_IRQHandler
bogdanm 0:9b334a45a8ff 133 PUBWEAK BOD_IRQHandler
bogdanm 0:9b334a45a8ff 134 PUBWEAK WKT_IRQHandler
bogdanm 0:9b334a45a8ff 135 PUBWEAK PININT0_IRQHandler
bogdanm 0:9b334a45a8ff 136 PUBWEAK PININT1_IRQHandler
bogdanm 0:9b334a45a8ff 137 PUBWEAK PININT2_IRQHandler
bogdanm 0:9b334a45a8ff 138 PUBWEAK PININT3_IRQHandler
bogdanm 0:9b334a45a8ff 139 PUBWEAK PININT4_IRQHandler
bogdanm 0:9b334a45a8ff 140 PUBWEAK PININT5_IRQHandler
bogdanm 0:9b334a45a8ff 141 PUBWEAK PININT6_IRQHandler
bogdanm 0:9b334a45a8ff 142 PUBWEAK PININT7_IRQHandler
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 SECTION .text:CODE:REORDER:NOROOT(1)
bogdanm 0:9b334a45a8ff 145 THUMB
bogdanm 0:9b334a45a8ff 146 NMI_Handler
bogdanm 0:9b334a45a8ff 147 HardFault_Handler
bogdanm 0:9b334a45a8ff 148 SVC_Handler
bogdanm 0:9b334a45a8ff 149 PendSV_Handler
bogdanm 0:9b334a45a8ff 150 SysTick_Handler
bogdanm 0:9b334a45a8ff 151 SPI0_IRQHandler
bogdanm 0:9b334a45a8ff 152 SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 153 UART0_IRQHandler
bogdanm 0:9b334a45a8ff 154 UART1_IRQHandler
bogdanm 0:9b334a45a8ff 155 UART2_IRQHandler
bogdanm 0:9b334a45a8ff 156 I2C_IRQHandler
bogdanm 0:9b334a45a8ff 157 SCT_IRQHandler
bogdanm 0:9b334a45a8ff 158 MRT_IRQHandler
bogdanm 0:9b334a45a8ff 159 CMP_IRQHandler
bogdanm 0:9b334a45a8ff 160 WDT_IRQHandler
bogdanm 0:9b334a45a8ff 161 BOD_IRQHandler
bogdanm 0:9b334a45a8ff 162 WKT_IRQHandler
bogdanm 0:9b334a45a8ff 163 PININT0_IRQHandler
bogdanm 0:9b334a45a8ff 164 PININT1_IRQHandler
bogdanm 0:9b334a45a8ff 165 PININT2_IRQHandler
bogdanm 0:9b334a45a8ff 166 PININT3_IRQHandler
bogdanm 0:9b334a45a8ff 167 PININT4_IRQHandler
bogdanm 0:9b334a45a8ff 168 PININT5_IRQHandler
bogdanm 0:9b334a45a8ff 169 PININT6_IRQHandler
bogdanm 0:9b334a45a8ff 170 PININT7_IRQHandler
bogdanm 0:9b334a45a8ff 171 Default_IRQHandler
bogdanm 0:9b334a45a8ff 172 B Default_IRQHandler
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 SECTION .crp:CODE:ROOT(2)
bogdanm 0:9b334a45a8ff 175 DATA
bogdanm 0:9b334a45a8ff 176 /* Code Read Protection
bogdanm 0:9b334a45a8ff 177 NO_ISP 0x4E697370 - Prevents sampling of pin PIO0_1 for entering ISP mode
bogdanm 0:9b334a45a8ff 178 CRP1 0x12345678 - Write to RAM command cannot access RAM below 0x10000300.
bogdanm 0:9b334a45a8ff 179 - Copy RAM to flash command can not write to Sector 0.
bogdanm 0:9b334a45a8ff 180 - Erase command can erase Sector 0 only when all sectors
bogdanm 0:9b334a45a8ff 181 are selected for erase.
bogdanm 0:9b334a45a8ff 182 - Compare command is disabled.
bogdanm 0:9b334a45a8ff 183 - Read Memory command is disabled.
bogdanm 0:9b334a45a8ff 184 CRP2 0x87654321 - Read Memory is disabled.
bogdanm 0:9b334a45a8ff 185 - Write to RAM is disabled.
bogdanm 0:9b334a45a8ff 186 - "Go" command is disabled.
bogdanm 0:9b334a45a8ff 187 - Copy RAM to flash is disabled.
bogdanm 0:9b334a45a8ff 188 - Compare is disabled.
bogdanm 0:9b334a45a8ff 189 CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
bogdanm 0:9b334a45a8ff 190 by pulling PIO0_1 LOW is disabled if a valid user code is
bogdanm 0:9b334a45a8ff 191 present in flash sector 0.
bogdanm 0:9b334a45a8ff 192 Caution: If CRP3 is selected, no future factory testing can be
bogdanm 0:9b334a45a8ff 193 performed on the device.
bogdanm 0:9b334a45a8ff 194 */
bogdanm 0:9b334a45a8ff 195 DCD 0xFFFFFFFF
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 END