mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

Committer:
rodriguise
Date:
Mon Oct 17 18:47:01 2016 +0000
Revision:
148:4802eb17e82b
Parent:
147:30b64687e01f
backup

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<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file pwm_map.h
<> 144:ef7eb2e8f9f7 4 * @brief PWM HW register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 3378 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-04-28 13:38:36 +0530 (Tue, 28 Apr 2015) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 147:30b64687e01f 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 147:30b64687e01f 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 147:30b64687e01f 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 147:30b64687e01f 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 147:30b64687e01f 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 147:30b64687e01f 15 * if applicable the software license agreement. Do not use this software and/or
<> 147:30b64687e01f 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 147:30b64687e01f 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 147:30b64687e01f 18 * terms and conditions.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 25 * @endinternal
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * @ingroup pwm
<> 144:ef7eb2e8f9f7 28 *
<> 144:ef7eb2e8f9f7 29 * @details
<> 144:ef7eb2e8f9f7 30 * <p>
<> 144:ef7eb2e8f9f7 31 * PWM HW register map description
<> 144:ef7eb2e8f9f7 32 * </p>
<> 144:ef7eb2e8f9f7 33 *
<> 144:ef7eb2e8f9f7 34 * <h1> Reference document(s) </h1>
<> 144:ef7eb2e8f9f7 35 * <p>
<> 144:ef7eb2e8f9f7 36 * <a href="../../../../build/doc/pdf/IPC7205_PWM_APB_DS_v1P1.pdf" target="_blank">
<> 144:ef7eb2e8f9f7 37 * IPC7205 APB PWM Design Specification v1.1 </a>
<> 144:ef7eb2e8f9f7 38 * </p>
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 #ifndef PWM_MAP_H_
<> 144:ef7eb2e8f9f7 42 #define PWM_MAP_H_
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #include "architecture.h"
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /** Power management Control HW Structure Overlay */
<> 144:ef7eb2e8f9f7 47 #ifdef REVB
<> 144:ef7eb2e8f9f7 48 typedef struct {
<> 144:ef7eb2e8f9f7 49 __IO uint32_t DUTYCYCLE;
<> 144:ef7eb2e8f9f7 50 union {
<> 144:ef7eb2e8f9f7 51 struct {
<> 144:ef7eb2e8f9f7 52 __IO uint32_t ENABLED :1;/**< 1 = PWM enable , 0 = PWM disable */
<> 144:ef7eb2e8f9f7 53 __I uint32_t CURRENT :1;/**< current state of PWM enable signal */
<> 144:ef7eb2e8f9f7 54 __O uint32_t PAD1 :6; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 144:ef7eb2e8f9f7 55 __O uint32_t RDPWMEN :1;/**< current state of pwmEnable configuration */
<> 144:ef7eb2e8f9f7 56 __O uint32_t RDPWMOP :1;/**< current state of PWM out signal */
<> 144:ef7eb2e8f9f7 57 __O uint32_t PAD2 :6; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 144:ef7eb2e8f9f7 58 } BITS;
<> 144:ef7eb2e8f9f7 59 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 60 } PWMOUT;
<> 144:ef7eb2e8f9f7 61 __O uint32_t DISABLE;
<> 144:ef7eb2e8f9f7 62 union {
<> 144:ef7eb2e8f9f7 63 struct {
<> 144:ef7eb2e8f9f7 64 __IO uint32_t ENABLED :1;
<> 144:ef7eb2e8f9f7 65 __O uint32_t PAD1 :7; /**< Reserved. Writes have no effect */
<> 144:ef7eb2e8f9f7 66 __O uint32_t STATE :1; /**< current state of prescaler enable configuration. */
<> 144:ef7eb2e8f9f7 67 __O uint32_t PAD2 :7; /**< Reserved. Writes have no effect; Read as 0x00. */
<> 144:ef7eb2e8f9f7 68 } BITS;
<> 144:ef7eb2e8f9f7 69 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 70 } PRESCALE_EN;
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 __O uint32_t PRESCALE_DIS;
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 } PwmReg_t, *PwmReg_pt;
<> 144:ef7eb2e8f9f7 75 #endif /* REVB */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 #ifdef REVD
<> 144:ef7eb2e8f9f7 78 typedef struct {
<> 144:ef7eb2e8f9f7 79 __IO uint32_t DUTYCYCLE;
<> 144:ef7eb2e8f9f7 80 union {
<> 144:ef7eb2e8f9f7 81 struct {
<> 144:ef7eb2e8f9f7 82 __O uint32_t ENABLE :8; /**< Write any value to enable PWM output */
<> 144:ef7eb2e8f9f7 83 __I uint32_t PAD :1; /** < Pad */
<> 144:ef7eb2e8f9f7 84 __I uint32_t ENABLE_STATE :1; /**< Current state of pwmEnable configuration bit. ‘1’ PWM output is enabled. ‘0’ PWN output is disabled. */
<> 144:ef7eb2e8f9f7 85 __I uint32_t OUTPUT_STATE :1; /**< Current state of PWM output */
<> 144:ef7eb2e8f9f7 86 } BITS;
<> 144:ef7eb2e8f9f7 87 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 88 } PWM_ENABLE;
<> 144:ef7eb2e8f9f7 89 __O uint32_t PWM_DISABLE;
<> 144:ef7eb2e8f9f7 90 union {
<> 144:ef7eb2e8f9f7 91 struct {
<> 144:ef7eb2e8f9f7 92 __O uint32_t ENABLE :8; /**< Write any value to select enable the 4-bit prescaler */
<> 144:ef7eb2e8f9f7 93 __I uint32_t STATE:1; /**< Current state of the prescaler. ‘1’ the prescaler is enabled. ‘0’ the prescaler is disabled. */
<> 144:ef7eb2e8f9f7 94 } BITS;
<> 144:ef7eb2e8f9f7 95 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 96 } PRESCALE_ENABLE;
<> 144:ef7eb2e8f9f7 97 __O uint32_t PRESCALE_DISABLE;
<> 144:ef7eb2e8f9f7 98 } PwmReg_t, *PwmReg_pt;
<> 144:ef7eb2e8f9f7 99 #endif /* REVD */
<> 144:ef7eb2e8f9f7 100 #endif /* PWM_MAP_H_ */