teralytic / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_IAR/startup_LPC17xx.S@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;/*****************************************************************************
<> 144:ef7eb2e8f9f7 2 ; * @file: startup_LPC17xx.s
<> 144:ef7eb2e8f9f7 3 ; * @purpose: CMSIS Cortex-M3 Core Device Startup File
<> 144:ef7eb2e8f9f7 4 ; * for the NXP LPC17xx Device Series
<> 144:ef7eb2e8f9f7 5 ; * @version: V1.03
<> 144:ef7eb2e8f9f7 6 ; * @date: 09. February 2010
<> 144:ef7eb2e8f9f7 7 ; *----------------------------------------------------------------------------
<> 144:ef7eb2e8f9f7 8 ; *
<> 144:ef7eb2e8f9f7 9 ; * Copyright (C) 2010 ARM Limited. All rights reserved.
<> 144:ef7eb2e8f9f7 10 ; *
<> 144:ef7eb2e8f9f7 11 ; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
<> 144:ef7eb2e8f9f7 12 ; * processor based microcontrollers. This file can be freely distributed
<> 144:ef7eb2e8f9f7 13 ; * within development tools that are supporting such ARM based processors.
<> 144:ef7eb2e8f9f7 14 ; *
<> 144:ef7eb2e8f9f7 15 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 16 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 17 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 18 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
<> 144:ef7eb2e8f9f7 19 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 20 ; *
<> 144:ef7eb2e8f9f7 21 ; ******************************************************************************/
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 ;
<> 144:ef7eb2e8f9f7 25 ; The modules in this file are included in the libraries, and may be replaced
<> 144:ef7eb2e8f9f7 26 ; by any user-defined modules that define the PUBLIC symbol _program_start or
<> 144:ef7eb2e8f9f7 27 ; a user defined start symbol.
<> 144:ef7eb2e8f9f7 28 ; To override the cstartup defined in the library, simply add your modified
<> 144:ef7eb2e8f9f7 29 ; version to the workbench project.
<> 144:ef7eb2e8f9f7 30 ;
<> 144:ef7eb2e8f9f7 31 ; The vector table is normally located at address 0.
<> 144:ef7eb2e8f9f7 32 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
<> 144:ef7eb2e8f9f7 33 ; The name "__vector_table" has special meaning for C-SPY:
<> 144:ef7eb2e8f9f7 34 ; it is where the SP start value is found, and the NVIC vector
<> 144:ef7eb2e8f9f7 35 ; table register (VTOR) is initialized to this address if != 0.
<> 144:ef7eb2e8f9f7 36 ;
<> 144:ef7eb2e8f9f7 37 ; Cortex-M version
<> 144:ef7eb2e8f9f7 38 ;
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 MODULE ?cstartup
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 ;; Forward declaration of sections.
<> 144:ef7eb2e8f9f7 43 SECTION CSTACK:DATA:NOROOT(3)
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 SECTION .intvec:CODE:NOROOT(2)
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 EXTERN __iar_program_start
<> 144:ef7eb2e8f9f7 48 EXTERN SystemInit
<> 144:ef7eb2e8f9f7 49 PUBLIC __vector_table
<> 144:ef7eb2e8f9f7 50 PUBLIC __vector_table_0x1c
<> 144:ef7eb2e8f9f7 51 PUBLIC __Vectors
<> 144:ef7eb2e8f9f7 52 PUBLIC __Vectors_End
<> 144:ef7eb2e8f9f7 53 PUBLIC __Vectors_Size
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 DATA
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 __vector_table
<> 144:ef7eb2e8f9f7 58 DCD sfe(CSTACK)
<> 144:ef7eb2e8f9f7 59 DCD Reset_Handler
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 DCD NMI_Handler
<> 144:ef7eb2e8f9f7 62 DCD HardFault_Handler
<> 144:ef7eb2e8f9f7 63 DCD MemManage_Handler
<> 144:ef7eb2e8f9f7 64 DCD BusFault_Handler
<> 144:ef7eb2e8f9f7 65 DCD UsageFault_Handler
<> 144:ef7eb2e8f9f7 66 __vector_table_0x1c
<> 144:ef7eb2e8f9f7 67 DCD 0
<> 144:ef7eb2e8f9f7 68 DCD 0
<> 144:ef7eb2e8f9f7 69 DCD 0
<> 144:ef7eb2e8f9f7 70 DCD 0
<> 144:ef7eb2e8f9f7 71 DCD SVC_Handler
<> 144:ef7eb2e8f9f7 72 DCD DebugMon_Handler
<> 144:ef7eb2e8f9f7 73 DCD 0
<> 144:ef7eb2e8f9f7 74 DCD PendSV_Handler
<> 144:ef7eb2e8f9f7 75 DCD SysTick_Handler
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 ; External Interrupts
<> 144:ef7eb2e8f9f7 78 DCD WDT_IRQHandler ; 16: Watchdog Timer
<> 144:ef7eb2e8f9f7 79 DCD TIMER0_IRQHandler ; 17: Timer0
<> 144:ef7eb2e8f9f7 80 DCD TIMER1_IRQHandler ; 18: Timer1
<> 144:ef7eb2e8f9f7 81 DCD TIMER2_IRQHandler ; 19: Timer2
<> 144:ef7eb2e8f9f7 82 DCD TIMER3_IRQHandler ; 20: Timer3
<> 144:ef7eb2e8f9f7 83 DCD UART0_IRQHandler ; 21: UART0
<> 144:ef7eb2e8f9f7 84 DCD UART1_IRQHandler ; 22: UART1
<> 144:ef7eb2e8f9f7 85 DCD UART2_IRQHandler ; 23: UART2
<> 144:ef7eb2e8f9f7 86 DCD UART3_IRQHandler ; 24: UART3
<> 144:ef7eb2e8f9f7 87 DCD PWM1_IRQHandler ; 25: PWM1
<> 144:ef7eb2e8f9f7 88 DCD I2C0_IRQHandler ; 26: I2C0
<> 144:ef7eb2e8f9f7 89 DCD I2C1_IRQHandler ; 27: I2C1
<> 144:ef7eb2e8f9f7 90 DCD I2C2_IRQHandler ; 28: I2C2
<> 144:ef7eb2e8f9f7 91 DCD SPI_IRQHandler ; 29: SPI
<> 144:ef7eb2e8f9f7 92 DCD SSP0_IRQHandler ; 30: SSP0
<> 144:ef7eb2e8f9f7 93 DCD SSP1_IRQHandler ; 31: SSP1
<> 144:ef7eb2e8f9f7 94 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
<> 144:ef7eb2e8f9f7 95 DCD RTC_IRQHandler ; 33: Real Time Clock
<> 144:ef7eb2e8f9f7 96 DCD EINT0_IRQHandler ; 34: External Interrupt 0
<> 144:ef7eb2e8f9f7 97 DCD EINT1_IRQHandler ; 35: External Interrupt 1
<> 144:ef7eb2e8f9f7 98 DCD EINT2_IRQHandler ; 36: External Interrupt 2
<> 144:ef7eb2e8f9f7 99 DCD EINT3_IRQHandler ; 37: External Interrupt 3
<> 144:ef7eb2e8f9f7 100 DCD ADC_IRQHandler ; 38: A/D Converter
<> 144:ef7eb2e8f9f7 101 DCD BOD_IRQHandler ; 39: Brown-Out Detect
<> 144:ef7eb2e8f9f7 102 DCD USB_IRQHandler ; 40: USB
<> 144:ef7eb2e8f9f7 103 DCD CAN_IRQHandler ; 41: CAN
<> 144:ef7eb2e8f9f7 104 DCD DMA_IRQHandler ; 42: General Purpose DMA
<> 144:ef7eb2e8f9f7 105 DCD I2S_IRQHandler ; 43: I2S
<> 144:ef7eb2e8f9f7 106 DCD ENET_IRQHandler ; 44: Ethernet
<> 144:ef7eb2e8f9f7 107 DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
<> 144:ef7eb2e8f9f7 108 DCD MCPWM_IRQHandler ; 46: Motor Control PWM
<> 144:ef7eb2e8f9f7 109 DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
<> 144:ef7eb2e8f9f7 110 DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
<> 144:ef7eb2e8f9f7 111 DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt
<> 144:ef7eb2e8f9f7 112 DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt
<> 144:ef7eb2e8f9f7 113 __Vectors_End
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 __Vectors EQU __vector_table
<> 144:ef7eb2e8f9f7 116 __Vectors_Size EQU __Vectors_End - __Vectors
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 144:ef7eb2e8f9f7 120 ;;
<> 144:ef7eb2e8f9f7 121 ;; Default interrupt handlers.
<> 144:ef7eb2e8f9f7 122 ;;
<> 144:ef7eb2e8f9f7 123 THUMB
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 PUBWEAK Reset_Handler
<> 144:ef7eb2e8f9f7 126 SECTION .text:CODE:REORDER(2)
<> 144:ef7eb2e8f9f7 127 Reset_Handler
<> 144:ef7eb2e8f9f7 128 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 129 BLX R0
<> 144:ef7eb2e8f9f7 130 LDR R0, =__iar_program_start
<> 144:ef7eb2e8f9f7 131 BX R0
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 PUBWEAK NMI_Handler
<> 144:ef7eb2e8f9f7 134 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 135 NMI_Handler
<> 144:ef7eb2e8f9f7 136 B NMI_Handler
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 PUBWEAK HardFault_Handler
<> 144:ef7eb2e8f9f7 139 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 140 HardFault_Handler
<> 144:ef7eb2e8f9f7 141 B HardFault_Handler
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 PUBWEAK MemManage_Handler
<> 144:ef7eb2e8f9f7 144 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 145 MemManage_Handler
<> 144:ef7eb2e8f9f7 146 B MemManage_Handler
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 PUBWEAK BusFault_Handler
<> 144:ef7eb2e8f9f7 149 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 150 BusFault_Handler
<> 144:ef7eb2e8f9f7 151 B BusFault_Handler
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 PUBWEAK UsageFault_Handler
<> 144:ef7eb2e8f9f7 154 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 155 UsageFault_Handler
<> 144:ef7eb2e8f9f7 156 B UsageFault_Handler
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 PUBWEAK SVC_Handler
<> 144:ef7eb2e8f9f7 159 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 160 SVC_Handler
<> 144:ef7eb2e8f9f7 161 B SVC_Handler
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 PUBWEAK DebugMon_Handler
<> 144:ef7eb2e8f9f7 164 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 165 DebugMon_Handler
<> 144:ef7eb2e8f9f7 166 B DebugMon_Handler
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 PUBWEAK PendSV_Handler
<> 144:ef7eb2e8f9f7 169 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 170 PendSV_Handler
<> 144:ef7eb2e8f9f7 171 B PendSV_Handler
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 PUBWEAK SysTick_Handler
<> 144:ef7eb2e8f9f7 174 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 175 SysTick_Handler
<> 144:ef7eb2e8f9f7 176 B SysTick_Handler
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 PUBWEAK WDT_IRQHandler
<> 144:ef7eb2e8f9f7 179 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 180 WDT_IRQHandler
<> 144:ef7eb2e8f9f7 181 B WDT_IRQHandler
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 PUBWEAK TIMER0_IRQHandler
<> 144:ef7eb2e8f9f7 184 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 185 TIMER0_IRQHandler
<> 144:ef7eb2e8f9f7 186 B TIMER0_IRQHandler
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 PUBWEAK TIMER1_IRQHandler
<> 144:ef7eb2e8f9f7 189 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 190 TIMER1_IRQHandler
<> 144:ef7eb2e8f9f7 191 B TIMER1_IRQHandler
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 PUBWEAK TIMER2_IRQHandler
<> 144:ef7eb2e8f9f7 194 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 195 TIMER2_IRQHandler
<> 144:ef7eb2e8f9f7 196 B TIMER2_IRQHandler
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 PUBWEAK TIMER3_IRQHandler
<> 144:ef7eb2e8f9f7 199 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 200 TIMER3_IRQHandler
<> 144:ef7eb2e8f9f7 201 B TIMER3_IRQHandler
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 PUBWEAK UART0_IRQHandler
<> 144:ef7eb2e8f9f7 204 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 205 UART0_IRQHandler
<> 144:ef7eb2e8f9f7 206 B UART0_IRQHandler
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 PUBWEAK UART1_IRQHandler
<> 144:ef7eb2e8f9f7 209 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 210 UART1_IRQHandler
<> 144:ef7eb2e8f9f7 211 B UART1_IRQHandler
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 PUBWEAK UART2_IRQHandler
<> 144:ef7eb2e8f9f7 214 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 215 UART2_IRQHandler
<> 144:ef7eb2e8f9f7 216 B UART2_IRQHandler
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 PUBWEAK UART3_IRQHandler
<> 144:ef7eb2e8f9f7 219 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 220 UART3_IRQHandler
<> 144:ef7eb2e8f9f7 221 B UART3_IRQHandler
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 PUBWEAK PWM1_IRQHandler
<> 144:ef7eb2e8f9f7 224 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 225 PWM1_IRQHandler
<> 144:ef7eb2e8f9f7 226 B PWM1_IRQHandler
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 PUBWEAK I2C0_IRQHandler
<> 144:ef7eb2e8f9f7 229 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 230 I2C0_IRQHandler
<> 144:ef7eb2e8f9f7 231 B I2C0_IRQHandler
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 PUBWEAK I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 234 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 235 I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 236 B I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 PUBWEAK I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 239 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 240 I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 241 B I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 PUBWEAK SPI_IRQHandler
<> 144:ef7eb2e8f9f7 244 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 245 SPI_IRQHandler
<> 144:ef7eb2e8f9f7 246 B SPI_IRQHandler
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 PUBWEAK SSP0_IRQHandler
<> 144:ef7eb2e8f9f7 249 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 250 SSP0_IRQHandler
<> 144:ef7eb2e8f9f7 251 B SSP0_IRQHandler
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 PUBWEAK SSP1_IRQHandler
<> 144:ef7eb2e8f9f7 254 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 255 SSP1_IRQHandler
<> 144:ef7eb2e8f9f7 256 B SSP1_IRQHandler
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 PUBWEAK PLL0_IRQHandler
<> 144:ef7eb2e8f9f7 259 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 260 PLL0_IRQHandler
<> 144:ef7eb2e8f9f7 261 B PLL0_IRQHandler
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 PUBWEAK RTC_IRQHandler
<> 144:ef7eb2e8f9f7 264 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 265 RTC_IRQHandler
<> 144:ef7eb2e8f9f7 266 B RTC_IRQHandler
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 PUBWEAK EINT0_IRQHandler
<> 144:ef7eb2e8f9f7 269 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 270 EINT0_IRQHandler
<> 144:ef7eb2e8f9f7 271 B EINT0_IRQHandler
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 PUBWEAK EINT1_IRQHandler
<> 144:ef7eb2e8f9f7 274 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 275 EINT1_IRQHandler
<> 144:ef7eb2e8f9f7 276 B EINT1_IRQHandler
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 PUBWEAK EINT2_IRQHandler
<> 144:ef7eb2e8f9f7 279 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 280 EINT2_IRQHandler
<> 144:ef7eb2e8f9f7 281 B EINT2_IRQHandler
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 PUBWEAK EINT3_IRQHandler
<> 144:ef7eb2e8f9f7 284 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 285 EINT3_IRQHandler
<> 144:ef7eb2e8f9f7 286 B EINT3_IRQHandler
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 PUBWEAK ADC_IRQHandler
<> 144:ef7eb2e8f9f7 289 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 290 ADC_IRQHandler
<> 144:ef7eb2e8f9f7 291 B ADC_IRQHandler
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 PUBWEAK BOD_IRQHandler
<> 144:ef7eb2e8f9f7 294 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 295 BOD_IRQHandler
<> 144:ef7eb2e8f9f7 296 B BOD_IRQHandler
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 PUBWEAK USB_IRQHandler
<> 144:ef7eb2e8f9f7 299 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 300 USB_IRQHandler
<> 144:ef7eb2e8f9f7 301 B USB_IRQHandler
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 PUBWEAK CAN_IRQHandler
<> 144:ef7eb2e8f9f7 304 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 305 CAN_IRQHandler
<> 144:ef7eb2e8f9f7 306 B CAN_IRQHandler
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 PUBWEAK DMA_IRQHandler
<> 144:ef7eb2e8f9f7 309 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 310 DMA_IRQHandler
<> 144:ef7eb2e8f9f7 311 B DMA_IRQHandler
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 PUBWEAK I2S_IRQHandler
<> 144:ef7eb2e8f9f7 314 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 315 I2S_IRQHandler
<> 144:ef7eb2e8f9f7 316 B I2S_IRQHandler
<> 144:ef7eb2e8f9f7 317
<> 144:ef7eb2e8f9f7 318 PUBWEAK ENET_IRQHandler
<> 144:ef7eb2e8f9f7 319 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 320 ENET_IRQHandler
<> 144:ef7eb2e8f9f7 321 B ENET_IRQHandler
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 PUBWEAK RIT_IRQHandler
<> 144:ef7eb2e8f9f7 324 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 325 RIT_IRQHandler
<> 144:ef7eb2e8f9f7 326 B RIT_IRQHandler
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 PUBWEAK MCPWM_IRQHandler
<> 144:ef7eb2e8f9f7 329 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 330 MCPWM_IRQHandler
<> 144:ef7eb2e8f9f7 331 B MCPWM_IRQHandler
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 PUBWEAK QEI_IRQHandler
<> 144:ef7eb2e8f9f7 334 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 335 QEI_IRQHandler
<> 144:ef7eb2e8f9f7 336 B QEI_IRQHandler
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 PUBWEAK PLL1_IRQHandler
<> 144:ef7eb2e8f9f7 339 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 340 PLL1_IRQHandler
<> 144:ef7eb2e8f9f7 341 B PLL1_IRQHandler
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 PUBWEAK USBActivity_IRQHandler
<> 144:ef7eb2e8f9f7 344 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 345 USBActivity_IRQHandler
<> 144:ef7eb2e8f9f7 346 B USBActivity_IRQHandler
<> 144:ef7eb2e8f9f7 347
<> 144:ef7eb2e8f9f7 348 PUBWEAK CANActivity_IRQHandler
<> 144:ef7eb2e8f9f7 349 SECTION .text:CODE:REORDER(1)
<> 144:ef7eb2e8f9f7 350 CANActivity_IRQHandler
<> 144:ef7eb2e8f9f7 351 B CANActivity_IRQHandler
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 #ifndef SRAM
<> 144:ef7eb2e8f9f7 354 SECTION .crp:CODE:ROOT(2)
<> 144:ef7eb2e8f9f7 355 DATA
<> 144:ef7eb2e8f9f7 356 /* Code Read Protection
<> 144:ef7eb2e8f9f7 357 CRP1 0x12345678 - Write to RAM command can not access RAM below 0x10000200.
<> 144:ef7eb2e8f9f7 358 - Read Memory command: disabled.
<> 144:ef7eb2e8f9f7 359 - Copy RAM to Flash command: cannot write to Sector 0.
<> 144:ef7eb2e8f9f7 360 - "Go" command: disabled.
<> 144:ef7eb2e8f9f7 361 - Erase sector(s) command: can erase any individual sector except
<> 144:ef7eb2e8f9f7 362 sector 0 only, or can erase all sectors at once.
<> 144:ef7eb2e8f9f7 363 - Compare command: disabled
<> 144:ef7eb2e8f9f7 364 CRP2 0x87654321 - Write to RAM command: disabled.
<> 144:ef7eb2e8f9f7 365 - Copy RAM to Flash: disabled.
<> 144:ef7eb2e8f9f7 366 - Erase command: only allows erase of all sectors.
<> 144:ef7eb2e8f9f7 367 CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
<> 144:ef7eb2e8f9f7 368 by pulling PIO0_1 LOW is disabled if a valid user code is
<> 144:ef7eb2e8f9f7 369 present in flash sector 0.
<> 144:ef7eb2e8f9f7 370 Caution: If CRP3 is selected, no future factory testing can be
<> 144:ef7eb2e8f9f7 371 performed on the device.
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373 DCD 0xFFFFFFFF
<> 144:ef7eb2e8f9f7 374 #endif
<> 144:ef7eb2e8f9f7 375 END