mbed library sources. Supersedes mbed-src.
Fork of mbed by
targets/hal/TARGET_NXP/TARGET_LPC82X/analogin_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 0:9b334a45a8ff | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 0:9b334a45a8ff | 6 | * You may obtain a copy of the License at |
bogdanm | 0:9b334a45a8ff | 7 | * |
bogdanm | 0:9b334a45a8ff | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 0:9b334a45a8ff | 9 | * |
bogdanm | 0:9b334a45a8ff | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 0:9b334a45a8ff | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 0:9b334a45a8ff | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 0:9b334a45a8ff | 13 | * See the License for the specific language governing permissions and |
bogdanm | 0:9b334a45a8ff | 14 | * limitations under the License. |
bogdanm | 0:9b334a45a8ff | 15 | */ |
bogdanm | 0:9b334a45a8ff | 16 | #include "mbed_assert.h" |
bogdanm | 0:9b334a45a8ff | 17 | #include "analogin_api.h" |
bogdanm | 0:9b334a45a8ff | 18 | #include "cmsis.h" |
bogdanm | 0:9b334a45a8ff | 19 | #include "pinmap.h" |
bogdanm | 0:9b334a45a8ff | 20 | #include "PeripheralNames.h" |
bogdanm | 0:9b334a45a8ff | 21 | |
bogdanm | 0:9b334a45a8ff | 22 | #if DEVICE_ANALOGIN |
bogdanm | 0:9b334a45a8ff | 23 | |
bogdanm | 0:9b334a45a8ff | 24 | #define ANALOGIN_MEDIAN_FILTER 1 |
bogdanm | 0:9b334a45a8ff | 25 | |
bogdanm | 0:9b334a45a8ff | 26 | #define ADC_RANGE 0xFFF |
bogdanm | 0:9b334a45a8ff | 27 | |
bogdanm | 0:9b334a45a8ff | 28 | static const PinMap PinMap_ADC[] = { |
bogdanm | 0:9b334a45a8ff | 29 | {P0_7 , ADC_0, 0}, |
bogdanm | 0:9b334a45a8ff | 30 | {P0_6 , ADC_1, 0}, |
bogdanm | 0:9b334a45a8ff | 31 | {P0_14, ADC_2, 0}, |
bogdanm | 0:9b334a45a8ff | 32 | {P0_23, ADC_3, 0}, |
bogdanm | 0:9b334a45a8ff | 33 | {P0_22, ADC_4, 0}, |
bogdanm | 0:9b334a45a8ff | 34 | {P0_21, ADC_5, 0}, |
bogdanm | 0:9b334a45a8ff | 35 | {P0_20, ADC_6, 0}, |
bogdanm | 0:9b334a45a8ff | 36 | {P0_19, ADC_7, 0}, |
bogdanm | 0:9b334a45a8ff | 37 | {P0_18, ADC_8, 0}, |
bogdanm | 0:9b334a45a8ff | 38 | {P0_17, ADC_9, 0}, |
bogdanm | 0:9b334a45a8ff | 39 | {P0_13, ADC_10,0}, |
bogdanm | 0:9b334a45a8ff | 40 | {P0_4 , ADC_11,0}, |
bogdanm | 0:9b334a45a8ff | 41 | }; |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | void analogin_init(analogin_t *obj, PinName pin) |
bogdanm | 0:9b334a45a8ff | 44 | { |
bogdanm | 0:9b334a45a8ff | 45 | obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); |
bogdanm | 0:9b334a45a8ff | 46 | MBED_ASSERT(obj->adc != (ADCName)NC); |
bogdanm | 0:9b334a45a8ff | 47 | |
bogdanm | 0:9b334a45a8ff | 48 | LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 6); |
bogdanm | 0:9b334a45a8ff | 49 | // pin enable |
bogdanm | 0:9b334a45a8ff | 50 | LPC_SWM->PINENABLE0 &= ~(1UL << (13 + obj->adc)); |
bogdanm | 0:9b334a45a8ff | 51 | // configure GPIO as input |
bogdanm | 0:9b334a45a8ff | 52 | LPC_GPIO_PORT->DIR0 &= ~(1UL << (pin >> PIN_SHIFT)); |
bogdanm | 0:9b334a45a8ff | 53 | |
bogdanm | 0:9b334a45a8ff | 54 | LPC_SYSCON->PDRUNCFG &= ~(1 << 4); |
bogdanm | 0:9b334a45a8ff | 55 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 24); |
bogdanm | 0:9b334a45a8ff | 56 | |
bogdanm | 0:9b334a45a8ff | 57 | __IO LPC_ADC_Type *adc_reg = LPC_ADC; |
bogdanm | 0:9b334a45a8ff | 58 | |
bogdanm | 0:9b334a45a8ff | 59 | // determine the system clock divider for a 500kHz ADC clock during calibration |
bogdanm | 0:9b334a45a8ff | 60 | uint32_t clkdiv = (SystemCoreClock / 500000) - 1; |
bogdanm | 0:9b334a45a8ff | 61 | |
bogdanm | 0:9b334a45a8ff | 62 | // perform a self-calibration |
bogdanm | 0:9b334a45a8ff | 63 | adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF); |
bogdanm | 0:9b334a45a8ff | 64 | while ((adc_reg->CTRL & (1UL << 30)) != 0); |
bogdanm | 0:9b334a45a8ff | 65 | } |
bogdanm | 0:9b334a45a8ff | 66 | |
bogdanm | 0:9b334a45a8ff | 67 | static inline uint32_t adc_read(analogin_t *obj) |
bogdanm | 0:9b334a45a8ff | 68 | { |
bogdanm | 0:9b334a45a8ff | 69 | uint32_t channels; |
bogdanm | 0:9b334a45a8ff | 70 | __IO LPC_ADC_Type *adc_reg = LPC_ADC; |
bogdanm | 0:9b334a45a8ff | 71 | |
bogdanm | 0:9b334a45a8ff | 72 | channels = (obj->adc & 0x1F); |
bogdanm | 0:9b334a45a8ff | 73 | |
bogdanm | 0:9b334a45a8ff | 74 | // select channel |
bogdanm | 0:9b334a45a8ff | 75 | adc_reg->SEQA_CTRL &= ~(0xFFF); |
bogdanm | 0:9b334a45a8ff | 76 | adc_reg->SEQA_CTRL |= (1UL << channels); |
bogdanm | 0:9b334a45a8ff | 77 | |
bogdanm | 0:9b334a45a8ff | 78 | // start conversion and sequence enable |
bogdanm | 0:9b334a45a8ff | 79 | adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31)); |
bogdanm | 0:9b334a45a8ff | 80 | |
bogdanm | 0:9b334a45a8ff | 81 | // Repeatedly get the sample data until DONE bit |
bogdanm | 0:9b334a45a8ff | 82 | volatile uint32_t data; |
bogdanm | 0:9b334a45a8ff | 83 | do { |
bogdanm | 0:9b334a45a8ff | 84 | data = adc_reg->SEQA_GDAT; |
bogdanm | 0:9b334a45a8ff | 85 | } while ((data & (1UL << 31)) == 0); |
bogdanm | 0:9b334a45a8ff | 86 | |
bogdanm | 0:9b334a45a8ff | 87 | // Stop conversion |
bogdanm | 0:9b334a45a8ff | 88 | adc_reg->SEQA_CTRL &= ~(1UL << 31); |
bogdanm | 0:9b334a45a8ff | 89 | |
bogdanm | 0:9b334a45a8ff | 90 | return ((data >> 4) & ADC_RANGE); |
bogdanm | 0:9b334a45a8ff | 91 | } |
bogdanm | 0:9b334a45a8ff | 92 | |
bogdanm | 0:9b334a45a8ff | 93 | static inline void order(uint32_t *a, uint32_t *b) |
bogdanm | 0:9b334a45a8ff | 94 | { |
bogdanm | 0:9b334a45a8ff | 95 | if (*a > *b) { |
bogdanm | 0:9b334a45a8ff | 96 | uint32_t t = *a; |
bogdanm | 0:9b334a45a8ff | 97 | *a = *b; |
bogdanm | 0:9b334a45a8ff | 98 | *b = t; |
bogdanm | 0:9b334a45a8ff | 99 | } |
bogdanm | 0:9b334a45a8ff | 100 | } |
bogdanm | 0:9b334a45a8ff | 101 | |
bogdanm | 0:9b334a45a8ff | 102 | static inline uint32_t adc_read_u32(analogin_t *obj) |
bogdanm | 0:9b334a45a8ff | 103 | { |
bogdanm | 0:9b334a45a8ff | 104 | uint32_t value; |
bogdanm | 0:9b334a45a8ff | 105 | #if ANALOGIN_MEDIAN_FILTER |
bogdanm | 0:9b334a45a8ff | 106 | uint32_t v1 = adc_read(obj); |
bogdanm | 0:9b334a45a8ff | 107 | uint32_t v2 = adc_read(obj); |
bogdanm | 0:9b334a45a8ff | 108 | uint32_t v3 = adc_read(obj); |
bogdanm | 0:9b334a45a8ff | 109 | order(&v1, &v2); |
bogdanm | 0:9b334a45a8ff | 110 | order(&v2, &v3); |
bogdanm | 0:9b334a45a8ff | 111 | order(&v1, &v2); |
bogdanm | 0:9b334a45a8ff | 112 | value = v2; |
bogdanm | 0:9b334a45a8ff | 113 | #else |
bogdanm | 0:9b334a45a8ff | 114 | value = adc_read(obj); |
bogdanm | 0:9b334a45a8ff | 115 | #endif |
bogdanm | 0:9b334a45a8ff | 116 | return value; |
bogdanm | 0:9b334a45a8ff | 117 | } |
bogdanm | 0:9b334a45a8ff | 118 | |
bogdanm | 0:9b334a45a8ff | 119 | uint16_t analogin_read_u16(analogin_t *obj) |
bogdanm | 0:9b334a45a8ff | 120 | { |
bogdanm | 0:9b334a45a8ff | 121 | uint32_t value = adc_read_u32(obj); |
bogdanm | 0:9b334a45a8ff | 122 | return (value << 4) | ((value >> 8) & 0x000F); // 12 bit |
bogdanm | 0:9b334a45a8ff | 123 | } |
bogdanm | 0:9b334a45a8ff | 124 | |
bogdanm | 0:9b334a45a8ff | 125 | float analogin_read(analogin_t *obj) |
bogdanm | 0:9b334a45a8ff | 126 | { |
bogdanm | 0:9b334a45a8ff | 127 | uint32_t value = adc_read_u32(obj); |
bogdanm | 0:9b334a45a8ff | 128 | return (float)value * (1.0f / (float)ADC_RANGE); |
bogdanm | 0:9b334a45a8ff | 129 | } |
bogdanm | 0:9b334a45a8ff | 130 | |
bogdanm | 0:9b334a45a8ff | 131 | #endif |