teralytic / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

targets/cmsis/TARGET_NXP/TARGET_LPC81X/TOOLCHAIN_GCC_ARM/startup_LPC81X.S@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* File: startup_ARMCM0.S
bogdanm 0:9b334a45a8ff 2 * Purpose: startup file for Cortex-M0 devices. Should use with
bogdanm 0:9b334a45a8ff 3 * GCC for ARM Embedded Processors
bogdanm 0:9b334a45a8ff 4 * Version: V1.2
bogdanm 0:9b334a45a8ff 5 * Date: 15 Nov 2011
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * Copyright (c) 2011, ARM Limited
bogdanm 0:9b334a45a8ff 8 * All rights reserved.
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 11 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 12 * Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 13 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 14 * Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 15 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 16 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 17 * Neither the name of the ARM Limited nor the
bogdanm 0:9b334a45a8ff 18 names of its contributors may be used to endorse or promote products
bogdanm 0:9b334a45a8ff 19 derived from this software without specific prior written permission.
bogdanm 0:9b334a45a8ff 20 *
bogdanm 0:9b334a45a8ff 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
bogdanm 0:9b334a45a8ff 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
bogdanm 0:9b334a45a8ff 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 24 * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
bogdanm 0:9b334a45a8ff 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
bogdanm 0:9b334a45a8ff 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
bogdanm 0:9b334a45a8ff 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
bogdanm 0:9b334a45a8ff 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
bogdanm 0:9b334a45a8ff 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
bogdanm 0:9b334a45a8ff 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 31 */
bogdanm 0:9b334a45a8ff 32 .syntax unified
bogdanm 0:9b334a45a8ff 33 .arch armv6-m
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 /* Memory Model
bogdanm 0:9b334a45a8ff 36 The HEAP starts at the end of the DATA section and grows upward.
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 The STACK starts at the end of the RAM and grows downward.
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 The HEAP and stack STACK are only checked at compile time:
bogdanm 0:9b334a45a8ff 41 (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 This is just a check for the bare minimum for the Heap+Stack area before
bogdanm 0:9b334a45a8ff 44 aborting compilation, it is not the run time limit:
bogdanm 0:9b334a45a8ff 45 Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
bogdanm 0:9b334a45a8ff 46 */
bogdanm 0:9b334a45a8ff 47 .section .stack
bogdanm 0:9b334a45a8ff 48 .align 3
bogdanm 0:9b334a45a8ff 49 #ifdef __STACK_SIZE
bogdanm 0:9b334a45a8ff 50 .equ Stack_Size, __STACK_SIZE
bogdanm 0:9b334a45a8ff 51 #else
bogdanm 0:9b334a45a8ff 52 .equ Stack_Size, 0x80
bogdanm 0:9b334a45a8ff 53 #endif
bogdanm 0:9b334a45a8ff 54 .globl __StackTop
bogdanm 0:9b334a45a8ff 55 .globl __StackLimit
bogdanm 0:9b334a45a8ff 56 __StackLimit:
bogdanm 0:9b334a45a8ff 57 .space Stack_Size
bogdanm 0:9b334a45a8ff 58 .size __StackLimit, . - __StackLimit
bogdanm 0:9b334a45a8ff 59 __StackTop:
bogdanm 0:9b334a45a8ff 60 .size __StackTop, . - __StackTop
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 .section .heap
bogdanm 0:9b334a45a8ff 63 .align 3
bogdanm 0:9b334a45a8ff 64 #ifdef __HEAP_SIZE
bogdanm 0:9b334a45a8ff 65 .equ Heap_Size, __HEAP_SIZE
bogdanm 0:9b334a45a8ff 66 #else
bogdanm 0:9b334a45a8ff 67 .equ Heap_Size, 0x80
bogdanm 0:9b334a45a8ff 68 #endif
bogdanm 0:9b334a45a8ff 69 .globl __HeapBase
bogdanm 0:9b334a45a8ff 70 .globl __HeapLimit
bogdanm 0:9b334a45a8ff 71 __HeapBase:
bogdanm 0:9b334a45a8ff 72 .space Heap_Size
bogdanm 0:9b334a45a8ff 73 .size __HeapBase, . - __HeapBase
bogdanm 0:9b334a45a8ff 74 __HeapLimit:
bogdanm 0:9b334a45a8ff 75 .size __HeapLimit, . - __HeapLimit
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 .section .isr_vector
bogdanm 0:9b334a45a8ff 78 .align 2
bogdanm 0:9b334a45a8ff 79 .globl __isr_vector
bogdanm 0:9b334a45a8ff 80 __isr_vector:
bogdanm 0:9b334a45a8ff 81 .long __StackTop /* Top of Stack */
bogdanm 0:9b334a45a8ff 82 .long Reset_Handler /* Reset Handler */
bogdanm 0:9b334a45a8ff 83 .long NMI_Handler /* NMI Handler */
bogdanm 0:9b334a45a8ff 84 .long HardFault_Handler /* Hard Fault Handler */
bogdanm 0:9b334a45a8ff 85 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 86 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 87 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 88 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 89 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 90 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 91 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 92 .long SVC_Handler /* SVCall Handler */
bogdanm 0:9b334a45a8ff 93 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 94 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 95 .long PendSV_Handler /* PendSV Handler */
bogdanm 0:9b334a45a8ff 96 .long SysTick_Handler /* SysTick Handler */
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 /* LPC810 interrupts */
bogdanm 0:9b334a45a8ff 99 .long SPI0_IRQHandler // SPI0 controller
bogdanm 0:9b334a45a8ff 100 .long SPI1_IRQHandler // SPI1 controller
bogdanm 0:9b334a45a8ff 101 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 102 .long UART0_IRQHandler // UART0
bogdanm 0:9b334a45a8ff 103 .long UART1_IRQHandler // UART1
bogdanm 0:9b334a45a8ff 104 .long UART2_IRQHandler // UART2
bogdanm 0:9b334a45a8ff 105 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 106 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 107 .long I2C_IRQHandler // I2C controller
bogdanm 0:9b334a45a8ff 108 .long SCT_IRQHandler // Smart Counter Timer
bogdanm 0:9b334a45a8ff 109 .long MRT_IRQHandler // Multi-Rate Timer
bogdanm 0:9b334a45a8ff 110 .long CMP_IRQHandler // Comparator
bogdanm 0:9b334a45a8ff 111 .long WDT_IRQHandler // PIO1 (0:11)
bogdanm 0:9b334a45a8ff 112 .long BOD_IRQHandler // Brown Out Detect
bogdanm 0:9b334a45a8ff 113 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 114 .long WKT_IRQHandler // Wakeup timer
bogdanm 0:9b334a45a8ff 115 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 116 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 117 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 118 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 119 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 120 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 121 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 122 .long 0 // Reserved
bogdanm 0:9b334a45a8ff 123 .long PININT0_IRQHandler // PIO INT0
bogdanm 0:9b334a45a8ff 124 .long PININT1_IRQHandler // PIO INT1
bogdanm 0:9b334a45a8ff 125 .long PININT2_IRQHandler // PIO INT2
bogdanm 0:9b334a45a8ff 126 .long PININT3_IRQHandler // PIO INT3
bogdanm 0:9b334a45a8ff 127 .long PININT4_IRQHandler // PIO INT4
bogdanm 0:9b334a45a8ff 128 .long PININT5_IRQHandler // PIO INT5
bogdanm 0:9b334a45a8ff 129 .long PININT6_IRQHandler // PIO INT6
bogdanm 0:9b334a45a8ff 130 .long PININT7_IRQHandler // PIO INT7
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 .size __isr_vector, . - __isr_vector
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 .section .text.Reset_Handler
bogdanm 0:9b334a45a8ff 135 .thumb
bogdanm 0:9b334a45a8ff 136 .thumb_func
bogdanm 0:9b334a45a8ff 137 .align 2
bogdanm 0:9b334a45a8ff 138 .globl Reset_Handler
bogdanm 0:9b334a45a8ff 139 .type Reset_Handler, %function
bogdanm 0:9b334a45a8ff 140 Reset_Handler:
bogdanm 0:9b334a45a8ff 141 /* Loop to copy data from read only memory to RAM. The ranges
bogdanm 0:9b334a45a8ff 142 * of copy from/to are specified by following symbols evaluated in
bogdanm 0:9b334a45a8ff 143 * linker script.
bogdanm 0:9b334a45a8ff 144 * __etext: End of code section, i.e., begin of data sections to copy from.
bogdanm 0:9b334a45a8ff 145 * __data_start__/__data_end__: RAM address range that data should be
bogdanm 0:9b334a45a8ff 146 * copied to. Both must be aligned to 4 bytes boundary. */
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 ldr r1, =__etext
bogdanm 0:9b334a45a8ff 149 ldr r2, =__data_start__
bogdanm 0:9b334a45a8ff 150 ldr r3, =__data_end__
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 subs r3, r2
bogdanm 0:9b334a45a8ff 153 ble .Lflash_to_ram_loop_end
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 movs r4, 0
bogdanm 0:9b334a45a8ff 156 .Lflash_to_ram_loop:
bogdanm 0:9b334a45a8ff 157 ldr r0, [r1,r4]
bogdanm 0:9b334a45a8ff 158 str r0, [r2,r4]
bogdanm 0:9b334a45a8ff 159 adds r4, 4
bogdanm 0:9b334a45a8ff 160 cmp r4, r3
bogdanm 0:9b334a45a8ff 161 blt .Lflash_to_ram_loop
bogdanm 0:9b334a45a8ff 162 .Lflash_to_ram_loop_end:
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 ldr r0, =SystemInit
bogdanm 0:9b334a45a8ff 165 blx r0
bogdanm 0:9b334a45a8ff 166 ldr r0, =_start
bogdanm 0:9b334a45a8ff 167 bx r0
bogdanm 0:9b334a45a8ff 168 .pool
bogdanm 0:9b334a45a8ff 169 .size Reset_Handler, . - Reset_Handler
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 .text
bogdanm 0:9b334a45a8ff 172 /* Macro to define default handlers. Default handler
bogdanm 0:9b334a45a8ff 173 * will be weak symbol and just dead loops. They can be
bogdanm 0:9b334a45a8ff 174 * overwritten by other handlers */
bogdanm 0:9b334a45a8ff 175 .macro def_default_handler handler_name
bogdanm 0:9b334a45a8ff 176 .align 1
bogdanm 0:9b334a45a8ff 177 .thumb_func
bogdanm 0:9b334a45a8ff 178 .weak \handler_name
bogdanm 0:9b334a45a8ff 179 .type \handler_name, %function
bogdanm 0:9b334a45a8ff 180 \handler_name :
bogdanm 0:9b334a45a8ff 181 b .
bogdanm 0:9b334a45a8ff 182 .size \handler_name, . - \handler_name
bogdanm 0:9b334a45a8ff 183 .endm
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 def_default_handler NMI_Handler
bogdanm 0:9b334a45a8ff 186 def_default_handler HardFault_Handler
bogdanm 0:9b334a45a8ff 187 def_default_handler SVC_Handler
bogdanm 0:9b334a45a8ff 188 def_default_handler PendSV_Handler
bogdanm 0:9b334a45a8ff 189 def_default_handler SysTick_Handler
bogdanm 0:9b334a45a8ff 190 def_default_handler Default_Handler
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 .macro def_irq_default_handler handler_name
bogdanm 0:9b334a45a8ff 193 .weak \handler_name
bogdanm 0:9b334a45a8ff 194 .set \handler_name, Default_Handler
bogdanm 0:9b334a45a8ff 195 .endm
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 def_irq_default_handler SPI0_IRQHandler
bogdanm 0:9b334a45a8ff 198 def_irq_default_handler SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 199 def_irq_default_handler UART0_IRQHandler
bogdanm 0:9b334a45a8ff 200 def_irq_default_handler UART1_IRQHandler
bogdanm 0:9b334a45a8ff 201 def_irq_default_handler UART2_IRQHandler
bogdanm 0:9b334a45a8ff 202 def_irq_default_handler I2C_IRQHandler
bogdanm 0:9b334a45a8ff 203 def_irq_default_handler SCT_IRQHandler
bogdanm 0:9b334a45a8ff 204 def_irq_default_handler MRT_IRQHandler
bogdanm 0:9b334a45a8ff 205 def_irq_default_handler CMP_IRQHandler
bogdanm 0:9b334a45a8ff 206 def_irq_default_handler WDT_IRQHandler
bogdanm 0:9b334a45a8ff 207 def_irq_default_handler BOD_IRQHandler
bogdanm 0:9b334a45a8ff 208 def_irq_default_handler WKT_IRQHandler
bogdanm 0:9b334a45a8ff 209 def_irq_default_handler PININT0_IRQHandler
bogdanm 0:9b334a45a8ff 210 def_irq_default_handler PININT1_IRQHandler
bogdanm 0:9b334a45a8ff 211 def_irq_default_handler PININT2_IRQHandler
bogdanm 0:9b334a45a8ff 212 def_irq_default_handler PININT3_IRQHandler
bogdanm 0:9b334a45a8ff 213 def_irq_default_handler PININT4_IRQHandler
bogdanm 0:9b334a45a8ff 214 def_irq_default_handler PININT5_IRQHandler
bogdanm 0:9b334a45a8ff 215 def_irq_default_handler PININT6_IRQHandler
bogdanm 0:9b334a45a8ff 216 def_irq_default_handler PININT7_IRQHandler
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 .end
bogdanm 0:9b334a45a8ff 219