mbed library sources. Supersedes mbed-src.
Fork of mbed by
targets/cmsis/TARGET_Maxim/TARGET_MAX32610/uart_regs.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
bogdanm | 0:9b334a45a8ff | 5 | * copy of this software and associated documentation files (the "Software"), |
bogdanm | 0:9b334a45a8ff | 6 | * to deal in the Software without restriction, including without limitation |
bogdanm | 0:9b334a45a8ff | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
bogdanm | 0:9b334a45a8ff | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
bogdanm | 0:9b334a45a8ff | 9 | * Software is furnished to do so, subject to the following conditions: |
bogdanm | 0:9b334a45a8ff | 10 | * |
bogdanm | 0:9b334a45a8ff | 11 | * The above copyright notice and this permission notice shall be included |
bogdanm | 0:9b334a45a8ff | 12 | * in all copies or substantial portions of the Software. |
bogdanm | 0:9b334a45a8ff | 13 | * |
bogdanm | 0:9b334a45a8ff | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
bogdanm | 0:9b334a45a8ff | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
bogdanm | 0:9b334a45a8ff | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
bogdanm | 0:9b334a45a8ff | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
bogdanm | 0:9b334a45a8ff | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
bogdanm | 0:9b334a45a8ff | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
bogdanm | 0:9b334a45a8ff | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
bogdanm | 0:9b334a45a8ff | 21 | * |
bogdanm | 0:9b334a45a8ff | 22 | * Except as contained in this notice, the name of Maxim Integrated |
bogdanm | 0:9b334a45a8ff | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
bogdanm | 0:9b334a45a8ff | 24 | * Products, Inc. Branding Policy. |
bogdanm | 0:9b334a45a8ff | 25 | * |
bogdanm | 0:9b334a45a8ff | 26 | * The mere transfer of this software does not imply any licenses |
bogdanm | 0:9b334a45a8ff | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
bogdanm | 0:9b334a45a8ff | 28 | * trademarks, maskwork rights, or any other form of intellectual |
bogdanm | 0:9b334a45a8ff | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
bogdanm | 0:9b334a45a8ff | 30 | * ownership rights. |
bogdanm | 0:9b334a45a8ff | 31 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 32 | */ |
bogdanm | 0:9b334a45a8ff | 33 | |
bogdanm | 0:9b334a45a8ff | 34 | #ifndef _MXC_UART_REGS_H_ |
bogdanm | 0:9b334a45a8ff | 35 | #define _MXC_UART_REGS_H_ |
bogdanm | 0:9b334a45a8ff | 36 | |
bogdanm | 0:9b334a45a8ff | 37 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 38 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 39 | #endif |
bogdanm | 0:9b334a45a8ff | 40 | |
bogdanm | 0:9b334a45a8ff | 41 | #include <stdint.h> |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | /** |
bogdanm | 0:9b334a45a8ff | 44 | * @file uart_regs.h |
bogdanm | 0:9b334a45a8ff | 45 | * @addtogroup uart UART |
bogdanm | 0:9b334a45a8ff | 46 | * @{ |
bogdanm | 0:9b334a45a8ff | 47 | */ |
bogdanm | 0:9b334a45a8ff | 48 | |
bogdanm | 0:9b334a45a8ff | 49 | /* Offset Register Description |
bogdanm | 0:9b334a45a8ff | 50 | ====== ============================================== */ |
bogdanm | 0:9b334a45a8ff | 51 | typedef struct { |
bogdanm | 0:9b334a45a8ff | 52 | __IO uint32_t ctrl; /* 0x0000 UART Control Register */ |
bogdanm | 0:9b334a45a8ff | 53 | __IO uint32_t status; /* 0x0004 UART Status Register */ |
bogdanm | 0:9b334a45a8ff | 54 | __IO uint32_t inten; /* 0x0008 Interrupt Enable/Disable Controls */ |
bogdanm | 0:9b334a45a8ff | 55 | __IO uint32_t intfl; /* 0x000C Interrupt Flags */ |
bogdanm | 0:9b334a45a8ff | 56 | __IO uint32_t baud_int; /* 0x0010 Baud Rate Setting (Integer Portion) */ |
bogdanm | 0:9b334a45a8ff | 57 | __IO uint32_t baud_div_128; /* 0x0014 Baud Rate Setting */ |
bogdanm | 0:9b334a45a8ff | 58 | __IO uint32_t tx_fifo_out; /* 0x0018 TX FIFO Output End (read-only) */ |
bogdanm | 0:9b334a45a8ff | 59 | __IO uint32_t hw_flow_ctrl; /* 0x001C Hardware Flow Control Register */ |
bogdanm | 0:9b334a45a8ff | 60 | __IO uint32_t tx_rx_fifo; /* 0x0020 Write to load TX FIFO, Read to unload RX FIFO */ |
bogdanm | 0:9b334a45a8ff | 61 | } mxc_uart_regs_t; |
bogdanm | 0:9b334a45a8ff | 62 | |
bogdanm | 0:9b334a45a8ff | 63 | |
bogdanm | 0:9b334a45a8ff | 64 | /* |
bogdanm | 0:9b334a45a8ff | 65 | Register offsets for module UART. |
bogdanm | 0:9b334a45a8ff | 66 | */ |
bogdanm | 0:9b334a45a8ff | 67 | #define MXC_R_UART_OFFS_CTRL ((uint32_t)0x00000000UL) |
bogdanm | 0:9b334a45a8ff | 68 | #define MXC_R_UART_OFFS_STATUS ((uint32_t)0x00000004UL) |
bogdanm | 0:9b334a45a8ff | 69 | #define MXC_R_UART_OFFS_INTEN ((uint32_t)0x00000008UL) |
bogdanm | 0:9b334a45a8ff | 70 | #define MXC_R_UART_OFFS_INTFL ((uint32_t)0x0000000CUL) |
bogdanm | 0:9b334a45a8ff | 71 | #define MXC_R_UART_OFFS_BAUD_INT ((uint32_t)0x00000010UL) |
bogdanm | 0:9b334a45a8ff | 72 | #define MXC_R_UART_OFFS_BAUD_DIV_128 ((uint32_t)0x00000014UL) |
bogdanm | 0:9b334a45a8ff | 73 | #define MXC_R_UART_OFFS_TX_FIFO_OUT ((uint32_t)0x00000018UL) |
bogdanm | 0:9b334a45a8ff | 74 | #define MXC_R_UART_OFFS_HW_FLOW_CTRL ((uint32_t)0x0000001CUL) |
bogdanm | 0:9b334a45a8ff | 75 | #define MXC_R_UART_OFFS_TX_RX_FIFO ((uint32_t)0x00000020UL) |
bogdanm | 0:9b334a45a8ff | 76 | |
bogdanm | 0:9b334a45a8ff | 77 | /* |
bogdanm | 0:9b334a45a8ff | 78 | Field positions and masks for module UART. |
bogdanm | 0:9b334a45a8ff | 79 | */ |
bogdanm | 0:9b334a45a8ff | 80 | #define MXC_F_UART_CTRL_RX_THRESHOLD_POS 0 |
bogdanm | 0:9b334a45a8ff | 81 | #define MXC_F_UART_CTRL_RX_THRESHOLD ((uint32_t)(0x00000007UL << MXC_F_UART_CTRL_RX_THRESHOLD_POS)) |
bogdanm | 0:9b334a45a8ff | 82 | #define MXC_F_UART_CTRL_PARITY_ENABLE_POS 4 |
bogdanm | 0:9b334a45a8ff | 83 | #define MXC_F_UART_CTRL_PARITY_ENABLE ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_ENABLE_POS)) |
bogdanm | 0:9b334a45a8ff | 84 | #define MXC_F_UART_CTRL_PARITY_MODE_POS 5 |
bogdanm | 0:9b334a45a8ff | 85 | #define MXC_F_UART_CTRL_PARITY_MODE ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_MODE_POS)) |
bogdanm | 0:9b334a45a8ff | 86 | #define MXC_F_UART_CTRL_PARITY_BIAS_POS 6 |
bogdanm | 0:9b334a45a8ff | 87 | #define MXC_F_UART_CTRL_PARITY_BIAS ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_BIAS_POS)) |
bogdanm | 0:9b334a45a8ff | 88 | #define MXC_F_UART_CTRL_TX_FIFO_FLUSH_POS 8 |
bogdanm | 0:9b334a45a8ff | 89 | #define MXC_F_UART_CTRL_TX_FIFO_FLUSH ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_TX_FIFO_FLUSH_POS)) |
bogdanm | 0:9b334a45a8ff | 90 | #define MXC_F_UART_CTRL_RX_FIFO_FLUSH_POS 9 |
bogdanm | 0:9b334a45a8ff | 91 | #define MXC_F_UART_CTRL_RX_FIFO_FLUSH ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RX_FIFO_FLUSH_POS)) |
bogdanm | 0:9b334a45a8ff | 92 | #define MXC_F_UART_CTRL_CHAR_LENGTH_POS 10 |
bogdanm | 0:9b334a45a8ff | 93 | #define MXC_F_UART_CTRL_CHAR_LENGTH ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_CHAR_LENGTH_POS)) |
bogdanm | 0:9b334a45a8ff | 94 | #define MXC_F_UART_CTRL_STOP_BIT_MODE_POS 12 |
bogdanm | 0:9b334a45a8ff | 95 | #define MXC_F_UART_CTRL_STOP_BIT_MODE ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_STOP_BIT_MODE_POS)) |
bogdanm | 0:9b334a45a8ff | 96 | #define MXC_F_UART_CTRL_HW_FLOW_CTRL_EN_POS 13 |
bogdanm | 0:9b334a45a8ff | 97 | #define MXC_F_UART_CTRL_HW_FLOW_CTRL_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_HW_FLOW_CTRL_EN_POS)) |
bogdanm | 0:9b334a45a8ff | 98 | #define MXC_F_UART_CTRL_BAUD_CLK_EN_POS 14 |
bogdanm | 0:9b334a45a8ff | 99 | #define MXC_F_UART_CTRL_BAUD_CLK_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_BAUD_CLK_EN_POS)) |
bogdanm | 0:9b334a45a8ff | 100 | |
bogdanm | 0:9b334a45a8ff | 101 | #define MXC_F_UART_STATUS_TX_BUSY_POS 0 |
bogdanm | 0:9b334a45a8ff | 102 | #define MXC_F_UART_STATUS_TX_BUSY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_BUSY_POS)) |
bogdanm | 0:9b334a45a8ff | 103 | #define MXC_F_UART_STATUS_RX_BUSY_POS 1 |
bogdanm | 0:9b334a45a8ff | 104 | #define MXC_F_UART_STATUS_RX_BUSY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_BUSY_POS)) |
bogdanm | 0:9b334a45a8ff | 105 | #define MXC_F_UART_STATUS_RX_FIFO_EMPTY_POS 4 |
bogdanm | 0:9b334a45a8ff | 106 | #define MXC_F_UART_STATUS_RX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_FIFO_EMPTY_POS)) |
bogdanm | 0:9b334a45a8ff | 107 | #define MXC_F_UART_STATUS_RX_FIFO_FULL_POS 5 |
bogdanm | 0:9b334a45a8ff | 108 | #define MXC_F_UART_STATUS_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_FIFO_FULL_POS)) |
bogdanm | 0:9b334a45a8ff | 109 | #define MXC_F_UART_STATUS_TX_FIFO_EMPTY_POS 6 |
bogdanm | 0:9b334a45a8ff | 110 | #define MXC_F_UART_STATUS_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_FIFO_EMPTY_POS)) |
bogdanm | 0:9b334a45a8ff | 111 | #define MXC_F_UART_STATUS_TX_FIFO_FULL_POS 7 |
bogdanm | 0:9b334a45a8ff | 112 | #define MXC_F_UART_STATUS_TX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_FIFO_FULL_POS)) |
bogdanm | 0:9b334a45a8ff | 113 | #define MXC_F_UART_STATUS_RX_FIFO_CHARS_POS 8 |
bogdanm | 0:9b334a45a8ff | 114 | #define MXC_F_UART_STATUS_RX_FIFO_CHARS ((uint32_t)(0x0000000FUL << MXC_F_UART_STATUS_RX_FIFO_CHARS_POS)) |
bogdanm | 0:9b334a45a8ff | 115 | #define MXC_F_UART_STATUS_TX_FIFO_CHARS_POS 12 |
bogdanm | 0:9b334a45a8ff | 116 | #define MXC_F_UART_STATUS_TX_FIFO_CHARS ((uint32_t)(0x0000000FUL << MXC_F_UART_STATUS_TX_FIFO_CHARS_POS)) |
bogdanm | 0:9b334a45a8ff | 117 | |
bogdanm | 0:9b334a45a8ff | 118 | #define MXC_F_UART_INTEN_RX_FRAME_ERROR_POS 0 |
bogdanm | 0:9b334a45a8ff | 119 | #define MXC_F_UART_INTEN_RX_FRAME_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FRAME_ERROR_POS)) |
bogdanm | 0:9b334a45a8ff | 120 | #define MXC_F_UART_INTEN_RX_PARITY_ERROR_POS 1 |
bogdanm | 0:9b334a45a8ff | 121 | #define MXC_F_UART_INTEN_RX_PARITY_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_PARITY_ERROR_POS)) |
bogdanm | 0:9b334a45a8ff | 122 | #define MXC_F_UART_INTEN_CTS_CHANGE_POS 2 |
bogdanm | 0:9b334a45a8ff | 123 | #define MXC_F_UART_INTEN_CTS_CHANGE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_CTS_CHANGE_POS)) |
bogdanm | 0:9b334a45a8ff | 124 | #define MXC_F_UART_INTEN_RX_OVERRUN_POS 3 |
bogdanm | 0:9b334a45a8ff | 125 | #define MXC_F_UART_INTEN_RX_OVERRUN ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_OVERRUN_POS)) |
bogdanm | 0:9b334a45a8ff | 126 | #define MXC_F_UART_INTEN_RX_OVER_THRESHOLD_POS 4 |
bogdanm | 0:9b334a45a8ff | 127 | #define MXC_F_UART_INTEN_RX_OVER_THRESHOLD ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_OVER_THRESHOLD_POS)) |
bogdanm | 0:9b334a45a8ff | 128 | #define MXC_F_UART_INTEN_TX_ALMOST_EMPTY_POS 5 |
bogdanm | 0:9b334a45a8ff | 129 | #define MXC_F_UART_INTEN_TX_ALMOST_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_ALMOST_EMPTY_POS)) |
bogdanm | 0:9b334a45a8ff | 130 | #define MXC_F_UART_INTEN_TX_HALF_EMPTY_POS 6 |
bogdanm | 0:9b334a45a8ff | 131 | #define MXC_F_UART_INTEN_TX_HALF_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_HALF_EMPTY_POS)) |
bogdanm | 0:9b334a45a8ff | 132 | |
bogdanm | 0:9b334a45a8ff | 133 | #define MXC_F_UART_INTFL_RX_FRAME_ERROR_POS 0 |
bogdanm | 0:9b334a45a8ff | 134 | #define MXC_F_UART_INTFL_RX_FRAME_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FRAME_ERROR_POS)) |
bogdanm | 0:9b334a45a8ff | 135 | #define MXC_F_UART_INTFL_RX_PARITY_ERROR_POS 1 |
bogdanm | 0:9b334a45a8ff | 136 | #define MXC_F_UART_INTFL_RX_PARITY_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_PARITY_ERROR_POS)) |
bogdanm | 0:9b334a45a8ff | 137 | #define MXC_F_UART_INTFL_CTS_CHANGE_POS 2 |
bogdanm | 0:9b334a45a8ff | 138 | #define MXC_F_UART_INTFL_CTS_CHANGE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_CTS_CHANGE_POS)) |
bogdanm | 0:9b334a45a8ff | 139 | #define MXC_F_UART_INTFL_RX_OVERRUN_POS 3 |
bogdanm | 0:9b334a45a8ff | 140 | #define MXC_F_UART_INTFL_RX_OVERRUN ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_OVERRUN_POS)) |
bogdanm | 0:9b334a45a8ff | 141 | #define MXC_F_UART_INTFL_RX_OVER_THRESHOLD_POS 4 |
bogdanm | 0:9b334a45a8ff | 142 | #define MXC_F_UART_INTFL_RX_OVER_THRESHOLD ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_OVER_THRESHOLD_POS)) |
bogdanm | 0:9b334a45a8ff | 143 | #define MXC_F_UART_INTFL_TX_ALMOST_EMPTY_POS 5 |
bogdanm | 0:9b334a45a8ff | 144 | #define MXC_F_UART_INTFL_TX_ALMOST_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_ALMOST_EMPTY_POS)) |
bogdanm | 0:9b334a45a8ff | 145 | #define MXC_F_UART_INTFL_TX_HALF_EMPTY_POS 6 |
bogdanm | 0:9b334a45a8ff | 146 | #define MXC_F_UART_INTFL_TX_HALF_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_HALF_EMPTY_POS)) |
bogdanm | 0:9b334a45a8ff | 147 | |
bogdanm | 0:9b334a45a8ff | 148 | #define MXC_F_UART_BAUD_INT_FBAUD_POS 0 |
bogdanm | 0:9b334a45a8ff | 149 | #define MXC_F_UART_BAUD_INT_FBAUD ((uint32_t)(0x00000FFFUL << MXC_F_UART_BAUD_INT_FBAUD_POS)) |
bogdanm | 0:9b334a45a8ff | 150 | |
bogdanm | 0:9b334a45a8ff | 151 | #define MXC_F_UART_BAUD_DIV_128_DIV_POS 0 |
bogdanm | 0:9b334a45a8ff | 152 | #define MXC_F_UART_BAUD_DIV_128_DIV ((uint32_t)(0x0000007FUL << MXC_F_UART_BAUD_DIV_128_DIV_POS)) |
bogdanm | 0:9b334a45a8ff | 153 | |
bogdanm | 0:9b334a45a8ff | 154 | #define MXC_F_UART_TX_FIFO_OUT_TX_FIFO_POS 0 |
bogdanm | 0:9b334a45a8ff | 155 | #define MXC_F_UART_TX_FIFO_OUT_TX_FIFO ((uint32_t)(0x000000FFUL << MXC_F_UART_TX_FIFO_OUT_TX_FIFO_POS)) |
bogdanm | 0:9b334a45a8ff | 156 | |
bogdanm | 0:9b334a45a8ff | 157 | #define MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT_POS 0 |
bogdanm | 0:9b334a45a8ff | 158 | #define MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT ((uint32_t)(0x00000001UL << MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT_POS)) |
bogdanm | 0:9b334a45a8ff | 159 | #define MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT_POS 1 |
bogdanm | 0:9b334a45a8ff | 160 | #define MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT ((uint32_t)(0x00000001UL << MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT_POS)) |
bogdanm | 0:9b334a45a8ff | 161 | |
bogdanm | 0:9b334a45a8ff | 162 | #define MXC_F_UART_TX_RX_FIFO_FIFO_DATA_POS 0 |
bogdanm | 0:9b334a45a8ff | 163 | #define MXC_F_UART_TX_RX_FIFO_FIFO_DATA ((uint32_t)(0x000000FFUL << MXC_F_UART_TX_RX_FIFO_FIFO_DATA_POS)) |
bogdanm | 0:9b334a45a8ff | 164 | #define MXC_F_UART_TX_RX_FIFO_PARITY_ERROR_POS 8 |
bogdanm | 0:9b334a45a8ff | 165 | #define MXC_F_UART_TX_RX_FIFO_PARITY_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_TX_RX_FIFO_PARITY_ERROR_POS)) |
bogdanm | 0:9b334a45a8ff | 166 | |
bogdanm | 0:9b334a45a8ff | 167 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 168 | } |
bogdanm | 0:9b334a45a8ff | 169 | #endif |
bogdanm | 0:9b334a45a8ff | 170 | |
bogdanm | 0:9b334a45a8ff | 171 | /** |
bogdanm | 0:9b334a45a8ff | 172 | * @} |
bogdanm | 0:9b334a45a8ff | 173 | */ |
bogdanm | 0:9b334a45a8ff | 174 | |
bogdanm | 0:9b334a45a8ff | 175 | #endif /* _MXC_UART_REGS_H_ */ |