mbed library sources. Supersedes mbed-src.
Fork of mbed by
targets/cmsis/TARGET_Maxim/TARGET_MAX32600/flc_regs.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
bogdanm | 0:9b334a45a8ff | 5 | * copy of this software and associated documentation files (the "Software"), |
bogdanm | 0:9b334a45a8ff | 6 | * to deal in the Software without restriction, including without limitation |
bogdanm | 0:9b334a45a8ff | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
bogdanm | 0:9b334a45a8ff | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
bogdanm | 0:9b334a45a8ff | 9 | * Software is furnished to do so, subject to the following conditions: |
bogdanm | 0:9b334a45a8ff | 10 | * |
bogdanm | 0:9b334a45a8ff | 11 | * The above copyright notice and this permission notice shall be included |
bogdanm | 0:9b334a45a8ff | 12 | * in all copies or substantial portions of the Software. |
bogdanm | 0:9b334a45a8ff | 13 | * |
bogdanm | 0:9b334a45a8ff | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
bogdanm | 0:9b334a45a8ff | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
bogdanm | 0:9b334a45a8ff | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
bogdanm | 0:9b334a45a8ff | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
bogdanm | 0:9b334a45a8ff | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
bogdanm | 0:9b334a45a8ff | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
bogdanm | 0:9b334a45a8ff | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
bogdanm | 0:9b334a45a8ff | 21 | * |
bogdanm | 0:9b334a45a8ff | 22 | * Except as contained in this notice, the name of Maxim Integrated |
bogdanm | 0:9b334a45a8ff | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
bogdanm | 0:9b334a45a8ff | 24 | * Products, Inc. Branding Policy. |
bogdanm | 0:9b334a45a8ff | 25 | * |
bogdanm | 0:9b334a45a8ff | 26 | * The mere transfer of this software does not imply any licenses |
bogdanm | 0:9b334a45a8ff | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
bogdanm | 0:9b334a45a8ff | 28 | * trademarks, maskwork rights, or any other form of intellectual |
bogdanm | 0:9b334a45a8ff | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
bogdanm | 0:9b334a45a8ff | 30 | * ownership rights. |
bogdanm | 0:9b334a45a8ff | 31 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 32 | */ |
bogdanm | 0:9b334a45a8ff | 33 | |
bogdanm | 0:9b334a45a8ff | 34 | #ifndef _MXC_FLC_REGS_H |
bogdanm | 0:9b334a45a8ff | 35 | #define _MXC_FLC_REGS_H |
bogdanm | 0:9b334a45a8ff | 36 | |
bogdanm | 0:9b334a45a8ff | 37 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 38 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 39 | #endif |
bogdanm | 0:9b334a45a8ff | 40 | |
bogdanm | 0:9b334a45a8ff | 41 | #include <stdint.h> |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | /** |
bogdanm | 0:9b334a45a8ff | 44 | * @file flc_regs.h |
bogdanm | 0:9b334a45a8ff | 45 | * @addtogroup flc FLC |
bogdanm | 0:9b334a45a8ff | 46 | * @{ |
bogdanm | 0:9b334a45a8ff | 47 | */ |
bogdanm | 0:9b334a45a8ff | 48 | /* Offset Register Description |
bogdanm | 0:9b334a45a8ff | 49 | ====== ======================================================= */ |
bogdanm | 0:9b334a45a8ff | 50 | typedef struct { |
bogdanm | 0:9b334a45a8ff | 51 | __IO uint32_t faddr; /* 0x0000 Flash Operation Address */ |
bogdanm | 0:9b334a45a8ff | 52 | __IO uint32_t fckdiv; /* 0x0004 Flash Clock Rate Divisor */ |
bogdanm | 0:9b334a45a8ff | 53 | __IO uint32_t ctrl; /* 0x0008 Flash Control Register */ |
bogdanm | 0:9b334a45a8ff | 54 | __I uint32_t rsv000C[6]; /* 0x000C */ |
bogdanm | 0:9b334a45a8ff | 55 | __IO uint32_t intr; /* 0x0024 Flash Controller Interrupt Flags and Enable/Disable 0 */ |
bogdanm | 0:9b334a45a8ff | 56 | __I uint32_t rsv0028[2]; /* 0x0028 */ |
bogdanm | 0:9b334a45a8ff | 57 | __IO uint32_t fdata; /* 0x0030 Flash Operation Data Register */ |
bogdanm | 0:9b334a45a8ff | 58 | __I uint32_t rsv0034[7]; /* 0x0034 */ |
bogdanm | 0:9b334a45a8ff | 59 | __IO uint32_t perform; /* 0x0050 Flash Performance Settings */ |
bogdanm | 0:9b334a45a8ff | 60 | __I uint32_t rsv0054[11]; /* 0x0054 */ |
bogdanm | 0:9b334a45a8ff | 61 | __IO uint32_t status; /* 0x0080 Security Status Flags */ |
bogdanm | 0:9b334a45a8ff | 62 | __I uint32_t rsv0084; /* 0x0084 */ |
bogdanm | 0:9b334a45a8ff | 63 | __IO uint32_t security; /* 0x0088 Flash Controller Security Settings */ |
bogdanm | 0:9b334a45a8ff | 64 | __I uint32_t rsv008C[4]; /* 0x008C */ |
bogdanm | 0:9b334a45a8ff | 65 | __IO uint32_t bypass; /* 0x009C Status Flags for DSB Operations */ |
bogdanm | 0:9b334a45a8ff | 66 | __IO uint32_t user_option; /* 0x0100 Used to set DSB Access code and Auto-Lock in info block */ |
bogdanm | 0:9b334a45a8ff | 67 | __I uint32_t rsv0104[15]; /* 0x0104 */ |
bogdanm | 0:9b334a45a8ff | 68 | __IO uint32_t ctrl2; /* 0x0140 Flash Control Register 2 */ |
bogdanm | 0:9b334a45a8ff | 69 | __IO uint32_t intfl1; /* 0x0144 Interrupt Flags Register 1 */ |
bogdanm | 0:9b334a45a8ff | 70 | __IO uint32_t inten1; /* 0x0148 Interrupt Enable/Disable Register 1 */ |
bogdanm | 0:9b334a45a8ff | 71 | __I uint32_t rsv014C; /* 0x014C */ |
bogdanm | 0:9b334a45a8ff | 72 | __IO uint32_t disable_xr0; /* 0x0150 Disable Flash Page Exec/Read Register 0 */ |
bogdanm | 0:9b334a45a8ff | 73 | __IO uint32_t disable_xr1; /* 0x0154 Disable Flash Page Exec/Read Register 1 */ |
bogdanm | 0:9b334a45a8ff | 74 | __IO uint32_t disable_xr2; /* 0x0158 Disable Flash Page Exec/Read Register 2 */ |
bogdanm | 0:9b334a45a8ff | 75 | __IO uint32_t disable_xr3; /* 0x015C Disable Flash Page Exec/Read Register 3 */ |
bogdanm | 0:9b334a45a8ff | 76 | __IO uint32_t disable_we0; /* 0x0160 Disable Flash Page Write/Erase Register 0 */ |
bogdanm | 0:9b334a45a8ff | 77 | __IO uint32_t disable_we1; /* 0x0164 Disable Flash Page Write/Erase Register 1 */ |
bogdanm | 0:9b334a45a8ff | 78 | __IO uint32_t disable_we2; /* 0x0168 Disable Flash Page Write/Erase Register 2 */ |
bogdanm | 0:9b334a45a8ff | 79 | __IO uint32_t disable_we3; /* 0x016C Disable Flash Page Write/Erase Register 3 */ |
bogdanm | 0:9b334a45a8ff | 80 | } mxc_flc_regs_t; |
bogdanm | 0:9b334a45a8ff | 81 | |
bogdanm | 0:9b334a45a8ff | 82 | /* |
bogdanm | 0:9b334a45a8ff | 83 | Register offsets for module FLC. |
bogdanm | 0:9b334a45a8ff | 84 | */ |
bogdanm | 0:9b334a45a8ff | 85 | #define MXC_R_FLC_OFFS_FADDR ((uint32_t)0x00000000UL) |
bogdanm | 0:9b334a45a8ff | 86 | #define MXC_R_FLC_OFFS_FCKDIV ((uint32_t)0x00000004UL) |
bogdanm | 0:9b334a45a8ff | 87 | #define MXC_R_FLC_OFFS_CTRL ((uint32_t)0x00000008UL) |
bogdanm | 0:9b334a45a8ff | 88 | #define MXC_R_FLC_OFFS_INTR ((uint32_t)0x00000024UL) |
bogdanm | 0:9b334a45a8ff | 89 | #define MXC_R_FLC_OFFS_FDATA ((uint32_t)0x00000030UL) |
bogdanm | 0:9b334a45a8ff | 90 | #define MXC_R_FLC_OFFS_PERFORM ((uint32_t)0x00000050UL) |
bogdanm | 0:9b334a45a8ff | 91 | #define MXC_R_FLC_OFFS_STATUS ((uint32_t)0x00000080UL) |
bogdanm | 0:9b334a45a8ff | 92 | #define MXC_R_FLC_OFFS_SECURITY ((uint32_t)0x00000088UL) |
bogdanm | 0:9b334a45a8ff | 93 | #define MXC_R_FLC_OFFS_BYPASS ((uint32_t)0x0000009CUL) |
bogdanm | 0:9b334a45a8ff | 94 | #define MXC_R_FLC_OFFS_USER_OPTION ((uint32_t)0x00000100UL) |
bogdanm | 0:9b334a45a8ff | 95 | #define MXC_R_FLC_OFFS_CTRL2 ((uint32_t)0x00000140UL) |
bogdanm | 0:9b334a45a8ff | 96 | #define MXC_R_FLC_OFFS_INTFL1 ((uint32_t)0x00000144UL) |
bogdanm | 0:9b334a45a8ff | 97 | #define MXC_R_FLC_OFFS_INTEN1 ((uint32_t)0x00000148UL) |
bogdanm | 0:9b334a45a8ff | 98 | #define MXC_R_FLC_OFFS_DISABLE_XR0 ((uint32_t)0x00000150UL) |
bogdanm | 0:9b334a45a8ff | 99 | #define MXC_R_FLC_OFFS_DISABLE_XR1 ((uint32_t)0x00000154UL) |
bogdanm | 0:9b334a45a8ff | 100 | #define MXC_R_FLC_OFFS_DISABLE_XR2 ((uint32_t)0x00000158UL) |
bogdanm | 0:9b334a45a8ff | 101 | #define MXC_R_FLC_OFFS_DISABLE_XR3 ((uint32_t)0x0000015CUL) |
bogdanm | 0:9b334a45a8ff | 102 | #define MXC_R_FLC_OFFS_DISABLE_WE0 ((uint32_t)0x00000160UL) |
bogdanm | 0:9b334a45a8ff | 103 | #define MXC_R_FLC_OFFS_DISABLE_WE1 ((uint32_t)0x00000164UL) |
bogdanm | 0:9b334a45a8ff | 104 | #define MXC_R_FLC_OFFS_DISABLE_WE2 ((uint32_t)0x00000168UL) |
bogdanm | 0:9b334a45a8ff | 105 | #define MXC_R_FLC_OFFS_DISABLE_WE3 ((uint32_t)0x0000016CUL) |
bogdanm | 0:9b334a45a8ff | 106 | |
bogdanm | 0:9b334a45a8ff | 107 | #define MXC_V_FLC_ERASE_CODE_PAGE_ERASE ((uint8_t)0x55) |
bogdanm | 0:9b334a45a8ff | 108 | #define MXC_V_FLC_ERASE_CODE_MASS_ERASE ((uint8_t)0xAA) |
bogdanm | 0:9b334a45a8ff | 109 | |
bogdanm | 0:9b334a45a8ff | 110 | #define MXC_V_FLC_FLSH_UNLOCK_KEY ((uint8_t)0x2) |
bogdanm | 0:9b334a45a8ff | 111 | |
bogdanm | 0:9b334a45a8ff | 112 | /* |
bogdanm | 0:9b334a45a8ff | 113 | Field positions and masks for module FLC. |
bogdanm | 0:9b334a45a8ff | 114 | */ |
bogdanm | 0:9b334a45a8ff | 115 | #define MXC_F_FLC_FADDR_FADDR_POS 0 |
bogdanm | 0:9b334a45a8ff | 116 | #define MXC_F_FLC_FADDR_FADDR ((uint32_t)(0x0003FFFFUL << MXC_F_FLC_FADDR_FADDR_POS)) |
bogdanm | 0:9b334a45a8ff | 117 | |
bogdanm | 0:9b334a45a8ff | 118 | #define MXC_F_FLC_FCKDIV_FCKDIV_POS 0 |
bogdanm | 0:9b334a45a8ff | 119 | #define MXC_F_FLC_FCKDIV_FCKDIV ((uint32_t)(0x0000001FUL << MXC_F_FLC_FCKDIV_FCKDIV_POS)) |
bogdanm | 0:9b334a45a8ff | 120 | |
bogdanm | 0:9b334a45a8ff | 121 | #define MXC_F_FLC_CTRL_WRITE_POS 0 |
bogdanm | 0:9b334a45a8ff | 122 | #define MXC_F_FLC_CTRL_WRITE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_POS)) |
bogdanm | 0:9b334a45a8ff | 123 | #define MXC_F_FLC_CTRL_MASS_ERASE_POS 1 |
bogdanm | 0:9b334a45a8ff | 124 | #define MXC_F_FLC_CTRL_MASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_MASS_ERASE_POS)) |
bogdanm | 0:9b334a45a8ff | 125 | #define MXC_F_FLC_CTRL_PAGE_ERASE_POS 2 |
bogdanm | 0:9b334a45a8ff | 126 | #define MXC_F_FLC_CTRL_PAGE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PAGE_ERASE_POS)) |
bogdanm | 0:9b334a45a8ff | 127 | #define MXC_F_FLC_CTRL_ERASE_CODE_POS 8 |
bogdanm | 0:9b334a45a8ff | 128 | #define MXC_F_FLC_CTRL_ERASE_CODE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL_ERASE_CODE_POS)) |
bogdanm | 0:9b334a45a8ff | 129 | #define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS 16 |
bogdanm | 0:9b334a45a8ff | 130 | #define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS)) |
bogdanm | 0:9b334a45a8ff | 131 | #define MXC_F_FLC_CTRL_WRITE_ENABLE_POS 17 |
bogdanm | 0:9b334a45a8ff | 132 | #define MXC_F_FLC_CTRL_WRITE_ENABLE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_ENABLE_POS)) |
bogdanm | 0:9b334a45a8ff | 133 | #define MXC_F_FLC_CTRL_PENDING_POS 24 |
bogdanm | 0:9b334a45a8ff | 134 | #define MXC_F_FLC_CTRL_PENDING ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PENDING_POS)) |
bogdanm | 0:9b334a45a8ff | 135 | #define MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS 25 |
bogdanm | 0:9b334a45a8ff | 136 | #define MXC_F_FLC_CTRL_INFO_BLOCK_VALID ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS)) |
bogdanm | 0:9b334a45a8ff | 137 | #define MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS 27 |
bogdanm | 0:9b334a45a8ff | 138 | #define MXC_F_FLC_CTRL_AUTO_INCRE_MODE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS)) |
bogdanm | 0:9b334a45a8ff | 139 | #define MXC_F_FLC_CTRL_FLSH_UNLOCK_POS 28 |
bogdanm | 0:9b334a45a8ff | 140 | #define MXC_F_FLC_CTRL_FLSH_UNLOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS)) |
bogdanm | 0:9b334a45a8ff | 141 | |
bogdanm | 0:9b334a45a8ff | 142 | #define MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS 0 |
bogdanm | 0:9b334a45a8ff | 143 | #define MXC_F_FLC_INTR_FLASH_OP_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS)) |
bogdanm | 0:9b334a45a8ff | 144 | #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS 1 |
bogdanm | 0:9b334a45a8ff | 145 | #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS)) |
bogdanm | 0:9b334a45a8ff | 146 | #define MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS 9 |
bogdanm | 0:9b334a45a8ff | 147 | #define MXC_F_FLC_INTR_FLASH_OP_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS)) |
bogdanm | 0:9b334a45a8ff | 148 | #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS 10 |
bogdanm | 0:9b334a45a8ff | 149 | #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS)) |
bogdanm | 0:9b334a45a8ff | 150 | |
bogdanm | 0:9b334a45a8ff | 151 | #define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS 8 |
bogdanm | 0:9b334a45a8ff | 152 | #define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS)) |
bogdanm | 0:9b334a45a8ff | 153 | #define MXC_F_FLC_PERFORM_DELAY_SE_EN_POS 0 |
bogdanm | 0:9b334a45a8ff | 154 | #define MXC_F_FLC_PERFORM_DELAY_SE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_DELAY_SE_EN_POS)) |
bogdanm | 0:9b334a45a8ff | 155 | |
bogdanm | 0:9b334a45a8ff | 156 | #define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS 0 |
bogdanm | 0:9b334a45a8ff | 157 | #define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS)) |
bogdanm | 0:9b334a45a8ff | 158 | #define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS 1 |
bogdanm | 0:9b334a45a8ff | 159 | #define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS)) |
bogdanm | 0:9b334a45a8ff | 160 | #define MXC_F_FLC_STATUS_AUTO_LOCK_POS 3 |
bogdanm | 0:9b334a45a8ff | 161 | #define MXC_F_FLC_STATUS_AUTO_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_AUTO_LOCK_POS)) |
bogdanm | 0:9b334a45a8ff | 162 | |
bogdanm | 0:9b334a45a8ff | 163 | #define MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS 0 |
bogdanm | 0:9b334a45a8ff | 164 | #define MXC_F_FLC_SECURITY_DEBUG_DISABLE ((uint32_t)(0x000000FFUL << MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS)) |
bogdanm | 0:9b334a45a8ff | 165 | #define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS 8 |
bogdanm | 0:9b334a45a8ff | 166 | #define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS)) |
bogdanm | 0:9b334a45a8ff | 167 | #define MXC_F_FLC_SECURITY_SECURITY_LOCK_POS 31 |
bogdanm | 0:9b334a45a8ff | 168 | #define MXC_F_FLC_SECURITY_SECURITY_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_SECURITY_SECURITY_LOCK_POS)) |
bogdanm | 0:9b334a45a8ff | 169 | |
bogdanm | 0:9b334a45a8ff | 170 | #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS 0 |
bogdanm | 0:9b334a45a8ff | 171 | #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS)) |
bogdanm | 0:9b334a45a8ff | 172 | #define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS 1 |
bogdanm | 0:9b334a45a8ff | 173 | #define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS)) |
bogdanm | 0:9b334a45a8ff | 174 | #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS 2 |
bogdanm | 0:9b334a45a8ff | 175 | #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS)) |
bogdanm | 0:9b334a45a8ff | 176 | #define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS 3 |
bogdanm | 0:9b334a45a8ff | 177 | #define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS)) |
bogdanm | 0:9b334a45a8ff | 178 | |
bogdanm | 0:9b334a45a8ff | 179 | #define MXC_F_FLC_CTRL2_FLASH_LVE_POS 0 |
bogdanm | 0:9b334a45a8ff | 180 | #define MXC_F_FLC_CTRL2_FLASH_LVE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_FLASH_LVE_POS)) |
bogdanm | 0:9b334a45a8ff | 181 | #define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS 8 |
bogdanm | 0:9b334a45a8ff | 182 | #define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS)) |
bogdanm | 0:9b334a45a8ff | 183 | |
bogdanm | 0:9b334a45a8ff | 184 | #define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS 0 |
bogdanm | 0:9b334a45a8ff | 185 | #define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS)) |
bogdanm | 0:9b334a45a8ff | 186 | #define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS 1 |
bogdanm | 0:9b334a45a8ff | 187 | #define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS)) |
bogdanm | 0:9b334a45a8ff | 188 | #define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS 2 |
bogdanm | 0:9b334a45a8ff | 189 | #define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS)) |
bogdanm | 0:9b334a45a8ff | 190 | #define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS 3 |
bogdanm | 0:9b334a45a8ff | 191 | #define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS)) |
bogdanm | 0:9b334a45a8ff | 192 | |
bogdanm | 0:9b334a45a8ff | 193 | #define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS 0 |
bogdanm | 0:9b334a45a8ff | 194 | #define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS)) |
bogdanm | 0:9b334a45a8ff | 195 | #define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS 1 |
bogdanm | 0:9b334a45a8ff | 196 | #define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS)) |
bogdanm | 0:9b334a45a8ff | 197 | #define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS 2 |
bogdanm | 0:9b334a45a8ff | 198 | #define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS)) |
bogdanm | 0:9b334a45a8ff | 199 | #define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS 3 |
bogdanm | 0:9b334a45a8ff | 200 | #define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS)) |
bogdanm | 0:9b334a45a8ff | 201 | |
bogdanm | 0:9b334a45a8ff | 202 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 203 | } |
bogdanm | 0:9b334a45a8ff | 204 | #endif |
bogdanm | 0:9b334a45a8ff | 205 | |
bogdanm | 0:9b334a45a8ff | 206 | /** |
bogdanm | 0:9b334a45a8ff | 207 | * @} |
bogdanm | 0:9b334a45a8ff | 208 | */ |
bogdanm | 0:9b334a45a8ff | 209 | |
bogdanm | 0:9b334a45a8ff | 210 | #endif /* _MXC_FLC_REGS_H_ */ |