teralytic / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/flash_map.h@148:4802eb17e82b, 2016-10-17 (annotated)

Committer:
rodriguise
Date:
Mon Oct 17 18:47:01 2016 +0000
Revision:
148:4802eb17e82b
Parent:
147:30b64687e01f 
backup

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<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file flash_map.h
<> 144:ef7eb2e8f9f7 4 * @brief Flash controller HW register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 2686 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2014-01-23 13:31:54 +0530 (Thu, 23 Jan 2014) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 147:30b64687e01f 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 147:30b64687e01f 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 147:30b64687e01f 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 147:30b64687e01f 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 147:30b64687e01f 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 147:30b64687e01f 15 * if applicable the software license agreement. Do not use this software and/or
<> 147:30b64687e01f 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 147:30b64687e01f 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 147:30b64687e01f 18 * terms and conditions.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 25 * @endinternal
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * @ingroup flash
<> 144:ef7eb2e8f9f7 28 *
<> 144:ef7eb2e8f9f7 29 * @details
<> 144:ef7eb2e8f9f7 30 * <p>
<> 144:ef7eb2e8f9f7 31 * Flash controller HW register map description
<> 144:ef7eb2e8f9f7 32 * </p>
<> 144:ef7eb2e8f9f7 33 *
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35 #ifndef FLASH_MAP_H_
<> 144:ef7eb2e8f9f7 36 #define FLASH_MAP_H_
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #include "architecture.h"
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /** Flash Control HW Structure Overlay */
<> 144:ef7eb2e8f9f7 41 typedef struct {
<> 144:ef7eb2e8f9f7 42 union {
<> 144:ef7eb2e8f9f7 43 struct {
<> 144:ef7eb2e8f9f7 44 __I uint32_t FLASH_A_BUSY:1; /**< Busy A */
<> 144:ef7eb2e8f9f7 45 __I uint32_t FLASH_B_BUSY:1; /**< Busy B */
<> 144:ef7eb2e8f9f7 46 __I uint32_t FLASH_A_UNLOCK:1; /**< Unlock A */
<> 144:ef7eb2e8f9f7 47 __I uint32_t FLASH_B_UNLOCK:1; /**< Unlock B */
<> 144:ef7eb2e8f9f7 48 __I uint32_t FLASH_ERROR:3; /**< 000 – No Error, 111 – Attempt to access an array while it is busy powering up, 001 – Attempt to erase bootloader in the field, 010 – Attempt to access array during erase, 100 – Attempt to access array during write */
<> 144:ef7eb2e8f9f7 49 } BITS;
<> 144:ef7eb2e8f9f7 50 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 51 } STATUS;
<> 144:ef7eb2e8f9f7 52 union {
<> 144:ef7eb2e8f9f7 53 struct {
<> 144:ef7eb2e8f9f7 54 __IO uint32_t FLASHB_PD:1;
<> 144:ef7eb2e8f9f7 55 __IO uint32_t FLASHA_PD:1;
<> 144:ef7eb2e8f9f7 56 __IO uint32_t REMAP:1;
<> 144:ef7eb2e8f9f7 57 __IO uint32_t WR_INT_EN:1;
<> 144:ef7eb2e8f9f7 58 __IO uint32_t ERASE_INT_EN:1;
<> 144:ef7eb2e8f9f7 59 __IO uint32_t ERROR_INT_EN:1;
<> 144:ef7eb2e8f9f7 60 __IO uint32_t WRITE_BLOCK:1;
<> 144:ef7eb2e8f9f7 61 } BITS;
<> 144:ef7eb2e8f9f7 62 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 63 } CONTROL;
<> 144:ef7eb2e8f9f7 64 union {
<> 144:ef7eb2e8f9f7 65 struct {
<> 144:ef7eb2e8f9f7 66 __IO uint32_t PAGEERASE:1; /**< Erase a single page */
<> 144:ef7eb2e8f9f7 67 __IO uint32_t MASSERASE:1; /**< MASS Erase */
<> 144:ef7eb2e8f9f7 68 } BITS;
<> 144:ef7eb2e8f9f7 69 __IO uint32_t WORD;
<> 144:ef7eb2e8f9f7 70 } COMMAND;
<> 144:ef7eb2e8f9f7 71 __IO uint32_t ADDR;
<> 144:ef7eb2e8f9f7 72 __IO uint32_t UNLOCK1;
<> 144:ef7eb2e8f9f7 73 __IO uint32_t UNLOCKA;
<> 144:ef7eb2e8f9f7 74 __IO uint32_t UNLOCKB;
<> 144:ef7eb2e8f9f7 75 union {
<> 144:ef7eb2e8f9f7 76 struct {
<> 144:ef7eb2e8f9f7 77 __I uint32_t INT_PEND:1; // Interrupt pending
<> 144:ef7eb2e8f9f7 78 __I uint32_t INT_TYPE:3; // Interrupt type
<> 144:ef7eb2e8f9f7 79 } BITS;
<> 144:ef7eb2e8f9f7 80 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 81 } INT_STATUS;
<> 144:ef7eb2e8f9f7 82 } FlashReg_t, *FlashReg_pt;
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 #endif /* FLASH_MAP_H_ */