mbed library sources. Supersedes mbed-src.
Fork of mbed by
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM4/gpio_irq_api.c@148:4802eb17e82b, 2016-10-17 (annotated)
- Committer:
- rodriguise
- Date:
- Mon Oct 17 18:47:01 2016 +0000
- Revision:
- 148:4802eb17e82b
- Parent:
- 107:414e9c822e99
backup
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 107:414e9c822e99 | 1 | /* mbed Microcontroller Library |
mbed_official | 107:414e9c822e99 | 2 | * Copyright (c) 2006-2015 ARM Limited |
mbed_official | 107:414e9c822e99 | 3 | * |
mbed_official | 107:414e9c822e99 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 107:414e9c822e99 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 107:414e9c822e99 | 6 | * You may obtain a copy of the License at |
mbed_official | 107:414e9c822e99 | 7 | * |
mbed_official | 107:414e9c822e99 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 107:414e9c822e99 | 9 | * |
mbed_official | 107:414e9c822e99 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 107:414e9c822e99 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 107:414e9c822e99 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 107:414e9c822e99 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 107:414e9c822e99 | 14 | * limitations under the License. |
mbed_official | 107:414e9c822e99 | 15 | */ |
mbed_official | 107:414e9c822e99 | 16 | #include <stddef.h> |
mbed_official | 107:414e9c822e99 | 17 | #include "cmsis.h" |
mbed_official | 107:414e9c822e99 | 18 | |
mbed_official | 107:414e9c822e99 | 19 | #include "gpio_irq_api.h" |
mbed_official | 107:414e9c822e99 | 20 | #include "gpio_api.h" |
mbed_official | 107:414e9c822e99 | 21 | #include "ioport.h" |
mbed_official | 107:414e9c822e99 | 22 | |
mbed_official | 107:414e9c822e99 | 23 | #define IRQ_RISE_POSITION 1 |
mbed_official | 107:414e9c822e99 | 24 | #define IRQ_FALL_POSITION 2 |
mbed_official | 107:414e9c822e99 | 25 | #define CHANNEL_NUM 48 |
mbed_official | 107:414e9c822e99 | 26 | #define MAX_PINS_IN_PORT 32 |
mbed_official | 107:414e9c822e99 | 27 | |
mbed_official | 107:414e9c822e99 | 28 | static uint32_t channel_ids[CHANNEL_NUM] = {0}; |
mbed_official | 107:414e9c822e99 | 29 | static gpio_irq_handler irq_handler; |
mbed_official | 107:414e9c822e99 | 30 | extern uint8_t g_sys_init; |
mbed_official | 107:414e9c822e99 | 31 | |
mbed_official | 107:414e9c822e99 | 32 | static IRQn_Type pin_to_irq (uint32_t pin); |
mbed_official | 107:414e9c822e99 | 33 | |
mbed_official | 107:414e9c822e99 | 34 | void gpio_irq_common_handler(uint32_t port_id) |
mbed_official | 107:414e9c822e99 | 35 | { |
mbed_official | 107:414e9c822e99 | 36 | uint32_t i = 0, status = 0, mask = 0, temp = 0; |
mbed_official | 107:414e9c822e99 | 37 | gpio_irq_event event; |
mbed_official | 107:414e9c822e99 | 38 | |
mbed_official | 107:414e9c822e99 | 39 | Pio* pio_base = arch_ioport_port_to_base(port_id); |
mbed_official | 107:414e9c822e99 | 40 | mask = pio_base->PIO_IMR; |
mbed_official | 107:414e9c822e99 | 41 | status = pio_base->PIO_ISR; |
mbed_official | 107:414e9c822e99 | 42 | status = status & mask; |
mbed_official | 107:414e9c822e99 | 43 | |
mbed_official | 107:414e9c822e99 | 44 | for (i = 0; i < MAX_PINS_IN_PORT ; i++) { |
mbed_official | 107:414e9c822e99 | 45 | temp = (1 << i ); |
mbed_official | 107:414e9c822e99 | 46 | if (status & temp ) { |
mbed_official | 107:414e9c822e99 | 47 | if((pio_base->PIO_PDSR) & temp) { |
mbed_official | 107:414e9c822e99 | 48 | event = IRQ_RISE; |
mbed_official | 107:414e9c822e99 | 49 | } else { |
mbed_official | 107:414e9c822e99 | 50 | event = IRQ_FALL; |
mbed_official | 107:414e9c822e99 | 51 | } |
mbed_official | 107:414e9c822e99 | 52 | if(irq_handler) { |
mbed_official | 107:414e9c822e99 | 53 | irq_handler(channel_ids[(port_id * 32) + i], event); |
mbed_official | 107:414e9c822e99 | 54 | } |
mbed_official | 107:414e9c822e99 | 55 | } |
mbed_official | 107:414e9c822e99 | 56 | } |
mbed_official | 107:414e9c822e99 | 57 | } |
mbed_official | 107:414e9c822e99 | 58 | |
mbed_official | 107:414e9c822e99 | 59 | void gpio_irq_porta(void) |
mbed_official | 107:414e9c822e99 | 60 | { |
mbed_official | 107:414e9c822e99 | 61 | gpio_irq_common_handler(IOPORT_PIOA); |
mbed_official | 107:414e9c822e99 | 62 | } |
mbed_official | 107:414e9c822e99 | 63 | |
mbed_official | 107:414e9c822e99 | 64 | void gpio_irq_portb(void) |
mbed_official | 107:414e9c822e99 | 65 | { |
mbed_official | 107:414e9c822e99 | 66 | gpio_irq_common_handler(IOPORT_PIOB); |
mbed_official | 107:414e9c822e99 | 67 | } |
mbed_official | 107:414e9c822e99 | 68 | |
mbed_official | 107:414e9c822e99 | 69 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) |
mbed_official | 107:414e9c822e99 | 70 | { |
mbed_official | 107:414e9c822e99 | 71 | MBED_ASSERT(obj); |
mbed_official | 107:414e9c822e99 | 72 | if (pin == NC) |
mbed_official | 107:414e9c822e99 | 73 | return -1; |
mbed_official | 107:414e9c822e99 | 74 | if (g_sys_init == 0) { |
mbed_official | 107:414e9c822e99 | 75 | sysclk_init(); |
mbed_official | 107:414e9c822e99 | 76 | system_board_init(); |
mbed_official | 107:414e9c822e99 | 77 | g_sys_init = 1; |
mbed_official | 107:414e9c822e99 | 78 | } |
mbed_official | 107:414e9c822e99 | 79 | |
mbed_official | 107:414e9c822e99 | 80 | IRQn_Type irq_n = (IRQn_Type)0; |
mbed_official | 107:414e9c822e99 | 81 | uint32_t port_id; |
mbed_official | 107:414e9c822e99 | 82 | uint32_t vector = 0; |
mbed_official | 107:414e9c822e99 | 83 | uint8_t int_channel = 0; |
mbed_official | 107:414e9c822e99 | 84 | Pio* pio_base; |
mbed_official | 107:414e9c822e99 | 85 | |
mbed_official | 107:414e9c822e99 | 86 | irq_handler = handler; // assuming the usage of these apis in mbed layer only |
mbed_official | 107:414e9c822e99 | 87 | int_channel = ((pin / 32) * 32) + (pin % 32); /*to get the channel to be used*/ |
mbed_official | 107:414e9c822e99 | 88 | channel_ids[int_channel] = id; |
mbed_official | 107:414e9c822e99 | 89 | obj->pin = pin; |
mbed_official | 107:414e9c822e99 | 90 | port_id = ioport_pin_to_port_id(pin); |
mbed_official | 107:414e9c822e99 | 91 | pio_base = arch_ioport_port_to_base(port_id); |
mbed_official | 107:414e9c822e99 | 92 | |
mbed_official | 107:414e9c822e99 | 93 | ioport_set_pin_dir(pin, IOPORT_DIR_INPUT); /*Pin to be configured input for GPIO Interrupt*/ |
mbed_official | 107:414e9c822e99 | 94 | ioport_set_pin_mode(pin, IOPORT_MODE_PULLUP); |
mbed_official | 107:414e9c822e99 | 95 | |
mbed_official | 107:414e9c822e99 | 96 | irq_n = pin_to_irq(pin); |
mbed_official | 107:414e9c822e99 | 97 | |
mbed_official | 107:414e9c822e99 | 98 | switch (port_id) { |
mbed_official | 107:414e9c822e99 | 99 | /*only 2 ports for SAMG55*/ /*Setting up the vectors*/ |
mbed_official | 107:414e9c822e99 | 100 | case IOPORT_PIOA : |
mbed_official | 107:414e9c822e99 | 101 | vector = (uint32_t)gpio_irq_porta; |
mbed_official | 107:414e9c822e99 | 102 | break; |
mbed_official | 107:414e9c822e99 | 103 | case IOPORT_PIOB : |
mbed_official | 107:414e9c822e99 | 104 | vector = (uint32_t)gpio_irq_portb; |
mbed_official | 107:414e9c822e99 | 105 | break; |
mbed_official | 107:414e9c822e99 | 106 | } |
mbed_official | 107:414e9c822e99 | 107 | pio_base->PIO_ISR; /*To read and clear status register*/ |
mbed_official | 107:414e9c822e99 | 108 | NVIC_SetVector(irq_n, vector); |
mbed_official | 107:414e9c822e99 | 109 | NVIC_EnableIRQ(irq_n); |
mbed_official | 107:414e9c822e99 | 110 | |
mbed_official | 107:414e9c822e99 | 111 | return 0; |
mbed_official | 107:414e9c822e99 | 112 | } |
mbed_official | 107:414e9c822e99 | 113 | |
mbed_official | 107:414e9c822e99 | 114 | void gpio_irq_free(gpio_irq_t *obj) |
mbed_official | 107:414e9c822e99 | 115 | { |
mbed_official | 107:414e9c822e99 | 116 | MBED_ASSERT(obj); |
mbed_official | 107:414e9c822e99 | 117 | channel_ids[((obj->pin / 32) * 32) + (obj->pin % 32)] = 0; |
mbed_official | 107:414e9c822e99 | 118 | } |
mbed_official | 107:414e9c822e99 | 119 | |
mbed_official | 107:414e9c822e99 | 120 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) |
mbed_official | 107:414e9c822e99 | 121 | { |
mbed_official | 107:414e9c822e99 | 122 | MBED_ASSERT(obj); |
mbed_official | 107:414e9c822e99 | 123 | uint32_t mask = 0; |
mbed_official | 107:414e9c822e99 | 124 | |
mbed_official | 107:414e9c822e99 | 125 | Pio* pio_base = arch_ioport_port_to_base(arch_ioport_pin_to_port_id(obj->pin)); |
mbed_official | 107:414e9c822e99 | 126 | mask = (1 << (obj->pin % 32)); |
mbed_official | 107:414e9c822e99 | 127 | |
mbed_official | 107:414e9c822e99 | 128 | if (enable) { |
mbed_official | 107:414e9c822e99 | 129 | if (event == IRQ_RISE) { |
mbed_official | 107:414e9c822e99 | 130 | obj->irqmask |= IRQ_RISE_POSITION; |
mbed_official | 107:414e9c822e99 | 131 | } else if (event == IRQ_FALL) { |
mbed_official | 107:414e9c822e99 | 132 | obj->irqmask |= IRQ_FALL_POSITION; |
mbed_official | 107:414e9c822e99 | 133 | } |
mbed_official | 107:414e9c822e99 | 134 | } else { |
mbed_official | 107:414e9c822e99 | 135 | |
mbed_official | 107:414e9c822e99 | 136 | if (event == IRQ_RISE) { |
mbed_official | 107:414e9c822e99 | 137 | obj->irqmask &= ~IRQ_RISE_POSITION; |
mbed_official | 107:414e9c822e99 | 138 | } else if (event == IRQ_FALL) { |
mbed_official | 107:414e9c822e99 | 139 | obj->irqmask &= ~IRQ_FALL_POSITION; |
mbed_official | 107:414e9c822e99 | 140 | } |
mbed_official | 107:414e9c822e99 | 141 | } |
mbed_official | 107:414e9c822e99 | 142 | pio_base->PIO_ISR; /*To read and clear status register*/ |
mbed_official | 107:414e9c822e99 | 143 | if (obj->irqmask == (IRQ_RISE_POSITION | IRQ_FALL_POSITION)) { /*both edge detection*/ |
mbed_official | 107:414e9c822e99 | 144 | pio_base->PIO_AIMDR = mask; |
mbed_official | 107:414e9c822e99 | 145 | pio_base->PIO_IER = mask; |
mbed_official | 107:414e9c822e99 | 146 | } else if (obj->irqmask == IRQ_RISE_POSITION) { /*rising detection*/ |
mbed_official | 107:414e9c822e99 | 147 | pio_base->PIO_ESR = mask; |
mbed_official | 107:414e9c822e99 | 148 | pio_base->PIO_REHLSR = mask; |
mbed_official | 107:414e9c822e99 | 149 | pio_base->PIO_AIMER = mask; |
mbed_official | 107:414e9c822e99 | 150 | pio_base->PIO_IER = mask; |
mbed_official | 107:414e9c822e99 | 151 | } else if (obj->irqmask == IRQ_FALL_POSITION) { /*falling detection*/ |
mbed_official | 107:414e9c822e99 | 152 | pio_base->PIO_ESR = mask; |
mbed_official | 107:414e9c822e99 | 153 | pio_base->PIO_FELLSR = mask; |
mbed_official | 107:414e9c822e99 | 154 | pio_base->PIO_AIMER = mask; |
mbed_official | 107:414e9c822e99 | 155 | pio_base->PIO_IER = mask; |
mbed_official | 107:414e9c822e99 | 156 | } else { /*none and disable*/ |
mbed_official | 107:414e9c822e99 | 157 | pio_base->PIO_IDR = mask; |
mbed_official | 107:414e9c822e99 | 158 | } |
mbed_official | 107:414e9c822e99 | 159 | } |
mbed_official | 107:414e9c822e99 | 160 | |
mbed_official | 107:414e9c822e99 | 161 | static IRQn_Type pin_to_irq (uint32_t pin) |
mbed_official | 107:414e9c822e99 | 162 | { |
mbed_official | 107:414e9c822e99 | 163 | uint32_t port_id; |
mbed_official | 107:414e9c822e99 | 164 | IRQn_Type irq_n = (IRQn_Type)0; |
mbed_official | 107:414e9c822e99 | 165 | port_id = ioport_pin_to_port_id(pin); |
mbed_official | 107:414e9c822e99 | 166 | |
mbed_official | 107:414e9c822e99 | 167 | switch (port_id) { |
mbed_official | 107:414e9c822e99 | 168 | case IOPORT_PIOA : |
mbed_official | 107:414e9c822e99 | 169 | irq_n = PIOA_IRQn; |
mbed_official | 107:414e9c822e99 | 170 | break; |
mbed_official | 107:414e9c822e99 | 171 | case IOPORT_PIOB : |
mbed_official | 107:414e9c822e99 | 172 | irq_n = PIOB_IRQn; |
mbed_official | 107:414e9c822e99 | 173 | break; |
mbed_official | 107:414e9c822e99 | 174 | } |
mbed_official | 107:414e9c822e99 | 175 | return irq_n; |
mbed_official | 107:414e9c822e99 | 176 | } |
mbed_official | 107:414e9c822e99 | 177 | |
mbed_official | 107:414e9c822e99 | 178 | void gpio_irq_enable(gpio_irq_t *obj) |
mbed_official | 107:414e9c822e99 | 179 | { |
mbed_official | 107:414e9c822e99 | 180 | MBED_ASSERT(obj); |
mbed_official | 107:414e9c822e99 | 181 | NVIC_EnableIRQ(pin_to_irq(obj->pin)); |
mbed_official | 107:414e9c822e99 | 182 | } |
mbed_official | 107:414e9c822e99 | 183 | |
mbed_official | 107:414e9c822e99 | 184 | void gpio_irq_disable(gpio_irq_t *obj) |
mbed_official | 107:414e9c822e99 | 185 | { |
mbed_official | 107:414e9c822e99 | 186 | MBED_ASSERT(obj); |
mbed_official | 107:414e9c822e99 | 187 | NVIC_DisableIRQ(pin_to_irq(obj->pin)); |
mbed_official | 107:414e9c822e99 | 188 | } |