teralytic / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/startup_LPC407x_8x_177x_8x.S@148:4802eb17e82b, 2016-10-17 (annotated)

Committer:
rodriguise
Date:
Mon Oct 17 18:47:01 2016 +0000
Revision:
148:4802eb17e82b
Parent:
144:ef7eb2e8f9f7 
backup

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;/*****************************************************************************
<> 144:ef7eb2e8f9f7 2 ; * @file: startup_LPC407x_8x.s
<> 144:ef7eb2e8f9f7 3 ; * @purpose: CMSIS Cortex-M4 Core Device Startup File
<> 144:ef7eb2e8f9f7 4 ; * for the NXP LPC407x_8x Device Series
<> 144:ef7eb2e8f9f7 5 ; * @version: V1.20
<> 144:ef7eb2e8f9f7 6 ; * @date: 16. January 2012
<> 144:ef7eb2e8f9f7 7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
<> 144:ef7eb2e8f9f7 8 ; *
<> 144:ef7eb2e8f9f7 9 ; * Copyright (C) 2012 ARM Limited. All rights reserved.
<> 144:ef7eb2e8f9f7 10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M4
<> 144:ef7eb2e8f9f7 11 ; * processor based microcontrollers. This file can be freely distributed
<> 144:ef7eb2e8f9f7 12 ; * within development tools that are supporting such ARM based processors.
<> 144:ef7eb2e8f9f7 13 ; *
<> 144:ef7eb2e8f9f7 14 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
<> 144:ef7eb2e8f9f7 18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 ; *
<> 144:ef7eb2e8f9f7 20 ; *****************************************************************************/
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 __initial_sp EQU 0x10010000 ; Top of RAM from LPC4088
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 PRESERVE8
<> 144:ef7eb2e8f9f7 27 THUMB
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 ; Vector Table Mapped to Address 0 at Reset
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 AREA RESET, DATA, READONLY
<> 144:ef7eb2e8f9f7 32 EXPORT __Vectors
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 __Vectors DCD __initial_sp ; Top of Stack
<> 144:ef7eb2e8f9f7 35 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 36 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 37 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 38 DCD MemManage_Handler ; MPU Fault Handler
<> 144:ef7eb2e8f9f7 39 DCD BusFault_Handler ; Bus Fault Handler
<> 144:ef7eb2e8f9f7 40 DCD UsageFault_Handler ; Usage Fault Handler
<> 144:ef7eb2e8f9f7 41 ; DCD 0xEFFFF5D6 ; Reserved- vector sum
<> 144:ef7eb2e8f9f7 42 DCD 0xEFFFF39E ; Reserved- vector sum
<> 144:ef7eb2e8f9f7 43 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 44 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 45 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 46 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 47 DCD DebugMon_Handler ; Debug Monitor Handler
<> 144:ef7eb2e8f9f7 48 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 49 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 50 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 ; External Interrupts
<> 144:ef7eb2e8f9f7 53 DCD WDT_IRQHandler ; 16: Watchdog Timer
<> 144:ef7eb2e8f9f7 54 DCD TIMER0_IRQHandler ; 17: Timer0
<> 144:ef7eb2e8f9f7 55 DCD TIMER1_IRQHandler ; 18: Timer1
<> 144:ef7eb2e8f9f7 56 DCD TIMER2_IRQHandler ; 19: Timer2
<> 144:ef7eb2e8f9f7 57 DCD TIMER3_IRQHandler ; 20: Timer3
<> 144:ef7eb2e8f9f7 58 DCD UART0_IRQHandler ; 21: UART0
<> 144:ef7eb2e8f9f7 59 DCD UART1_IRQHandler ; 22: UART1
<> 144:ef7eb2e8f9f7 60 DCD UART2_IRQHandler ; 23: UART2
<> 144:ef7eb2e8f9f7 61 DCD UART3_IRQHandler ; 24: UART3
<> 144:ef7eb2e8f9f7 62 DCD PWM1_IRQHandler ; 25: PWM1
<> 144:ef7eb2e8f9f7 63 DCD I2C0_IRQHandler ; 26: I2C0
<> 144:ef7eb2e8f9f7 64 DCD I2C1_IRQHandler ; 27: I2C1
<> 144:ef7eb2e8f9f7 65 DCD I2C2_IRQHandler ; 28: I2C2
<> 144:ef7eb2e8f9f7 66 DCD 0 ; 29: reserved, not for SPIFI anymore
<> 144:ef7eb2e8f9f7 67 DCD SSP0_IRQHandler ; 30: SSP0
<> 144:ef7eb2e8f9f7 68 DCD SSP1_IRQHandler ; 31: SSP1
<> 144:ef7eb2e8f9f7 69 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
<> 144:ef7eb2e8f9f7 70 DCD RTC_IRQHandler ; 33: Real Time Clock
<> 144:ef7eb2e8f9f7 71 DCD EINT0_IRQHandler ; 34: External Interrupt 0
<> 144:ef7eb2e8f9f7 72 DCD EINT1_IRQHandler ; 35: External Interrupt 1
<> 144:ef7eb2e8f9f7 73 DCD EINT2_IRQHandler ; 36: External Interrupt 2
<> 144:ef7eb2e8f9f7 74 DCD EINT3_IRQHandler ; 37: External Interrupt 3
<> 144:ef7eb2e8f9f7 75 DCD ADC_IRQHandler ; 38: A/D Converter
<> 144:ef7eb2e8f9f7 76 DCD BOD_IRQHandler ; 39: Brown-Out Detect
<> 144:ef7eb2e8f9f7 77 DCD USB_IRQHandler ; 40: USB
<> 144:ef7eb2e8f9f7 78 DCD CAN_IRQHandler ; 41: CAN
<> 144:ef7eb2e8f9f7 79 DCD DMA_IRQHandler ; 42: General Purpose DMA
<> 144:ef7eb2e8f9f7 80 DCD I2S_IRQHandler ; 43: I2S
<> 144:ef7eb2e8f9f7 81 DCD ENET_IRQHandler ; 44: Ethernet
<> 144:ef7eb2e8f9f7 82 DCD MCI_IRQHandler ; 45: SD/MMC card I/F
<> 144:ef7eb2e8f9f7 83 DCD MCPWM_IRQHandler ; 46: Motor Control PWM
<> 144:ef7eb2e8f9f7 84 DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
<> 144:ef7eb2e8f9f7 85 DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
<> 144:ef7eb2e8f9f7 86 DCD USBActivity_IRQHandler ; 49: USB Activity interrupt to wakeup
<> 144:ef7eb2e8f9f7 87 DCD CANActivity_IRQHandler ; 50: CAN Activity interrupt to wakeup
<> 144:ef7eb2e8f9f7 88 DCD UART4_IRQHandler ; 51: UART4
<> 144:ef7eb2e8f9f7 89 DCD SSP2_IRQHandler ; 52: SSP2
<> 144:ef7eb2e8f9f7 90 DCD LCD_IRQHandler ; 53: LCD
<> 144:ef7eb2e8f9f7 91 DCD GPIO_IRQHandler ; 54: GPIO
<> 144:ef7eb2e8f9f7 92 DCD PWM0_IRQHandler ; 55: PWM0
<> 144:ef7eb2e8f9f7 93 DCD EEPROM_IRQHandler ; 56: EEPROM
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 IF :LNOT::DEF:NO_CRP
<> 144:ef7eb2e8f9f7 97 AREA |.ARM.__at_0x02FC|, CODE, READONLY
<> 144:ef7eb2e8f9f7 98 CRP_Key DCD 0xFFFFFFFF
<> 144:ef7eb2e8f9f7 99 ENDIF
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 AREA |.text|, CODE, READONLY
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 ; Reset Handler
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 Reset_Handler PROC
<> 144:ef7eb2e8f9f7 108 EXPORT Reset_Handler [WEAK]
<> 144:ef7eb2e8f9f7 109 IMPORT SystemInit
<> 144:ef7eb2e8f9f7 110 IMPORT __main
<> 144:ef7eb2e8f9f7 111 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 112 BLX R0
<> 144:ef7eb2e8f9f7 113 LDR R0, =__main
<> 144:ef7eb2e8f9f7 114 BX R0
<> 144:ef7eb2e8f9f7 115 ENDP
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 ; Dummy Exception Handlers (infinite loops which can be modified)
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 NMI_Handler PROC
<> 144:ef7eb2e8f9f7 121 EXPORT NMI_Handler [WEAK]
<> 144:ef7eb2e8f9f7 122 B .
<> 144:ef7eb2e8f9f7 123 ENDP
<> 144:ef7eb2e8f9f7 124 HardFault_Handler\
<> 144:ef7eb2e8f9f7 125 PROC
<> 144:ef7eb2e8f9f7 126 EXPORT HardFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 127 B .
<> 144:ef7eb2e8f9f7 128 ENDP
<> 144:ef7eb2e8f9f7 129 MemManage_Handler\
<> 144:ef7eb2e8f9f7 130 PROC
<> 144:ef7eb2e8f9f7 131 EXPORT MemManage_Handler [WEAK]
<> 144:ef7eb2e8f9f7 132 B .
<> 144:ef7eb2e8f9f7 133 ENDP
<> 144:ef7eb2e8f9f7 134 BusFault_Handler\
<> 144:ef7eb2e8f9f7 135 PROC
<> 144:ef7eb2e8f9f7 136 EXPORT BusFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 137 B .
<> 144:ef7eb2e8f9f7 138 ENDP
<> 144:ef7eb2e8f9f7 139 UsageFault_Handler\
<> 144:ef7eb2e8f9f7 140 PROC
<> 144:ef7eb2e8f9f7 141 EXPORT UsageFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 142 B .
<> 144:ef7eb2e8f9f7 143 ENDP
<> 144:ef7eb2e8f9f7 144 SVC_Handler PROC
<> 144:ef7eb2e8f9f7 145 EXPORT SVC_Handler [WEAK]
<> 144:ef7eb2e8f9f7 146 B .
<> 144:ef7eb2e8f9f7 147 ENDP
<> 144:ef7eb2e8f9f7 148 DebugMon_Handler\
<> 144:ef7eb2e8f9f7 149 PROC
<> 144:ef7eb2e8f9f7 150 EXPORT DebugMon_Handler [WEAK]
<> 144:ef7eb2e8f9f7 151 B .
<> 144:ef7eb2e8f9f7 152 ENDP
<> 144:ef7eb2e8f9f7 153 PendSV_Handler PROC
<> 144:ef7eb2e8f9f7 154 EXPORT PendSV_Handler [WEAK]
<> 144:ef7eb2e8f9f7 155 B .
<> 144:ef7eb2e8f9f7 156 ENDP
<> 144:ef7eb2e8f9f7 157 SysTick_Handler PROC
<> 144:ef7eb2e8f9f7 158 EXPORT SysTick_Handler [WEAK]
<> 144:ef7eb2e8f9f7 159 B .
<> 144:ef7eb2e8f9f7 160 ENDP
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 Default_Handler PROC
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 EXPORT WDT_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 165 EXPORT TIMER0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 166 EXPORT TIMER1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 167 EXPORT TIMER2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 168 EXPORT TIMER3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 169 EXPORT UART0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 170 EXPORT UART1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 171 EXPORT UART2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 172 EXPORT UART3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 173 EXPORT PWM1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 174 EXPORT I2C0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 175 EXPORT I2C1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 176 EXPORT I2C2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 177 ;EXPORT SPIFI_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 178 EXPORT SSP0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 179 EXPORT SSP1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 180 EXPORT PLL0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 181 EXPORT RTC_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 182 EXPORT EINT0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 183 EXPORT EINT1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 184 EXPORT EINT2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 185 EXPORT EINT3_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 186 EXPORT ADC_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 187 EXPORT BOD_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 188 EXPORT USB_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 189 EXPORT CAN_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 190 EXPORT DMA_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 191 EXPORT I2S_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 192 EXPORT ENET_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 193 EXPORT MCI_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 194 EXPORT MCPWM_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 195 EXPORT QEI_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 196 EXPORT PLL1_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 197 EXPORT USBActivity_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 198 EXPORT CANActivity_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 199 EXPORT UART4_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 200 EXPORT SSP2_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 201 EXPORT LCD_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 202 EXPORT GPIO_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 203 EXPORT PWM0_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 204 EXPORT EEPROM_IRQHandler [WEAK]
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 WDT_IRQHandler
<> 144:ef7eb2e8f9f7 207 TIMER0_IRQHandler
<> 144:ef7eb2e8f9f7 208 TIMER1_IRQHandler
<> 144:ef7eb2e8f9f7 209 TIMER2_IRQHandler
<> 144:ef7eb2e8f9f7 210 TIMER3_IRQHandler
<> 144:ef7eb2e8f9f7 211 UART0_IRQHandler
<> 144:ef7eb2e8f9f7 212 UART1_IRQHandler
<> 144:ef7eb2e8f9f7 213 UART2_IRQHandler
<> 144:ef7eb2e8f9f7 214 UART3_IRQHandler
<> 144:ef7eb2e8f9f7 215 PWM1_IRQHandler
<> 144:ef7eb2e8f9f7 216 I2C0_IRQHandler
<> 144:ef7eb2e8f9f7 217 I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 218 I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 219 ;SPIFI_IRQHandler ;not used
<> 144:ef7eb2e8f9f7 220 SSP0_IRQHandler
<> 144:ef7eb2e8f9f7 221 SSP1_IRQHandler
<> 144:ef7eb2e8f9f7 222 PLL0_IRQHandler
<> 144:ef7eb2e8f9f7 223 RTC_IRQHandler
<> 144:ef7eb2e8f9f7 224 EINT0_IRQHandler
<> 144:ef7eb2e8f9f7 225 EINT1_IRQHandler
<> 144:ef7eb2e8f9f7 226 EINT2_IRQHandler
<> 144:ef7eb2e8f9f7 227 EINT3_IRQHandler
<> 144:ef7eb2e8f9f7 228 ADC_IRQHandler
<> 144:ef7eb2e8f9f7 229 BOD_IRQHandler
<> 144:ef7eb2e8f9f7 230 USB_IRQHandler
<> 144:ef7eb2e8f9f7 231 CAN_IRQHandler
<> 144:ef7eb2e8f9f7 232 DMA_IRQHandler
<> 144:ef7eb2e8f9f7 233 I2S_IRQHandler
<> 144:ef7eb2e8f9f7 234 ENET_IRQHandler
<> 144:ef7eb2e8f9f7 235 MCI_IRQHandler
<> 144:ef7eb2e8f9f7 236 MCPWM_IRQHandler
<> 144:ef7eb2e8f9f7 237 QEI_IRQHandler
<> 144:ef7eb2e8f9f7 238 PLL1_IRQHandler
<> 144:ef7eb2e8f9f7 239 USBActivity_IRQHandler
<> 144:ef7eb2e8f9f7 240 CANActivity_IRQHandler
<> 144:ef7eb2e8f9f7 241 UART4_IRQHandler
<> 144:ef7eb2e8f9f7 242 SSP2_IRQHandler
<> 144:ef7eb2e8f9f7 243 LCD_IRQHandler
<> 144:ef7eb2e8f9f7 244 GPIO_IRQHandler
<> 144:ef7eb2e8f9f7 245 PWM0_IRQHandler
<> 144:ef7eb2e8f9f7 246 EEPROM_IRQHandler
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 B .
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 ENDP
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 ALIGN
<> 144:ef7eb2e8f9f7 254 END