teralytic / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h@147:30b64687e01f, 2016-09-16 (annotated)

Committer:
<>
Date:
Fri Sep 16 16:24:25 2016 +0100
Revision:
147:30b64687e01f
Parent:
144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v126

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file trim_map.h
<> 144:ef7eb2e8f9f7 4 * @brief trim register map
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 3727 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-09-14 14:38:34 +0530 (Mon, 14 Sep 2015) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 147:30b64687e01f 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 147:30b64687e01f 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 147:30b64687e01f 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 147:30b64687e01f 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 147:30b64687e01f 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 147:30b64687e01f 15 * if applicable the software license agreement. Do not use this software and/or
<> 147:30b64687e01f 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 147:30b64687e01f 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 147:30b64687e01f 18 * terms and conditions.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 25 * @endinternal
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * @ingroup trim
<> 144:ef7eb2e8f9f7 28 *
<> 144:ef7eb2e8f9f7 29 * @details
<> 144:ef7eb2e8f9f7 30 * <p>
<> 144:ef7eb2e8f9f7 31 * Rf and Analog control hw module register map
<> 144:ef7eb2e8f9f7 32 * </p>
<> 144:ef7eb2e8f9f7 33 */
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #ifndef TRIM_MAP_H_
<> 144:ef7eb2e8f9f7 36 #define TRIM_MAP_H_
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /*************************************************************************************************
<> 144:ef7eb2e8f9f7 39 * *
<> 144:ef7eb2e8f9f7 40 * Header files *
<> 144:ef7eb2e8f9f7 41 * *
<> 144:ef7eb2e8f9f7 42 *************************************************************************************************/
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #include "architecture.h"
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /**************************************************************************************************
<> 144:ef7eb2e8f9f7 47 * *
<> 144:ef7eb2e8f9f7 48 * Type definitions *
<> 144:ef7eb2e8f9f7 49 * *
<> 144:ef7eb2e8f9f7 50 **************************************************************************************************/
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 /** trim register map */
<> 144:ef7eb2e8f9f7 53 typedef struct { /**< REV B REV D */
<> 144:ef7eb2e8f9f7 54 __I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
<> 144:ef7eb2e8f9f7 55 __I uint32_t APP_RESERVED0; /**< 0x1FA4 0x1FA4 */
<> 144:ef7eb2e8f9f7 56 __I uint32_t APP_RESERVED1; /**< 0x1FA8 0x1FA8 */
<> 144:ef7eb2e8f9f7 57 #ifdef REVB
<> 144:ef7eb2e8f9f7 58 __I uint32_t TX_POWER; /**< 0x1FAC */
<> 144:ef7eb2e8f9f7 59 #endif
<> 144:ef7eb2e8f9f7 60 __I uint32_t TRIM_32K_EXT; /**< 0x1FB0 0x1FAC */
<> 144:ef7eb2e8f9f7 61 __I uint32_t TRIM_32M_EXT; /**< 0x1FB4 0x1FB0 */
<> 144:ef7eb2e8f9f7 62 #ifdef REVD
<> 144:ef7eb2e8f9f7 63 __I uint32_t FVVDH_COMP_TH; /**< 0x1FB4 */
<> 144:ef7eb2e8f9f7 64 #endif
<> 144:ef7eb2e8f9f7 65 union {
<> 144:ef7eb2e8f9f7 66 struct { /* Common to REV B & REV D */
<> 144:ef7eb2e8f9f7 67 __I uint32_t CHANNEL11:4;
<> 144:ef7eb2e8f9f7 68 __I uint32_t CHANNEL12:4;
<> 144:ef7eb2e8f9f7 69 __I uint32_t CHANNEL13:4;
<> 144:ef7eb2e8f9f7 70 __I uint32_t CHANNEL14:4;
<> 144:ef7eb2e8f9f7 71 __I uint32_t CHANNEL15:4;
<> 144:ef7eb2e8f9f7 72 __I uint32_t CHANNEL16:4;
<> 144:ef7eb2e8f9f7 73 __I uint32_t CHANNEL17:4;
<> 144:ef7eb2e8f9f7 74 __I uint32_t CHANNEL18:4;
<> 144:ef7eb2e8f9f7 75 } BITS;
<> 144:ef7eb2e8f9f7 76 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 77 } TX_VCO_LUT1; /**< 0x1FB8 */
<> 144:ef7eb2e8f9f7 78 union {
<> 144:ef7eb2e8f9f7 79 struct {
<> 144:ef7eb2e8f9f7 80 __I uint32_t CHANNEL19:4;
<> 144:ef7eb2e8f9f7 81 __I uint32_t CHANNEL20:4;
<> 144:ef7eb2e8f9f7 82 __I uint32_t CHANNEL21:4;
<> 144:ef7eb2e8f9f7 83 __I uint32_t CHANNEL22:4;
<> 144:ef7eb2e8f9f7 84 __I uint32_t CHANNEL23:4;
<> 144:ef7eb2e8f9f7 85 __I uint32_t CHANNEL24:4;
<> 144:ef7eb2e8f9f7 86 __I uint32_t CHANNEL25:4;
<> 144:ef7eb2e8f9f7 87 __I uint32_t CHANNEL26:4;
<> 144:ef7eb2e8f9f7 88 } BITS;
<> 144:ef7eb2e8f9f7 89 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 90 } TX_VCO_LUT2; /**< 0x1FBC */
<> 144:ef7eb2e8f9f7 91 union {
<> 144:ef7eb2e8f9f7 92 struct {
<> 144:ef7eb2e8f9f7 93 __I uint32_t CHANNEL11:4;
<> 144:ef7eb2e8f9f7 94 __I uint32_t CHANNEL12:4;
<> 144:ef7eb2e8f9f7 95 __I uint32_t CHANNEL13:4;
<> 144:ef7eb2e8f9f7 96 __I uint32_t CHANNEL14:4;
<> 144:ef7eb2e8f9f7 97 __I uint32_t CHANNEL15:4;
<> 144:ef7eb2e8f9f7 98 __I uint32_t CHANNEL16:4;
<> 144:ef7eb2e8f9f7 99 __I uint32_t CHANNEL17:4;
<> 144:ef7eb2e8f9f7 100 __I uint32_t CHANNEL18:4;
<> 144:ef7eb2e8f9f7 101 } BITS;
<> 144:ef7eb2e8f9f7 102 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 103 } RX_VCO_LUT1; /**< 0x1FC0 */
<> 144:ef7eb2e8f9f7 104 union {
<> 144:ef7eb2e8f9f7 105 struct {
<> 144:ef7eb2e8f9f7 106 __I uint32_t CHANNEL19:4;
<> 144:ef7eb2e8f9f7 107 __I uint32_t CHANNEL20:4;
<> 144:ef7eb2e8f9f7 108 __I uint32_t CHANNEL21:4;
<> 144:ef7eb2e8f9f7 109 __I uint32_t CHANNEL22:4;
<> 144:ef7eb2e8f9f7 110 __I uint32_t CHANNEL23:4;
<> 144:ef7eb2e8f9f7 111 __I uint32_t CHANNEL24:4;
<> 144:ef7eb2e8f9f7 112 __I uint32_t CHANNEL25:4;
<> 144:ef7eb2e8f9f7 113 __I uint32_t CHANNEL26:4;
<> 144:ef7eb2e8f9f7 114 } BITS;
<> 144:ef7eb2e8f9f7 115 __I uint32_t WORD;
<> 144:ef7eb2e8f9f7 116 } RX_VCO_LUT2; /**< 0x1FC4 */
<> 144:ef7eb2e8f9f7 117 __I uint32_t ON_RESERVED0; /**< 0x1FC8 */
<> 144:ef7eb2e8f9f7 118 __I uint32_t ON_RESERVED1; /**< 0x1FCC */
<> 144:ef7eb2e8f9f7 119 __I uint32_t ADC_OFFSET_TRIM; /**< 0x1FD0 */
<> 144:ef7eb2e8f9f7 120 __I uint32_t TX_PRE_CHIPS; /**< 0x1FD4 */
<> 144:ef7eb2e8f9f7 121 __I uint32_t TX_CHAIN_TRIM; /**< 0x1FD8 */
<> 144:ef7eb2e8f9f7 122 __I uint32_t PLL_VCO_TAP_LOCATION; /**< 0x1FDC */
<> 144:ef7eb2e8f9f7 123 __I uint32_t PLL_TRIM; /**< 0x1FE0 */
<> 144:ef7eb2e8f9f7 124 __I uint32_t RSSI_OFFSET; /**< 0x1FE4 */
<> 144:ef7eb2e8f9f7 125 __I uint32_t RX_CHAIN_TRIM; /**< 0x1FE8 */
<> 144:ef7eb2e8f9f7 126 __I uint32_t PMU_TRIM; /**< 0x1FEC */
<> 144:ef7eb2e8f9f7 127 __I uint32_t WR_SEED_RD_RAND; /**< 0x1FF0 */
<> 144:ef7eb2e8f9f7 128 __I uint32_t WAFER_LOCATION; /**< 0x1FF4 */
<> 144:ef7eb2e8f9f7 129 __I uint32_t LOT_NUMBER; /**< 0x1FF8 */
<> 144:ef7eb2e8f9f7 130 __I uint32_t REVISION_CODE; /**< 0x1FFC */
<> 144:ef7eb2e8f9f7 131 } TrimReg_t, *TrimReg_pt;
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 #endif /* TRIM_MAP_H_ */