teralytic / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/timer.h@147:30b64687e01f, 2016-09-16 (annotated)

Committer:
<>
Date:
Fri Sep 16 16:24:25 2016 +0100
Revision:
147:30b64687e01f
Parent:
144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v126

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file timer.h
<> 144:ef7eb2e8f9f7 4 * @brief (API) Public header of Timer driver
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev: 3725 $
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-09-14 14:36:27 +0530 (Mon, 14 Sep 2015) $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 147:30b64687e01f 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 147:30b64687e01f 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 147:30b64687e01f 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 147:30b64687e01f 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 147:30b64687e01f 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 147:30b64687e01f 15 * if applicable the software license agreement. Do not use this software and/or
<> 147:30b64687e01f 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 147:30b64687e01f 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 147:30b64687e01f 18 * terms and conditions.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 25 * @endinternal
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * @ingroup timer
<> 144:ef7eb2e8f9f7 28 *
<> 144:ef7eb2e8f9f7 29 * @details
<> 144:ef7eb2e8f9f7 30 *
<> 144:ef7eb2e8f9f7 31 * <h1> General description </h1>
<> 144:ef7eb2e8f9f7 32 * <p>
<> 144:ef7eb2e8f9f7 33 * The APB Timer module is a 16-bit down counter with a selectable <b>prescaler</b>.
<> 144:ef7eb2e8f9f7 34 * <b>Prescaler</b> values can be selected from 1 to 1024.
<> 144:ef7eb2e8f9f7 35 * (<b>prescaler</b> extends the range of the timer at the expense of precision)
<> 144:ef7eb2e8f9f7 36 * The Timer provides two modes of operation being <b>free running</b> and <b>periodic</b>.
<> 144:ef7eb2e8f9f7 37 * In <b>free running</b> mode, when the counter reaches zero it is decremented to 0xFFFF
<> 144:ef7eb2e8f9f7 38 * and no interrupt is generated.
<> 144:ef7eb2e8f9f7 39 * In <b>periodic</b>, when the counter reaches zero it is decremented to load value
<> 144:ef7eb2e8f9f7 40 * and an interruption is generated.
<> 144:ef7eb2e8f9f7 41 * </p>
<> 144:ef7eb2e8f9f7 42 *
<> 144:ef7eb2e8f9f7 43 */
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 #ifndef TIMER_H_
<> 144:ef7eb2e8f9f7 46 #define TIMER_H_
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 49 extern "C" {
<> 144:ef7eb2e8f9f7 50 #endif
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 //#include "driver.h"
<> 144:ef7eb2e8f9f7 53 #include "us_ticker_api.h"
<> 144:ef7eb2e8f9f7 54 #include "clock.h"
<> 144:ef7eb2e8f9f7 55 #include "timer_map.h"
<> 144:ef7eb2e8f9f7 56 #include "types.h"
<> 144:ef7eb2e8f9f7 57 #include "cmsis_nvic.h"
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* Miscellaneous I/O and control operations codes */
<> 144:ef7eb2e8f9f7 60 #define TIMER_IOCTL_GET_LOAD 1 /**< <b>Ioctl request code</b>: Getting load value. */
<> 144:ef7eb2e8f9f7 61 #define TIMER_IOCTL_SET_LOAD 2 /**< <b>Ioctl request code</b>: Seting load value. */
<> 144:ef7eb2e8f9f7 62 #define TIMER_IOCTL_GET_VALUE 3 /**< <b>Ioctl request code</b>: Getting current timer value. */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /* Timer control bits */
<> 144:ef7eb2e8f9f7 65 #define TIMER_ENABLE_BIT 0x1
<> 144:ef7eb2e8f9f7 66 #define TIMER_PRESCALE_BIT_POS 0x2
<> 144:ef7eb2e8f9f7 67 #define TIMER_MODE_BIT_POS 0x6
<> 144:ef7eb2e8f9f7 68 #define TIMER_ENABLE_BIT_POS 0x7
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 /* Options defines */
<> 144:ef7eb2e8f9f7 71 // TODO (MIV): put this in an enumerated value
<> 144:ef7eb2e8f9f7 72 typedef enum {
<> 144:ef7eb2e8f9f7 73 CLK_DIVIDER_1 = 0,
<> 144:ef7eb2e8f9f7 74 CLK_DIVIDER_2 = 3,
<> 144:ef7eb2e8f9f7 75 CLK_DIVIDER_8 = 4,
<> 144:ef7eb2e8f9f7 76 CLK_DIVIDER_16 = 1,
<> 144:ef7eb2e8f9f7 77 CLK_DIVIDER_32 = 5,
<> 144:ef7eb2e8f9f7 78 CLK_DIVIDER_128 = 6,
<> 144:ef7eb2e8f9f7 79 CLK_DIVIDER_256 = 2,
<> 144:ef7eb2e8f9f7 80 CLK_DIVIDER_1024 = 7
<> 144:ef7eb2e8f9f7 81 } ClockDivider;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 #define TIME_MODE_FREE_RUNNING 0x0
<> 144:ef7eb2e8f9f7 84 #define TIME_MODE_PERIODIC 0x1
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 typedef void (*timer_irq_handlers_t)(void) ;
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /** Options to be passed when opening a timer device instance.*/
<> 144:ef7eb2e8f9f7 89 typedef struct timer_options {
<> 144:ef7eb2e8f9f7 90 TimerReg_pt membase; /**< Memory base for the device's registers. */
<> 144:ef7eb2e8f9f7 91 uint8_t irq; /**< IRQ number of the IRQ associated to the device. */
<> 144:ef7eb2e8f9f7 92 boolean mode; /**< Timer mode:
<> 144:ef7eb2e8f9f7 93 * - 0 = Free Run mode (no interrupt generation)
<> 144:ef7eb2e8f9f7 94 * <b> # timer duration = (65535 + 1) * prescaler * peripheral clock (PCLK) period </b>
<> 144:ef7eb2e8f9f7 95 * - 1 = Periodic mode (interrupt generation)
<> 144:ef7eb2e8f9f7 96 * <b> # timer duration = (load + 1) * prescaler * peripheral clock (PCLK) period </b> */
<> 144:ef7eb2e8f9f7 97 uint8_t prescale; /**< Timer prescaler: from 1 to 1024.
<> 144:ef7eb2e8f9f7 98 * - CLK_DIVIDER_1 = clock not divided
<> 144:ef7eb2e8f9f7 99 * - CLK_DIVIDER_2 = clock is divided by 2
<> 144:ef7eb2e8f9f7 100 * - CLK_DIVIDER_8 = clock is divided by 8
<> 144:ef7eb2e8f9f7 101 * - CLK_DIVIDER_16 = clock is divided by 16
<> 144:ef7eb2e8f9f7 102 * - CLK_DIVIDER_32 = clock is divided by 32
<> 144:ef7eb2e8f9f7 103 * - CLK_DIVIDER_128 = clock is divided by 128
<> 144:ef7eb2e8f9f7 104 * - CLK_DIVIDER_256 = clock is divided by 256
<> 144:ef7eb2e8f9f7 105 * - CLK_DIVIDER_1024 = clock is divided by 1024 */
<> 144:ef7eb2e8f9f7 106 uint16_t load; /**< Timer load: from 0 to 65535. */
<> 144:ef7eb2e8f9f7 107 timer_irq_handlers_t handler; /**< Timer handler or call-back */
<> 144:ef7eb2e8f9f7 108 } timer_options_t, *timer_options_pt;
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /** Interrupt handler for timer devices; to be called from an actual ISR.
<> 144:ef7eb2e8f9f7 111 * @param membase Memory base for the device's registers
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113 void fTimerHandler(TimerReg_pt membase);
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 extern void us_timer_isr(void);
<> 144:ef7eb2e8f9f7 116 extern void us_ticker_isr(void);
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 119 }
<> 144:ef7eb2e8f9f7 120 #endif
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 #endif /* TIMER_H_ */