mbed library sources. Supersedes mbed-src.

Fork of mbed by teralytic

Committer:
<>
Date:
Fri Sep 16 16:24:25 2016 +0100
Revision:
147:30b64687e01f
Parent:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v126

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 //*****************************************************************************
<> 144:ef7eb2e8f9f7 2 // +--+
<> 144:ef7eb2e8f9f7 3 // | ++----+
<> 144:ef7eb2e8f9f7 4 // +-++ |
<> 144:ef7eb2e8f9f7 5 // | |
<> 144:ef7eb2e8f9f7 6 // +-+--+ |
<> 144:ef7eb2e8f9f7 7 // | +--+--+
<> 144:ef7eb2e8f9f7 8 // +----+ Copyright (c) 2012 Code Red Technologies Ltd.
<> 144:ef7eb2e8f9f7 9 //
<> 144:ef7eb2e8f9f7 10 // LPC407x_8x Microcontroller Startup code for use with Red Suite
<> 144:ef7eb2e8f9f7 11 //
<> 144:ef7eb2e8f9f7 12 // Version : 120624
<> 144:ef7eb2e8f9f7 13 //
<> 144:ef7eb2e8f9f7 14 // Software License Agreement
<> 144:ef7eb2e8f9f7 15 //
<> 144:ef7eb2e8f9f7 16 // The software is owned by Code Red Technologies and/or its suppliers, and is
<> 144:ef7eb2e8f9f7 17 // protected under applicable copyright laws. All rights are reserved. Any
<> 144:ef7eb2e8f9f7 18 // use in violation of the foregoing restrictions may subject the user to criminal
<> 144:ef7eb2e8f9f7 19 // sanctions under applicable laws, as well as to civil liability for the breach
<> 144:ef7eb2e8f9f7 20 // of the terms and conditions of this license.
<> 144:ef7eb2e8f9f7 21 //
<> 144:ef7eb2e8f9f7 22 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 23 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 24 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 25 // USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
<> 144:ef7eb2e8f9f7 26 // TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
<> 144:ef7eb2e8f9f7 27 // CODE RED TECHNOLOGIES LTD.
<> 144:ef7eb2e8f9f7 28 //
<> 144:ef7eb2e8f9f7 29 //*****************************************************************************
<> 144:ef7eb2e8f9f7 30 #if defined (__cplusplus)
<> 144:ef7eb2e8f9f7 31 #ifdef __REDLIB__
<> 144:ef7eb2e8f9f7 32 #error Redlib does not support C++
<> 144:ef7eb2e8f9f7 33 #else
<> 144:ef7eb2e8f9f7 34 //*****************************************************************************
<> 144:ef7eb2e8f9f7 35 //
<> 144:ef7eb2e8f9f7 36 // The entry point for the C++ library startup
<> 144:ef7eb2e8f9f7 37 //
<> 144:ef7eb2e8f9f7 38 //*****************************************************************************
<> 144:ef7eb2e8f9f7 39 extern "C" {
<> 144:ef7eb2e8f9f7 40 extern void __libc_init_array(void);
<> 144:ef7eb2e8f9f7 41 }
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43 #endif
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 #define WEAK __attribute__ ((weak))
<> 144:ef7eb2e8f9f7 46 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 //#if defined (__USE_CMSIS)
<> 144:ef7eb2e8f9f7 49 #include "LPC407x_8x_177x_8x.h"
<> 144:ef7eb2e8f9f7 50 //#endif
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 //*****************************************************************************
<> 144:ef7eb2e8f9f7 53 #if defined (__cplusplus)
<> 144:ef7eb2e8f9f7 54 extern "C" {
<> 144:ef7eb2e8f9f7 55 #endif
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 //*****************************************************************************
<> 144:ef7eb2e8f9f7 58 //
<> 144:ef7eb2e8f9f7 59 // Forward declaration of the default handlers. These are aliased.
<> 144:ef7eb2e8f9f7 60 // When the application defines a handler (with the same name), this will
<> 144:ef7eb2e8f9f7 61 // automatically take precedence over these weak definitions
<> 144:ef7eb2e8f9f7 62 //
<> 144:ef7eb2e8f9f7 63 //*****************************************************************************
<> 144:ef7eb2e8f9f7 64 void ResetISR(void);
<> 144:ef7eb2e8f9f7 65 WEAK void NMI_Handler(void);
<> 144:ef7eb2e8f9f7 66 WEAK void HardFault_Handler(void);
<> 144:ef7eb2e8f9f7 67 WEAK void MemManage_Handler(void);
<> 144:ef7eb2e8f9f7 68 WEAK void BusFault_Handler(void);
<> 144:ef7eb2e8f9f7 69 WEAK void UsageFault_Handler(void);
<> 144:ef7eb2e8f9f7 70 WEAK void SVC_Handler(void);
<> 144:ef7eb2e8f9f7 71 WEAK void DebugMon_Handler(void);
<> 144:ef7eb2e8f9f7 72 WEAK void PendSV_Handler(void);
<> 144:ef7eb2e8f9f7 73 WEAK void SysTick_Handler(void);
<> 144:ef7eb2e8f9f7 74 WEAK void IntDefaultHandler(void);
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 //*****************************************************************************
<> 144:ef7eb2e8f9f7 77 //
<> 144:ef7eb2e8f9f7 78 // Forward declaration of the specific IRQ handlers. These are aliased
<> 144:ef7eb2e8f9f7 79 // to the IntDefaultHandler, which is a 'forever' loop. When the application
<> 144:ef7eb2e8f9f7 80 // defines a handler (with the same name), this will automatically take
<> 144:ef7eb2e8f9f7 81 // precedence over these weak definitions
<> 144:ef7eb2e8f9f7 82 //
<> 144:ef7eb2e8f9f7 83 //*****************************************************************************
<> 144:ef7eb2e8f9f7 84 void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 85 void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 86 void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 87 void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 88 void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 89 void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 90 void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 91 void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 92 void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 93 void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 94 void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 95 void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 96 void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 97 void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 98 void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 99 void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 100 void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 101 void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 102 void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 103 void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 104 void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 105 void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 106 void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 107 void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 108 void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 109 void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 110 void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 111 void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 112 void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 113 void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 114 void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 115 void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 116 void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 117 void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 118 void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 119 void MCI_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 120 void UART4_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 121 void SSP2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 122 void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 123 void GPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 124 void PWM0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 125 void EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 //*****************************************************************************
<> 144:ef7eb2e8f9f7 128 //
<> 144:ef7eb2e8f9f7 129 // The entry point for the application.
<> 144:ef7eb2e8f9f7 130 // __main() is the entry point for Redlib based applications
<> 144:ef7eb2e8f9f7 131 // main() is the entry point for Newlib based applications
<> 144:ef7eb2e8f9f7 132 //
<> 144:ef7eb2e8f9f7 133 //*****************************************************************************
<> 144:ef7eb2e8f9f7 134 #if defined (__REDLIB__)
<> 144:ef7eb2e8f9f7 135 extern void __main(void);
<> 144:ef7eb2e8f9f7 136 #endif
<> 144:ef7eb2e8f9f7 137 extern int main(void);
<> 144:ef7eb2e8f9f7 138 //*****************************************************************************
<> 144:ef7eb2e8f9f7 139 //
<> 144:ef7eb2e8f9f7 140 // External declaration for the pointer to the stack top from the Linker Script
<> 144:ef7eb2e8f9f7 141 //
<> 144:ef7eb2e8f9f7 142 //*****************************************************************************
<> 144:ef7eb2e8f9f7 143 extern void _vStackTop(void);
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 //*****************************************************************************
<> 144:ef7eb2e8f9f7 146 #if defined (__cplusplus)
<> 144:ef7eb2e8f9f7 147 } // extern "C"
<> 144:ef7eb2e8f9f7 148 #endif
<> 144:ef7eb2e8f9f7 149 //*****************************************************************************
<> 144:ef7eb2e8f9f7 150 //
<> 144:ef7eb2e8f9f7 151 // The vector table.
<> 144:ef7eb2e8f9f7 152 // This relies on the linker script to place at correct location in memory.
<> 144:ef7eb2e8f9f7 153 //
<> 144:ef7eb2e8f9f7 154 //*****************************************************************************
<> 144:ef7eb2e8f9f7 155 extern void (* const g_pfnVectors[])(void);
<> 144:ef7eb2e8f9f7 156 __attribute__ ((section(".isr_vector")))
<> 144:ef7eb2e8f9f7 157 void (* const g_pfnVectors[])(void) = {
<> 144:ef7eb2e8f9f7 158 // Core Level - CM3
<> 144:ef7eb2e8f9f7 159 &_vStackTop, // The initial stack pointer
<> 144:ef7eb2e8f9f7 160 ResetISR, // The reset handler
<> 144:ef7eb2e8f9f7 161 NMI_Handler, // The NMI handler
<> 144:ef7eb2e8f9f7 162 HardFault_Handler, // The hard fault handler
<> 144:ef7eb2e8f9f7 163 MemManage_Handler, // The MPU fault handler
<> 144:ef7eb2e8f9f7 164 BusFault_Handler, // The bus fault handler
<> 144:ef7eb2e8f9f7 165 UsageFault_Handler, // The usage fault handler
<> 144:ef7eb2e8f9f7 166 0, // Reserved
<> 144:ef7eb2e8f9f7 167 0, // Reserved
<> 144:ef7eb2e8f9f7 168 0, // Reserved
<> 144:ef7eb2e8f9f7 169 0, // Reserved
<> 144:ef7eb2e8f9f7 170 SVC_Handler, // SVCall handler
<> 144:ef7eb2e8f9f7 171 DebugMon_Handler, // Debug monitor handler
<> 144:ef7eb2e8f9f7 172 0, // Reserved
<> 144:ef7eb2e8f9f7 173 PendSV_Handler, // The PendSV handler
<> 144:ef7eb2e8f9f7 174 SysTick_Handler, // The SysTick handler
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 // Chip Level - LPC17
<> 144:ef7eb2e8f9f7 177 WDT_IRQHandler, // 16, 0x40 - WDT
<> 144:ef7eb2e8f9f7 178 TIMER0_IRQHandler, // 17, 0x44 - TIMER0
<> 144:ef7eb2e8f9f7 179 TIMER1_IRQHandler, // 18, 0x48 - TIMER1
<> 144:ef7eb2e8f9f7 180 TIMER2_IRQHandler, // 19, 0x4c - TIMER2
<> 144:ef7eb2e8f9f7 181 TIMER3_IRQHandler, // 20, 0x50 - TIMER3
<> 144:ef7eb2e8f9f7 182 UART0_IRQHandler, // 21, 0x54 - UART0
<> 144:ef7eb2e8f9f7 183 UART1_IRQHandler, // 22, 0x58 - UART1
<> 144:ef7eb2e8f9f7 184 UART2_IRQHandler, // 23, 0x5c - UART2
<> 144:ef7eb2e8f9f7 185 UART3_IRQHandler, // 24, 0x60 - UART3
<> 144:ef7eb2e8f9f7 186 PWM1_IRQHandler, // 25, 0x64 - PWM1
<> 144:ef7eb2e8f9f7 187 I2C0_IRQHandler, // 26, 0x68 - I2C0
<> 144:ef7eb2e8f9f7 188 I2C1_IRQHandler, // 27, 0x6c - I2C1
<> 144:ef7eb2e8f9f7 189 I2C2_IRQHandler, // 28, 0x70 - I2C2
<> 144:ef7eb2e8f9f7 190 IntDefaultHandler, // 29, Not used
<> 144:ef7eb2e8f9f7 191 SSP0_IRQHandler, // 30, 0x78 - SSP0
<> 144:ef7eb2e8f9f7 192 SSP1_IRQHandler, // 31, 0x7c - SSP1
<> 144:ef7eb2e8f9f7 193 PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
<> 144:ef7eb2e8f9f7 194 RTC_IRQHandler, // 33, 0x84 - RTC
<> 144:ef7eb2e8f9f7 195 EINT0_IRQHandler, // 34, 0x88 - EINT0
<> 144:ef7eb2e8f9f7 196 EINT1_IRQHandler, // 35, 0x8c - EINT1
<> 144:ef7eb2e8f9f7 197 EINT2_IRQHandler, // 36, 0x90 - EINT2
<> 144:ef7eb2e8f9f7 198 EINT3_IRQHandler, // 37, 0x94 - EINT3
<> 144:ef7eb2e8f9f7 199 ADC_IRQHandler, // 38, 0x98 - ADC
<> 144:ef7eb2e8f9f7 200 BOD_IRQHandler, // 39, 0x9c - BOD
<> 144:ef7eb2e8f9f7 201 USB_IRQHandler, // 40, 0xA0 - USB
<> 144:ef7eb2e8f9f7 202 CAN_IRQHandler, // 41, 0xa4 - CAN
<> 144:ef7eb2e8f9f7 203 DMA_IRQHandler, // 42, 0xa8 - GP DMA
<> 144:ef7eb2e8f9f7 204 I2S_IRQHandler, // 43, 0xac - I2S
<> 144:ef7eb2e8f9f7 205 ENET_IRQHandler, // 44, 0xb0 - Ethernet
<> 144:ef7eb2e8f9f7 206 MCI_IRQHandler, // 45, 0xb4 - SD/MMC card I/F
<> 144:ef7eb2e8f9f7 207 MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
<> 144:ef7eb2e8f9f7 208 QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
<> 144:ef7eb2e8f9f7 209 PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
<> 144:ef7eb2e8f9f7 210 USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup
<> 144:ef7eb2e8f9f7 211 CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup
<> 144:ef7eb2e8f9f7 212 UART4_IRQHandler, // 51, 0xcc - UART4
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 SSP2_IRQHandler, // 52, 0xd0 - SSP2
<> 144:ef7eb2e8f9f7 215 LCD_IRQHandler, // 53, 0xd4 - LCD
<> 144:ef7eb2e8f9f7 216 GPIO_IRQHandler, // 54, 0xd8 - GPIO
<> 144:ef7eb2e8f9f7 217 PWM0_IRQHandler, // 55, 0xdc - PWM0
<> 144:ef7eb2e8f9f7 218 EEPROM_IRQHandler, // 56, 0xe0 - EEPROM
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 };
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 //*****************************************************************************
<> 144:ef7eb2e8f9f7 223 // Functions to carry out the initialization of RW and BSS data sections. These
<> 144:ef7eb2e8f9f7 224 // are written as separate functions rather than being inlined within the
<> 144:ef7eb2e8f9f7 225 // ResetISR() function in order to cope with MCUs with multiple banks of
<> 144:ef7eb2e8f9f7 226 // memory.
<> 144:ef7eb2e8f9f7 227 //*****************************************************************************
<> 144:ef7eb2e8f9f7 228 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 229 void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
<> 144:ef7eb2e8f9f7 230 unsigned int *pulDest = (unsigned int*) start;
<> 144:ef7eb2e8f9f7 231 unsigned int *pulSrc = (unsigned int*) romstart;
<> 144:ef7eb2e8f9f7 232 unsigned int loop;
<> 144:ef7eb2e8f9f7 233 for (loop = 0; loop < len; loop = loop + 4)
<> 144:ef7eb2e8f9f7 234 *pulDest++ = *pulSrc++;
<> 144:ef7eb2e8f9f7 235 }
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 238 void bss_init(unsigned int start, unsigned int len) {
<> 144:ef7eb2e8f9f7 239 unsigned int *pulDest = (unsigned int*) start;
<> 144:ef7eb2e8f9f7 240 unsigned int loop;
<> 144:ef7eb2e8f9f7 241 for (loop = 0; loop < len; loop = loop + 4)
<> 144:ef7eb2e8f9f7 242 *pulDest++ = 0;
<> 144:ef7eb2e8f9f7 243 }
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 //*****************************************************************************
<> 144:ef7eb2e8f9f7 246 // The following symbols are constructs generated by the linker, indicating
<> 144:ef7eb2e8f9f7 247 // the location of various points in the "Global Section Table". This table is
<> 144:ef7eb2e8f9f7 248 // created by the linker via the Code Red managed linker script mechanism. It
<> 144:ef7eb2e8f9f7 249 // contains the load address, execution address and length of each RW data
<> 144:ef7eb2e8f9f7 250 // section and the execution and length of each BSS (zero initialized) section.
<> 144:ef7eb2e8f9f7 251 //*****************************************************************************
<> 144:ef7eb2e8f9f7 252 extern unsigned int __data_section_table;
<> 144:ef7eb2e8f9f7 253 extern unsigned int __data_section_table_end;
<> 144:ef7eb2e8f9f7 254 extern unsigned int __bss_section_table;
<> 144:ef7eb2e8f9f7 255 extern unsigned int __bss_section_table_end;
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 //*****************************************************************************
<> 144:ef7eb2e8f9f7 258 // Reset entry point for your code.
<> 144:ef7eb2e8f9f7 259 // Sets up a simple runtime environment and initializes the C/C++
<> 144:ef7eb2e8f9f7 260 // library.
<> 144:ef7eb2e8f9f7 261 //*****************************************************************************
<> 144:ef7eb2e8f9f7 262
<> 147:30b64687e01f 263 extern "C" void software_init_hook(void);
<> 147:30b64687e01f 264 extern "C" void pre_main(void) __attribute__((weak));
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 267 void
<> 144:ef7eb2e8f9f7 268 ResetISR(void) {
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 //
<> 144:ef7eb2e8f9f7 271 // Copy the data sections from flash to SRAM.
<> 144:ef7eb2e8f9f7 272 //
<> 144:ef7eb2e8f9f7 273 unsigned int LoadAddr, ExeAddr, SectionLen;
<> 144:ef7eb2e8f9f7 274 unsigned int *SectionTableAddr;
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 // Load base address of Global Section Table
<> 144:ef7eb2e8f9f7 277 SectionTableAddr = &__data_section_table;
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 // Copy the data sections from flash to SRAM.
<> 144:ef7eb2e8f9f7 280 while (SectionTableAddr < &__data_section_table_end) {
<> 144:ef7eb2e8f9f7 281 LoadAddr = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 282 ExeAddr = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 283 SectionLen = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 284 data_init(LoadAddr, ExeAddr, SectionLen);
<> 144:ef7eb2e8f9f7 285 }
<> 144:ef7eb2e8f9f7 286 // At this point, SectionTableAddr = &__bss_section_table;
<> 144:ef7eb2e8f9f7 287 // Zero fill the bss segment
<> 144:ef7eb2e8f9f7 288 while (SectionTableAddr < &__bss_section_table_end) {
<> 144:ef7eb2e8f9f7 289 ExeAddr = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 290 SectionLen = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 291 bss_init(ExeAddr, SectionLen);
<> 144:ef7eb2e8f9f7 292 }
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 #if defined (__VFP_FP__) && !defined (__SOFTFP__)
<> 144:ef7eb2e8f9f7 295 /*
<> 144:ef7eb2e8f9f7 296 * Code to enable the Cortex-M4 FPU only included
<> 144:ef7eb2e8f9f7 297 * if appropriate build options have been selected.
<> 144:ef7eb2e8f9f7 298 * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
<> 144:ef7eb2e8f9f7 299 */
<> 144:ef7eb2e8f9f7 300 // Read CPACR (located at address 0xE000ED88)
<> 144:ef7eb2e8f9f7 301 // Set bits 20-23 to enable CP10 and CP11 coprocessors
<> 144:ef7eb2e8f9f7 302 // Write back the modified value to the CPACR
<> 144:ef7eb2e8f9f7 303 asm volatile ("LDR.W R0, =0xE000ED88\n\t"
<> 144:ef7eb2e8f9f7 304 "LDR R1, [R0]\n\t"
<> 144:ef7eb2e8f9f7 305 "ORR R1, R1, #(0xF << 20)\n\t"
<> 144:ef7eb2e8f9f7 306 "STR R1, [R0]");
<> 144:ef7eb2e8f9f7 307 #endif // (__VFP_FP__) && !(__SOFTFP__)
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 // Check to see if we are running the code from a non-zero
<> 144:ef7eb2e8f9f7 310 // address (eg RAM, external flash), in which case we need
<> 144:ef7eb2e8f9f7 311 // to modify the VTOR register to tell the CPU that the
<> 144:ef7eb2e8f9f7 312 // vector table is located at a non-0x0 address.
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 // Note that we do not use the CMSIS register access mechanism,
<> 144:ef7eb2e8f9f7 315 // as there is no guarantee that the project has been configured
<> 144:ef7eb2e8f9f7 316 // to use CMSIS.
<> 144:ef7eb2e8f9f7 317 unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
<> 144:ef7eb2e8f9f7 318 if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
<> 144:ef7eb2e8f9f7 319 // CMSIS : SCB->VTOR = <address of vector table>
<> 144:ef7eb2e8f9f7 320 *pSCB_VTOR = (unsigned int)g_pfnVectors;
<> 144:ef7eb2e8f9f7 321 }
<> 144:ef7eb2e8f9f7 322
<> 147:30b64687e01f 323 SystemInit();
<> 147:30b64687e01f 324 if (pre_main) { // give control to the RTOS
<> 147:30b64687e01f 325 software_init_hook(); // this will also call __libc_init_array
<> 147:30b64687e01f 326 }
<> 147:30b64687e01f 327 else { // for BareMetal (non-RTOS) build
<> 147:30b64687e01f 328 __libc_init_array();
<> 147:30b64687e01f 329 main();
<> 144:ef7eb2e8f9f7 330 #endif
<> 147:30b64687e01f 331 }
<> 144:ef7eb2e8f9f7 332 //
<> 144:ef7eb2e8f9f7 333 // main() shouldn't return, but if it does, we'll just enter an infinite loop
<> 144:ef7eb2e8f9f7 334 //
<> 144:ef7eb2e8f9f7 335 while (1) {
<> 144:ef7eb2e8f9f7 336 ;
<> 144:ef7eb2e8f9f7 337 }
<> 144:ef7eb2e8f9f7 338 }
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 //*****************************************************************************
<> 144:ef7eb2e8f9f7 341 // Default exception handlers. Override the ones here by defining your own
<> 144:ef7eb2e8f9f7 342 // handler routines in your application code.
<> 144:ef7eb2e8f9f7 343 //*****************************************************************************
<> 144:ef7eb2e8f9f7 344 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 345 void NMI_Handler(void)
<> 144:ef7eb2e8f9f7 346 {
<> 144:ef7eb2e8f9f7 347 while(1)
<> 144:ef7eb2e8f9f7 348 {
<> 144:ef7eb2e8f9f7 349 }
<> 144:ef7eb2e8f9f7 350 }
<> 144:ef7eb2e8f9f7 351 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 352 void HardFault_Handler(void)
<> 144:ef7eb2e8f9f7 353 {
<> 144:ef7eb2e8f9f7 354 while(1)
<> 144:ef7eb2e8f9f7 355 {
<> 144:ef7eb2e8f9f7 356 }
<> 144:ef7eb2e8f9f7 357 }
<> 144:ef7eb2e8f9f7 358 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 359 void MemManage_Handler(void)
<> 144:ef7eb2e8f9f7 360 {
<> 144:ef7eb2e8f9f7 361 while(1)
<> 144:ef7eb2e8f9f7 362 {
<> 144:ef7eb2e8f9f7 363 }
<> 144:ef7eb2e8f9f7 364 }
<> 144:ef7eb2e8f9f7 365 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 366 void BusFault_Handler(void)
<> 144:ef7eb2e8f9f7 367 {
<> 144:ef7eb2e8f9f7 368 while(1)
<> 144:ef7eb2e8f9f7 369 {
<> 144:ef7eb2e8f9f7 370 }
<> 144:ef7eb2e8f9f7 371 }
<> 144:ef7eb2e8f9f7 372 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 373 void UsageFault_Handler(void)
<> 144:ef7eb2e8f9f7 374 {
<> 144:ef7eb2e8f9f7 375 while(1)
<> 144:ef7eb2e8f9f7 376 {
<> 144:ef7eb2e8f9f7 377 }
<> 144:ef7eb2e8f9f7 378 }
<> 144:ef7eb2e8f9f7 379 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 380 void SVC_Handler(void)
<> 144:ef7eb2e8f9f7 381 {
<> 144:ef7eb2e8f9f7 382 while(1)
<> 144:ef7eb2e8f9f7 383 {
<> 144:ef7eb2e8f9f7 384 }
<> 144:ef7eb2e8f9f7 385 }
<> 144:ef7eb2e8f9f7 386 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 387 void DebugMon_Handler(void)
<> 144:ef7eb2e8f9f7 388 {
<> 144:ef7eb2e8f9f7 389 while(1)
<> 144:ef7eb2e8f9f7 390 {
<> 144:ef7eb2e8f9f7 391 }
<> 144:ef7eb2e8f9f7 392 }
<> 144:ef7eb2e8f9f7 393 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 394 void PendSV_Handler(void)
<> 144:ef7eb2e8f9f7 395 {
<> 144:ef7eb2e8f9f7 396 while(1)
<> 144:ef7eb2e8f9f7 397 {
<> 144:ef7eb2e8f9f7 398 }
<> 144:ef7eb2e8f9f7 399 }
<> 144:ef7eb2e8f9f7 400 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 401 void SysTick_Handler(void)
<> 144:ef7eb2e8f9f7 402 {
<> 144:ef7eb2e8f9f7 403 while(1)
<> 144:ef7eb2e8f9f7 404 {
<> 144:ef7eb2e8f9f7 405 }
<> 144:ef7eb2e8f9f7 406 }
<> 144:ef7eb2e8f9f7 407
<> 144:ef7eb2e8f9f7 408 //*****************************************************************************
<> 144:ef7eb2e8f9f7 409 //
<> 144:ef7eb2e8f9f7 410 // Processor ends up here if an unexpected interrupt occurs or a specific
<> 144:ef7eb2e8f9f7 411 // handler is not present in the application code.
<> 144:ef7eb2e8f9f7 412 //
<> 144:ef7eb2e8f9f7 413 //*****************************************************************************
<> 144:ef7eb2e8f9f7 414 __attribute__ ((section(".after_vectors")))
<> 144:ef7eb2e8f9f7 415 void IntDefaultHandler(void)
<> 144:ef7eb2e8f9f7 416 {
<> 144:ef7eb2e8f9f7 417 while(1)
<> 144:ef7eb2e8f9f7 418 {
<> 144:ef7eb2e8f9f7 419 }
<> 144:ef7eb2e8f9f7 420 }