Point Labs / RadioHeadLite

This driver is a stripped down version of the Radiohead 1.45 driver, and covers fewer radios. Threading and an event queue have been added to make the ISR's more stable across architectures. Specifically The STM32L4 parts

Dependents:   Threaded_LoRa_Modem

RHSPIDriver.cpp@7:250d1c72df36, 2021-06-23 (annotated)

Committer:
rlanders73
Date:
Wed Jun 23 15:53:12 2021 +0000
Revision:
7:250d1c72df36
Parent:
0:ab4e012489ef 
explicitly not disabling interrupts for mbed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
davidr99 0:ab4e012489ef 1 // RHSPIDriver.cpp
davidr99 0:ab4e012489ef 2 //
davidr99 0:ab4e012489ef 3 // Copyright (C) 2014 Mike McCauley
davidr99 0:ab4e012489ef 4 // $Id: RHSPIDriver.cpp,v 1.9 2014/05/03 00:20:36 mikem Exp $
davidr99 0:ab4e012489ef 5
davidr99 0:ab4e012489ef 6 #include <RHSPIDriver.h>
davidr99 0:ab4e012489ef 7
davidr99 0:ab4e012489ef 8 RHSPIDriver::RHSPIDriver(PINS slaveSelectPin, RHGenericSPI& spi)
davidr99 0:ab4e012489ef 9 :
davidr99 0:ab4e012489ef 10 _spi(spi),
davidr99 0:ab4e012489ef 11 _slaveSelectPin(slaveSelectPin)
davidr99 0:ab4e012489ef 12 {
davidr99 0:ab4e012489ef 13 }
davidr99 0:ab4e012489ef 14
davidr99 0:ab4e012489ef 15 bool RHSPIDriver::init()
davidr99 0:ab4e012489ef 16 {
davidr99 0:ab4e012489ef 17 // start the SPI library with the default speeds etc:
davidr99 0:ab4e012489ef 18 // On Arduino Due this defaults to SPI1 on the central group of 6 SPI pins
davidr99 0:ab4e012489ef 19 _spi.begin();
davidr99 0:ab4e012489ef 20
davidr99 0:ab4e012489ef 21 // Initialise the slave select pin
davidr99 0:ab4e012489ef 22 // On Maple, this must be _after_ spi.begin
davidr99 0:ab4e012489ef 23 #if (RH_PLATFORM != RH_PLATFORM_MBED)
davidr99 0:ab4e012489ef 24 pinMode(_slaveSelectPin, OUTPUT);
davidr99 0:ab4e012489ef 25 #endif
davidr99 0:ab4e012489ef 26 digitalWrite(_slaveSelectPin, HIGH);
davidr99 0:ab4e012489ef 27
davidr99 0:ab4e012489ef 28 delay(100);
davidr99 0:ab4e012489ef 29 return true;
davidr99 0:ab4e012489ef 30 }
davidr99 0:ab4e012489ef 31
davidr99 0:ab4e012489ef 32 uint8_t RHSPIDriver::spiRead(uint8_t reg)
davidr99 0:ab4e012489ef 33 {
davidr99 0:ab4e012489ef 34 uint8_t val;
davidr99 0:ab4e012489ef 35 ATOMIC_BLOCK_START;
davidr99 0:ab4e012489ef 36 digitalWrite(_slaveSelectPin, LOW);
davidr99 0:ab4e012489ef 37 _spi.transfer(reg & ~RH_SPI_WRITE_MASK); // Send the address with the write mask off
davidr99 0:ab4e012489ef 38 val = _spi.transfer(0); // The written value is ignored, reg value is read
davidr99 0:ab4e012489ef 39 digitalWrite(_slaveSelectPin, HIGH);
davidr99 0:ab4e012489ef 40 ATOMIC_BLOCK_END;
davidr99 0:ab4e012489ef 41 return val;
davidr99 0:ab4e012489ef 42 }
davidr99 0:ab4e012489ef 43
davidr99 0:ab4e012489ef 44 uint8_t RHSPIDriver::spiWrite(uint8_t reg, uint8_t val)
davidr99 0:ab4e012489ef 45 {
davidr99 0:ab4e012489ef 46 uint8_t status = 0;
davidr99 0:ab4e012489ef 47 ATOMIC_BLOCK_START;
davidr99 0:ab4e012489ef 48 digitalWrite(_slaveSelectPin, LOW);
davidr99 0:ab4e012489ef 49 status = _spi.transfer(reg | RH_SPI_WRITE_MASK); // Send the address with the write mask on
davidr99 0:ab4e012489ef 50 _spi.transfer(val); // New value follows
davidr99 0:ab4e012489ef 51 digitalWrite(_slaveSelectPin, HIGH);
davidr99 0:ab4e012489ef 52 ATOMIC_BLOCK_END;
davidr99 0:ab4e012489ef 53 return status;
davidr99 0:ab4e012489ef 54 }
davidr99 0:ab4e012489ef 55
davidr99 0:ab4e012489ef 56 uint8_t RHSPIDriver::spiBurstRead(uint8_t reg, uint8_t* dest, uint8_t len)
davidr99 0:ab4e012489ef 57 {
davidr99 0:ab4e012489ef 58 uint8_t status = 0;
davidr99 0:ab4e012489ef 59 ATOMIC_BLOCK_START;
davidr99 0:ab4e012489ef 60 digitalWrite(_slaveSelectPin, LOW);
davidr99 0:ab4e012489ef 61 status = _spi.transfer(reg & ~RH_SPI_WRITE_MASK); // Send the start address with the write mask off
davidr99 0:ab4e012489ef 62 while (len--)
davidr99 0:ab4e012489ef 63 *dest++ = _spi.transfer(0);
davidr99 0:ab4e012489ef 64 digitalWrite(_slaveSelectPin, HIGH);
davidr99 0:ab4e012489ef 65 ATOMIC_BLOCK_END;
davidr99 0:ab4e012489ef 66 return status;
davidr99 0:ab4e012489ef 67 }
davidr99 0:ab4e012489ef 68
davidr99 0:ab4e012489ef 69 uint8_t RHSPIDriver::spiBurstWrite(uint8_t reg, const uint8_t* src, uint8_t len)
davidr99 0:ab4e012489ef 70 {
davidr99 0:ab4e012489ef 71 uint8_t status = 0;
davidr99 0:ab4e012489ef 72 ATOMIC_BLOCK_START;
davidr99 0:ab4e012489ef 73 digitalWrite(_slaveSelectPin, LOW);
davidr99 0:ab4e012489ef 74 status = _spi.transfer(reg | RH_SPI_WRITE_MASK); // Send the start address with the write mask on
davidr99 0:ab4e012489ef 75 while (len--)
davidr99 0:ab4e012489ef 76 _spi.transfer(*src++);
davidr99 0:ab4e012489ef 77 digitalWrite(_slaveSelectPin, HIGH);
davidr99 0:ab4e012489ef 78 ATOMIC_BLOCK_END;
davidr99 0:ab4e012489ef 79 return status;
davidr99 0:ab4e012489ef 80 }
davidr99 0:ab4e012489ef 81
davidr99 0:ab4e012489ef 82
davidr99 0:ab4e012489ef 83