Pathfindr / Mbed OS mbed-os-PF-UWBBEACON_v1_dev

init

Dependencies:   aconno_I2C Lis2dh12 WatchdogTimer

DW1000/DW1000.h@58:8d4a354816b1, 2020-02-17 (annotated)

Committer:
pathfindr
Date:
Mon Feb 17 23:24:52 2020 +0000
Revision:
58:8d4a354816b1
usb

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pathfindr 58:8d4a354816b1 1 // Adapted from Matthias Grob & Manuel Stalder - ETH Zürich - 2015
pathfindr 58:8d4a354816b1 2
pathfindr 58:8d4a354816b1 3 #ifndef DW1000_H
pathfindr 58:8d4a354816b1 4 #define DW1000_H
pathfindr 58:8d4a354816b1 5
pathfindr 58:8d4a354816b1 6 #include "mbed.h"
pathfindr 58:8d4a354816b1 7
pathfindr 58:8d4a354816b1 8 // register addresses
pathfindr 58:8d4a354816b1 9 // Mnemonic Address Bytes Description
pathfindr 58:8d4a354816b1 10 #define DW1000_DEV_ID 0x00 // 4 Device Identifier – includes device type and revision information
pathfindr 58:8d4a354816b1 11 #define DW1000_EUI 0x01 // 8 Extended Unique Identifier
pathfindr 58:8d4a354816b1 12 #define DW1000_PANADR 0x03 // 4 PAN Identifier and Short Address
pathfindr 58:8d4a354816b1 13 #define DW1000_SYS_CFG 0x04 // 4 System Configuration bitmap
pathfindr 58:8d4a354816b1 14 #define DW1000_SYS_TIME 0x06 // 5 System Time Counter (40-bit)
pathfindr 58:8d4a354816b1 15 #define DW1000_TX_FCTRL 0x08 // 5 Transmit Frame Control
pathfindr 58:8d4a354816b1 16 #define DW1000_TX_BUFFER 0x09 // 1024 Transmit Data Buffer
pathfindr 58:8d4a354816b1 17 #define DW1000_DX_TIME 0x0A // 5 Delayed Send or Receive Time (40-bit)
pathfindr 58:8d4a354816b1 18 #define DW1000_RX_FWTO 0x0C // 2 Receive Frame Wait Timeout Period
pathfindr 58:8d4a354816b1 19 #define DW1000_SYS_CTRL 0x0D // 4 System Control Register
pathfindr 58:8d4a354816b1 20 #define DW1000_SYS_MASK 0x0E // 4 System Event Mask Register
pathfindr 58:8d4a354816b1 21 #define DW1000_SYS_STATUS 0x0F // 5 System Event Status Register
pathfindr 58:8d4a354816b1 22 #define DW1000_RX_FINFO 0x10 // 4 RX Frame Information (in double buffer set)
pathfindr 58:8d4a354816b1 23 #define DW1000_RX_BUFFER 0x11 // 1024 Receive Data Buffer (in double buffer set)
pathfindr 58:8d4a354816b1 24 #define DW1000_RX_FQUAL 0x12 // 8 Rx Frame Quality information (in double buffer set)
pathfindr 58:8d4a354816b1 25 #define DW1000_RX_TTCKI 0x13 // 4 Receiver Time Tracking Interval (in double buffer set)
pathfindr 58:8d4a354816b1 26 #define DW1000_RX_TTCKO 0x14 // 5 Receiver Time Tracking Offset (in double buffer set)
pathfindr 58:8d4a354816b1 27 #define DW1000_RX_TIME 0x15 // 14 Receive Message Time of Arrival (in double buffer set)
pathfindr 58:8d4a354816b1 28 #define DW1000_TX_TIME 0x17 // 10 Transmit Message Time of Sending (in double buffer set)
pathfindr 58:8d4a354816b1 29 #define DW1000_TX_ANTD 0x18 // 2 16-bit Delay from Transmit to Antenna
pathfindr 58:8d4a354816b1 30 #define DW1000_SYS_STATE 0x19 // 5 System State information
pathfindr 58:8d4a354816b1 31 #define DW1000_ACK_RESP_T 0x1A // 4 Acknowledgement Time and Response Time
pathfindr 58:8d4a354816b1 32 #define DW1000_RX_SNIFF 0x1D // 4 Pulsed Preamble Reception Configuration
pathfindr 58:8d4a354816b1 33 #define DW1000_TX_POWER 0x1E // 4 TX Power Control
pathfindr 58:8d4a354816b1 34 #define DW1000_CHAN_CTRL 0x1F // 4 Channel Control
pathfindr 58:8d4a354816b1 35 #define DW1000_USR_SFD 0x21 // 41 User-specified short/long TX/RX SFD sequences
pathfindr 58:8d4a354816b1 36 #define DW1000_AGC_CTRL 0x23 // 32 Automatic Gain Control configuration
pathfindr 58:8d4a354816b1 37 #define DW1000_EXT_SYNC 0x24 // 12 External synchronisation control.
pathfindr 58:8d4a354816b1 38 #define DW1000_ACC_MEM 0x25 // 4064 Read access to accumulator data
pathfindr 58:8d4a354816b1 39 #define DW1000_GPIO_CTRL 0x26 // 44 Peripheral register bus 1 access - GPIO control
pathfindr 58:8d4a354816b1 40 #define DW1000_DRX_CONF 0x27 // 44 Digital Receiver configuration
pathfindr 58:8d4a354816b1 41 #define DW1000_RF_CONF 0x28 // 58 Analog RF Configuration
pathfindr 58:8d4a354816b1 42 #define DW1000_TX_CAL 0x2A // 52 Transmitter calibration block
pathfindr 58:8d4a354816b1 43 #define DW1000_FS_CTRL 0x2B // 21 Frequency synthesiser control block
pathfindr 58:8d4a354816b1 44 #define DW1000_AON 0x2C // 12 Always-On register set
pathfindr 58:8d4a354816b1 45 #define DW1000_OTP_IF 0x2D // 18 One Time Programmable Memory Interface
pathfindr 58:8d4a354816b1 46 #define DW1000_LDE_CTRL 0x2E // - Leading edge detection control block
pathfindr 58:8d4a354816b1 47 #define DW1000_DIG_DIAG 0x2F // 41 Digital Diagnostics Interface
pathfindr 58:8d4a354816b1 48 #define DW1000_PMSC 0x36 // 48 Power Management System Control Block
pathfindr 58:8d4a354816b1 49
pathfindr 58:8d4a354816b1 50 #define DW1000_WRITE_FLAG 0x80 // First Bit of the address has to be 1 to indicate we want to write
pathfindr 58:8d4a354816b1 51 #define DW1000_SUBADDRESS_FLAG 0x40 // if we have a sub address second Bit has to be 1
pathfindr 58:8d4a354816b1 52 #define DW1000_2_SUBADDRESS_FLAG 0x80 // if we have a long sub adress (more than 7 Bit) we set this Bit in the first part
pathfindr 58:8d4a354816b1 53
pathfindr 58:8d4a354816b1 54
pathfindr 58:8d4a354816b1 55
pathfindr 58:8d4a354816b1 56 //#define SYS_STATUS_ALL_RX_ERR (SYS_STATUS_RXPHE | SYS_STATUS_RXFCE | SYS_STATUS_RXRFSL | SYS_STATUS_RXSFDTO | SYS_STATUS_AFFREJ | SYS_STATUS_LDEERR)
pathfindr 58:8d4a354816b1 57
pathfindr 58:8d4a354816b1 58
pathfindr 58:8d4a354816b1 59 class DW1000
pathfindr 58:8d4a354816b1 60 {
pathfindr 58:8d4a354816b1 61 public:
pathfindr 58:8d4a354816b1 62 const static float TIMEUNITS_TO_US = (1/(128*499.2f)); // conversion between the decawave timeunits (ca 15.65ps) to microseconds.
pathfindr 58:8d4a354816b1 63 const static float US_TO_TIMEUNITS = (128*499.2f); // conversion between microseconds to the decawave timeunits (ca 15.65ps).
pathfindr 58:8d4a354816b1 64 const static uint64_t CONST_2POWER40 = 1099511627776; // Time register in DW1000 is 40 bit so this is needed to detect overflows.
pathfindr 58:8d4a354816b1 65
pathfindr 58:8d4a354816b1 66 DW1000(PinName MOSI, PinName MISO, PinName SCLK, PinName CS, PinName IRQ, PinName RESET); // constructor, uses SPI class // constructor, uses SPI class
pathfindr 58:8d4a354816b1 67
pathfindr 58:8d4a354816b1 68 void setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)); // setter for callback functions, automatically enables interrupt, if NULL is passed the coresponding interrupt gets disabled
pathfindr 58:8d4a354816b1 69 template<typename T>
pathfindr 58:8d4a354816b1 70 void setCallbacks(T* tptr, void (T::*mptrRX)(void), void (T::*mptrTX)(void))
pathfindr 58:8d4a354816b1 71 { // overloaded setter to treat member function pointers of objects
pathfindr 58:8d4a354816b1 72 callbackRX.attach(tptr, mptrRX); // possible client code: dw.setCallbacks(this, &A::callbackRX, &A::callbackTX);
pathfindr 58:8d4a354816b1 73 callbackTX.attach(tptr, mptrTX); // concept seen in line 100 of http://developer.mbed.org/users/mbed_official/code/mbed/docs/4fc01daae5a5/InterruptIn_8h_source.html
pathfindr 58:8d4a354816b1 74 setInterrupt(true,true);
pathfindr 58:8d4a354816b1 75 }
pathfindr 58:8d4a354816b1 76
pathfindr 58:8d4a354816b1 77 // Device API
pathfindr 58:8d4a354816b1 78 uint32_t getDeviceID(); // gets the Device ID which should be 0xDECA0130 (good for testing SPI!)
pathfindr 58:8d4a354816b1 79 uint64_t getEUI(); // gets 64 bit Extended Unique Identifier according to IEEE standard
pathfindr 58:8d4a354816b1 80 void setEUI(uint64_t EUI); // sets 64 bit Extended Unique Identifier according to IEEE standard
pathfindr 58:8d4a354816b1 81 float getVoltage(); // gets the current chip voltage measurement form the A/D converter
pathfindr 58:8d4a354816b1 82 uint64_t getStatus(); // get the 40 bit device status
pathfindr 58:8d4a354816b1 83 bool hasTransmissionStarted(); // check if frame transmission has started
pathfindr 58:8d4a354816b1 84 bool hasSentPreamble(); // check if preamble has been sent
pathfindr 58:8d4a354816b1 85 bool hasSentPHYHeader(); // check if PHY header has been sent
pathfindr 58:8d4a354816b1 86 bool hasSentFrame(); // check if frame has been sent completely
pathfindr 58:8d4a354816b1 87 bool hasReceivedFrame();
pathfindr 58:8d4a354816b1 88 void clearReceivedFlag();
pathfindr 58:8d4a354816b1 89 void clearSentFlag();
pathfindr 58:8d4a354816b1 90 uint64_t getSYSTimestamp();
pathfindr 58:8d4a354816b1 91 uint64_t getRXTimestamp();
pathfindr 58:8d4a354816b1 92 uint64_t getTXTimestamp();
pathfindr 58:8d4a354816b1 93 float getSYSTimestampUS();
pathfindr 58:8d4a354816b1 94 float getRXTimestampUS();
pathfindr 58:8d4a354816b1 95 float getTXTimestampUS();
pathfindr 58:8d4a354816b1 96
pathfindr 58:8d4a354816b1 97 uint16_t getStdNoise();
pathfindr 58:8d4a354816b1 98 uint16_t getPACC();
pathfindr 58:8d4a354816b1 99 uint16_t getFPINDEX();
pathfindr 58:8d4a354816b1 100 uint16_t getFPAMPL1();
pathfindr 58:8d4a354816b1 101 uint16_t getFPAMPL2();
pathfindr 58:8d4a354816b1 102 uint16_t getFPAMPL3();
pathfindr 58:8d4a354816b1 103 uint16_t getCIRPWR();
pathfindr 58:8d4a354816b1 104 uint8_t getPRF();
pathfindr 58:8d4a354816b1 105
pathfindr 58:8d4a354816b1 106 void sendString(char* message); // to send String with arbitrary length
pathfindr 58:8d4a354816b1 107 void receiveString(char* message); // to receive char string (length of the buffer must be 1021 to be safe)
pathfindr 58:8d4a354816b1 108 void sendFrame(uint8_t* message, uint16_t length); // send a raw frame (length in bytes)
pathfindr 58:8d4a354816b1 109 void sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp);
pathfindr 58:8d4a354816b1 110 uint16_t getFramelength(); // to get the framelength of the received frame from the PHY header
pathfindr 58:8d4a354816b1 111 void startRX(); // start listening for frames
pathfindr 58:8d4a354816b1 112 void stopTRX(); // disable tranceiver go back to idle mode
pathfindr 58:8d4a354816b1 113
pathfindr 58:8d4a354816b1 114 static void hardwareReset(PinName reset_pin);
pathfindr 58:8d4a354816b1 115 static void hardwareReset(DigitalInOut& reset_pin);
pathfindr 58:8d4a354816b1 116 void softwareReset();
pathfindr 58:8d4a354816b1 117
pathfindr 58:8d4a354816b1 118 uint8_t readRegister8(uint8_t reg, uint16_t subaddress); // expressive methods to read or write the number of bits written in the name
pathfindr 58:8d4a354816b1 119 uint16_t readRegister16(uint8_t reg, uint16_t subaddress);
pathfindr 58:8d4a354816b1 120 uint32_t readRegister32(uint8_t reg, uint16_t subaddress);
pathfindr 58:8d4a354816b1 121 uint64_t readRegister40(uint8_t reg, uint16_t subaddress);
pathfindr 58:8d4a354816b1 122 void writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer);
pathfindr 58:8d4a354816b1 123 void writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer);
pathfindr 58:8d4a354816b1 124 void writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer);
pathfindr 58:8d4a354816b1 125 void writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer);
pathfindr 58:8d4a354816b1 126 void readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // reads the selected part of a slave register into the buffer memory
pathfindr 58:8d4a354816b1 127 void writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // writes the buffer memory to the selected slave register
pathfindr 58:8d4a354816b1 128
pathfindr 58:8d4a354816b1 129 private:
pathfindr 58:8d4a354816b1 130 void loadLDE(); // load the leading edge detection algorithm to RAM, [IMPORTANT because receiving malfunction may occur] see User Manual LDELOAD on p22 & p158
pathfindr 58:8d4a354816b1 131 void resetRX(); // soft reset only the tranciever part of DW1000
pathfindr 58:8d4a354816b1 132 void resetAll(); // soft reset the entire DW1000 (some registers stay as they were see User Manual)
pathfindr 58:8d4a354816b1 133
pathfindr 58:8d4a354816b1 134 // Interrupt
pathfindr 58:8d4a354816b1 135 InterruptIn irq;
pathfindr 58:8d4a354816b1 136 FunctionPointer callbackRX; // function pointer to callback which is called when successfull RX took place
pathfindr 58:8d4a354816b1 137 FunctionPointer callbackTX; // function pointer to callback which is called when successfull TX took place
pathfindr 58:8d4a354816b1 138 void setInterrupt(bool RX, bool TX); // set Interrupt for received a good frame (CRC ok) or transmission done
pathfindr 58:8d4a354816b1 139 void ISR(); // interrupt handling method (also calls according callback methods)
pathfindr 58:8d4a354816b1 140
pathfindr 58:8d4a354816b1 141 // SPI Inteface
pathfindr 58:8d4a354816b1 142 SPI spi; // SPI Bus
pathfindr 58:8d4a354816b1 143 DigitalOut cs; // Slave selector for SPI-Bus (here explicitly needed to start and end SPI transactions also usable to wake up DW1000)
pathfindr 58:8d4a354816b1 144 DigitalInOut reset;
pathfindr 58:8d4a354816b1 145
pathfindr 58:8d4a354816b1 146 void setupTransaction(uint8_t reg, uint16_t subaddress, bool write); // sets up an SPI read or write transaction with correct register address and offset
pathfindr 58:8d4a354816b1 147 void select(); // selects the only slave for a transaction
pathfindr 58:8d4a354816b1 148 void deselect();
pathfindr 58:8d4a354816b1 149 };
pathfindr 58:8d4a354816b1 150
pathfindr 58:8d4a354816b1 151 #endif