PES4 / Mbed OS Queue_02

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mbed-os/targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/us_ticker.c@0:6bf0743ece18, 2020-03-28 (annotated)

Committer:
demayer
Date:
Sat Mar 28 15:28:19 2020 +0000
Revision:
0:6bf0743ece18
IMU Thread with an event-queue running parallel to handle tasks like a 5 times blinking LED. Button with interrupt detected.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
demayer 0:6bf0743ece18 1 /* mbed Microcontroller Library
demayer 0:6bf0743ece18 2 * Copyright (c) 2006-2013 ARM Limited
demayer 0:6bf0743ece18 3 *
demayer 0:6bf0743ece18 4 * Licensed under the Apache License, Version 2.0 (the "License");
demayer 0:6bf0743ece18 5 * you may not use this file except in compliance with the License.
demayer 0:6bf0743ece18 6 * You may obtain a copy of the License at
demayer 0:6bf0743ece18 7 *
demayer 0:6bf0743ece18 8 * http://www.apache.org/licenses/LICENSE-2.0
demayer 0:6bf0743ece18 9 *
demayer 0:6bf0743ece18 10 * Unless required by applicable law or agreed to in writing, software
demayer 0:6bf0743ece18 11 * distributed under the License is distributed on an "AS IS" BASIS,
demayer 0:6bf0743ece18 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
demayer 0:6bf0743ece18 13 * See the License for the specific language governing permissions and
demayer 0:6bf0743ece18 14 * limitations under the License.
demayer 0:6bf0743ece18 15 */
demayer 0:6bf0743ece18 16 #include <stddef.h>
demayer 0:6bf0743ece18 17 #include "us_ticker_api.h"
demayer 0:6bf0743ece18 18 #include "PeripheralNames.h"
demayer 0:6bf0743ece18 19 #include "ostm_iodefine.h"
demayer 0:6bf0743ece18 20
demayer 0:6bf0743ece18 21 #include "RZ_A1_Init.h"
demayer 0:6bf0743ece18 22 #include "VKRZA1H.h"
demayer 0:6bf0743ece18 23
demayer 0:6bf0743ece18 24 #define US_TICKER_TIMER_IRQn (OSTMI1TINT_IRQn)
demayer 0:6bf0743ece18 25 #define CPG_STBCR5_BIT_MSTP50 (0x01u) /* OSTM1 */
demayer 0:6bf0743ece18 26
demayer 0:6bf0743ece18 27 #define US_TICKER_CLOCK_US_DEV (1000000)
demayer 0:6bf0743ece18 28
demayer 0:6bf0743ece18 29 int us_ticker_inited = 0;
demayer 0:6bf0743ece18 30 static double count_clock = 0;
demayer 0:6bf0743ece18 31 static uint32_t last_read = 0;
demayer 0:6bf0743ece18 32 static uint32_t wrap_arround = 0;
demayer 0:6bf0743ece18 33 static uint64_t ticker_us_last64 = 0;
demayer 0:6bf0743ece18 34
demayer 0:6bf0743ece18 35 void us_ticker_interrupt(void) {
demayer 0:6bf0743ece18 36 us_ticker_irq_handler();
demayer 0:6bf0743ece18 37 }
demayer 0:6bf0743ece18 38
demayer 0:6bf0743ece18 39 void us_ticker_init(void) {
demayer 0:6bf0743ece18 40 if (us_ticker_inited) return;
demayer 0:6bf0743ece18 41 us_ticker_inited = 1;
demayer 0:6bf0743ece18 42
demayer 0:6bf0743ece18 43 /* set Counter Clock(us) */
demayer 0:6bf0743ece18 44 if (false == RZ_A1_IsClockMode0()) {
demayer 0:6bf0743ece18 45 count_clock = ((double)CM1_RENESAS_RZ_A1_P0_CLK / (double)US_TICKER_CLOCK_US_DEV);
demayer 0:6bf0743ece18 46 } else {
demayer 0:6bf0743ece18 47 count_clock = ((double)CM0_RENESAS_RZ_A1_P0_CLK / (double)US_TICKER_CLOCK_US_DEV);
demayer 0:6bf0743ece18 48 }
demayer 0:6bf0743ece18 49
demayer 0:6bf0743ece18 50 /* Power Control for Peripherals */
demayer 0:6bf0743ece18 51 CPGSTBCR5 &= ~(CPG_STBCR5_BIT_MSTP50); /* enable OSTM1 clock */
demayer 0:6bf0743ece18 52
demayer 0:6bf0743ece18 53 // timer settings
demayer 0:6bf0743ece18 54 OSTM1TT = 0x01; /* Stop the counter and clears the OSTM1TE bit. */
demayer 0:6bf0743ece18 55 OSTM1CTL = 0x02; /* Free running timer mode. Interrupt disabled when star counter */
demayer 0:6bf0743ece18 56
demayer 0:6bf0743ece18 57 OSTM1TS = 0x1; /* Start the counter and sets the OSTM0TE bit. */
demayer 0:6bf0743ece18 58
demayer 0:6bf0743ece18 59 // INTC settings
demayer 0:6bf0743ece18 60 InterruptHandlerRegister(US_TICKER_TIMER_IRQn, (void (*)(uint32_t))us_ticker_interrupt);
demayer 0:6bf0743ece18 61 GIC_SetPriority(US_TICKER_TIMER_IRQn, 5);
demayer 0:6bf0743ece18 62 GIC_EnableIRQ(US_TICKER_TIMER_IRQn);
demayer 0:6bf0743ece18 63 }
demayer 0:6bf0743ece18 64
demayer 0:6bf0743ece18 65 static uint64_t ticker_read_counter64(void) {
demayer 0:6bf0743ece18 66 uint32_t cnt_val;
demayer 0:6bf0743ece18 67 uint64_t cnt_val64;
demayer 0:6bf0743ece18 68
demayer 0:6bf0743ece18 69 if (!us_ticker_inited)
demayer 0:6bf0743ece18 70 us_ticker_init();
demayer 0:6bf0743ece18 71
demayer 0:6bf0743ece18 72 /* read counter */
demayer 0:6bf0743ece18 73 cnt_val = OSTM1CNT;
demayer 0:6bf0743ece18 74 if (last_read > cnt_val) {
demayer 0:6bf0743ece18 75 wrap_arround++;
demayer 0:6bf0743ece18 76 }
demayer 0:6bf0743ece18 77 last_read = cnt_val;
demayer 0:6bf0743ece18 78 cnt_val64 = ((uint64_t)wrap_arround << 32) + cnt_val;
demayer 0:6bf0743ece18 79
demayer 0:6bf0743ece18 80 return cnt_val64;
demayer 0:6bf0743ece18 81 }
demayer 0:6bf0743ece18 82
demayer 0:6bf0743ece18 83 uint32_t us_ticker_read() {
demayer 0:6bf0743ece18 84 uint64_t cnt_val64;
demayer 0:6bf0743ece18 85 uint64_t us_val64;
demayer 0:6bf0743ece18 86 int check_irq_masked;
demayer 0:6bf0743ece18 87
demayer 0:6bf0743ece18 88 #if defined ( __ICCARM__)
demayer 0:6bf0743ece18 89 check_irq_masked = __disable_irq_iar();
demayer 0:6bf0743ece18 90 #else
demayer 0:6bf0743ece18 91 check_irq_masked = __disable_irq();
demayer 0:6bf0743ece18 92 #endif /* __ICCARM__ */
demayer 0:6bf0743ece18 93
demayer 0:6bf0743ece18 94 cnt_val64 = ticker_read_counter64();
demayer 0:6bf0743ece18 95 us_val64 = (cnt_val64 / count_clock);
demayer 0:6bf0743ece18 96 ticker_us_last64 = us_val64;
demayer 0:6bf0743ece18 97
demayer 0:6bf0743ece18 98 if (!check_irq_masked) {
demayer 0:6bf0743ece18 99 __enable_irq();
demayer 0:6bf0743ece18 100 }
demayer 0:6bf0743ece18 101
demayer 0:6bf0743ece18 102 /* clock to us */
demayer 0:6bf0743ece18 103 return (uint32_t)us_val64;
demayer 0:6bf0743ece18 104 }
demayer 0:6bf0743ece18 105
demayer 0:6bf0743ece18 106 void us_ticker_set_interrupt(timestamp_t timestamp) {
demayer 0:6bf0743ece18 107 // set match value
demayer 0:6bf0743ece18 108 uint64_t timestamp64;
demayer 0:6bf0743ece18 109 uint64_t set_cmp_val64;
demayer 0:6bf0743ece18 110 volatile uint32_t set_cmp_val;
demayer 0:6bf0743ece18 111 uint64_t count_val_64;
demayer 0:6bf0743ece18 112
demayer 0:6bf0743ece18 113 /* calc compare mach timestamp */
demayer 0:6bf0743ece18 114 timestamp64 = (ticker_us_last64 & 0xFFFFFFFF00000000) + timestamp;
demayer 0:6bf0743ece18 115 if (timestamp < (ticker_us_last64 & 0x00000000FFFFFFFF)) {
demayer 0:6bf0743ece18 116 /* This event is wrap arround */
demayer 0:6bf0743ece18 117 timestamp64 += 0x100000000;
demayer 0:6bf0743ece18 118 }
demayer 0:6bf0743ece18 119
demayer 0:6bf0743ece18 120 /* calc compare mach timestamp */
demayer 0:6bf0743ece18 121 set_cmp_val64 = timestamp64 * count_clock;
demayer 0:6bf0743ece18 122 set_cmp_val = (uint32_t)(set_cmp_val64 & 0x00000000FFFFFFFF);
demayer 0:6bf0743ece18 123 count_val_64 = ticker_read_counter64();
demayer 0:6bf0743ece18 124 if (set_cmp_val64 <= (count_val_64 + 500)) {
demayer 0:6bf0743ece18 125 GIC_SetPendingIRQ(US_TICKER_TIMER_IRQn);
demayer 0:6bf0743ece18 126 GIC_EnableIRQ(US_TICKER_TIMER_IRQn);
demayer 0:6bf0743ece18 127 return;
demayer 0:6bf0743ece18 128 }
demayer 0:6bf0743ece18 129 OSTM1CMP = set_cmp_val;
demayer 0:6bf0743ece18 130 GIC_EnableIRQ(US_TICKER_TIMER_IRQn);
demayer 0:6bf0743ece18 131 }
demayer 0:6bf0743ece18 132
demayer 0:6bf0743ece18 133 void us_ticker_fire_interrupt(void) {
demayer 0:6bf0743ece18 134 GIC_SetPendingIRQ(US_TICKER_TIMER_IRQn);
demayer 0:6bf0743ece18 135 }
demayer 0:6bf0743ece18 136
demayer 0:6bf0743ece18 137 void us_ticker_disable_interrupt(void) {
demayer 0:6bf0743ece18 138 GIC_DisableIRQ(US_TICKER_TIMER_IRQn);
demayer 0:6bf0743ece18 139 }
demayer 0:6bf0743ece18 140
demayer 0:6bf0743ece18 141 void us_ticker_clear_interrupt(void) {
demayer 0:6bf0743ece18 142 GIC_ClearPendingIRQ(US_TICKER_TIMER_IRQn);
demayer 0:6bf0743ece18 143 }