PES 4 - Smart Medication Dispenser / PES4_ProgrammeforDesignReview2

Dependencies:   SDFileSystem mbed

Fork of PES4_Programme by PES 4 - Smart Medication Dispenser

Committer:
aeschsim
Date:
Wed Apr 11 15:19:22 2018 +0000
Revision:
95:b02e1b2a6cbd
Parent:
94:b24d2b432b27
demo tool is running now, changed setRGB

Who changed what in which revision?

UserRevisionLine numberNew contents of line
itslinear 89:f63e4736d875 1 #include "serialConnection.h"
aeschsim 95:b02e1b2a6cbd 2 /*
cittecla 93:32cd0af29c2b 3 Serial pc(USBTX, USBRX);
cittecla 93:32cd0af29c2b 4
cittecla 93:32cd0af29c2b 5 void setBaud()
cittecla 93:32cd0af29c2b 6 {
cittecla 93:32cd0af29c2b 7 pc.baud(460800);
cittecla 93:32cd0af29c2b 8 }
cittecla 93:32cd0af29c2b 9
cittecla 93:32cd0af29c2b 10 void attachSerialInterrupts()
cittecla 93:32cd0af29c2b 11 {
itslinear 89:f63e4736d875 12 // Setup a serial interrupt function to receive data
itslinear 89:f63e4736d875 13 pc.attach(&Rx_interrupt, Serial::RxIrq);
itslinear 89:f63e4736d875 14 // Setup a serial interrupt function to transmit data
itslinear 89:f63e4736d875 15 pc.attach(&Tx_interrupt, Serial::TxIrq);
cittecla 93:32cd0af29c2b 16 }
cittecla 93:32cd0af29c2b 17
cittecla 93:32cd0af29c2b 18 // Interupt Routine to read in data from serial port
cittecla 93:32cd0af29c2b 19 void Rx_interrupt()
cittecla 93:32cd0af29c2b 20 {
cittecla 93:32cd0af29c2b 21 // Loop just in case more than one character is in UART's receive FIFO buffer
cittecla 93:32cd0af29c2b 22 // Stop if buffer full
cittecla 93:32cd0af29c2b 23 while ((pc.readable()) && (((rx_in + 1) % buffer_size) != rx_out)) {
cittecla 93:32cd0af29c2b 24 rx_buffer[rx_in] = pc.getc();
cittecla 93:32cd0af29c2b 25 rx_in = (rx_in + 1) % buffer_size;
cittecla 93:32cd0af29c2b 26 }
cittecla 93:32cd0af29c2b 27 return;
cittecla 93:32cd0af29c2b 28 }
cittecla 93:32cd0af29c2b 29
cittecla 93:32cd0af29c2b 30
cittecla 93:32cd0af29c2b 31 // Interupt Routine to write out data to serial port
cittecla 93:32cd0af29c2b 32 void Tx_interrupt()
cittecla 93:32cd0af29c2b 33 {
cittecla 93:32cd0af29c2b 34 // Loop to fill more than one character in UART's transmit FIFO buffer
cittecla 93:32cd0af29c2b 35 // Stop if buffer empty
cittecla 93:32cd0af29c2b 36 while ((pc.writeable()) && (tx_in != tx_out)) {
cittecla 93:32cd0af29c2b 37 pc.putc(tx_buffer[tx_out]);
cittecla 93:32cd0af29c2b 38 tx_out = (tx_out + 1) % buffer_size;
cittecla 93:32cd0af29c2b 39 }
cittecla 93:32cd0af29c2b 40 return;
cittecla 93:32cd0af29c2b 41 }
itslinear 89:f63e4736d875 42
itslinear 89:f63e4736d875 43
itslinear 89:f63e4736d875 44 // Copy tx line buffer to large tx buffer for tx interrupt routine
itslinear 89:f63e4736d875 45 void send_line()
itslinear 89:f63e4736d875 46 {
itslinear 89:f63e4736d875 47 int i;
itslinear 89:f63e4736d875 48 char temp_char;
itslinear 89:f63e4736d875 49 bool empty;
itslinear 89:f63e4736d875 50 i = 0;
itslinear 89:f63e4736d875 51
itslinear 89:f63e4736d875 52 // Start Critical Section - don't interrupt while changing global buffer variables
cittecla 94:b24d2b432b27 53 NVIC_DisableIRQ(UART0_IRQn);
itslinear 89:f63e4736d875 54 empty = (tx_in == tx_out);
itslinear 89:f63e4736d875 55 while ((i==0) || (tx_line[i-1] != '\n')) {
itslinear 89:f63e4736d875 56 // Wait if buffer full
itslinear 89:f63e4736d875 57 if (((tx_in + 1) % buffer_size) == tx_out) {
itslinear 89:f63e4736d875 58 // End Critical Section - need to let interrupt routine empty buffer by sending
itslinear 89:f63e4736d875 59 NVIC_EnableIRQ(UART1_IRQn);
itslinear 89:f63e4736d875 60 while (((tx_in + 1) % buffer_size) == tx_out) {
itslinear 89:f63e4736d875 61 }
itslinear 89:f63e4736d875 62 // Start Critical Section - don't interrupt while changing global buffer variables
itslinear 89:f63e4736d875 63 NVIC_DisableIRQ(UART1_IRQn);
itslinear 89:f63e4736d875 64 }
itslinear 89:f63e4736d875 65 tx_buffer[tx_in] = tx_line[i];
itslinear 89:f63e4736d875 66 i++;
itslinear 89:f63e4736d875 67 tx_in = (tx_in + 1) % buffer_size;
itslinear 89:f63e4736d875 68 }
itslinear 89:f63e4736d875 69 if (pc.writeable() && (empty)) {
itslinear 89:f63e4736d875 70 temp_char = tx_buffer[tx_out];
itslinear 89:f63e4736d875 71 tx_out = (tx_out + 1) % buffer_size;
itslinear 89:f63e4736d875 72 // Send first character to start tx interrupts, if stopped
cittecla 93:32cd0af29c2b 73 pc.putc(temp_char);
itslinear 89:f63e4736d875 74 }
itslinear 89:f63e4736d875 75 // End Critical Section
itslinear 89:f63e4736d875 76 NVIC_EnableIRQ(UART1_IRQn);
itslinear 89:f63e4736d875 77 return;
itslinear 89:f63e4736d875 78 }
itslinear 89:f63e4736d875 79
itslinear 89:f63e4736d875 80
itslinear 89:f63e4736d875 81 // Read a line from the large rx buffer from rx interrupt routine
itslinear 89:f63e4736d875 82 void read_line()
itslinear 89:f63e4736d875 83 {
itslinear 89:f63e4736d875 84 int i;
itslinear 89:f63e4736d875 85 i = 0;
itslinear 89:f63e4736d875 86 // Start Critical Section - don't interrupt while changing global buffer variables
itslinear 89:f63e4736d875 87 NVIC_DisableIRQ(UART1_IRQn);
itslinear 89:f63e4736d875 88 // Loop reading rx buffer characters until end of line character
itslinear 89:f63e4736d875 89 while ((i==0) || (rx_line[i-1] != '\r')) {
itslinear 89:f63e4736d875 90 // Wait if buffer empty
itslinear 89:f63e4736d875 91 if (rx_in == rx_out) {
itslinear 89:f63e4736d875 92 // End Critical Section - need to allow rx interrupt to get new characters for buffer
itslinear 89:f63e4736d875 93 NVIC_EnableIRQ(UART1_IRQn);
itslinear 89:f63e4736d875 94 while (rx_in == rx_out) {
itslinear 89:f63e4736d875 95 }
itslinear 89:f63e4736d875 96 // Start Critical Section - don't interrupt while changing global buffer variables
itslinear 89:f63e4736d875 97 NVIC_DisableIRQ(UART1_IRQn);
itslinear 89:f63e4736d875 98 }
itslinear 89:f63e4736d875 99 rx_line[i] = rx_buffer[rx_out];
itslinear 89:f63e4736d875 100 i++;
itslinear 89:f63e4736d875 101 rx_out = (rx_out + 1) % buffer_size;
itslinear 89:f63e4736d875 102 }
itslinear 89:f63e4736d875 103 // End Critical Section
itslinear 89:f63e4736d875 104 NVIC_EnableIRQ(UART1_IRQn);
itslinear 89:f63e4736d875 105 rx_line[i-1] = 0;
itslinear 89:f63e4736d875 106 return;
itslinear 89:f63e4736d875 107 }
aeschsim 95:b02e1b2a6cbd 108 */