NXP / Mbed 2 deprecated mcr20_wireless_uart

The MCR20A Wireless UART application functions as an wireless UART bridge between two (one-to-one) or several (one to many) boards. The application can be used with both a TERM, or with software that is capable of opening a serial port and writing to or reading from it. The characters sent or received are not necessarily ASCII printable characters.

Dependencies:   fsl_phy_mcr20a fsl_smac mbed-rtos mbed

Fork of mcr20_wireless_uart by Freescale

By default, the application uses broadcast addresses for OTA communication. This way, the application can be directly downloaded and run without any user intervention. The following use case assumes no changes have been done to the project.

  • Two (or more) MCR20A platforms (plugged into the FRDM-K64F Freescale Freedom Development platform) have to be connected to the PC using the mini/micro-USB cables.
  • The code must be downloaded on the platforms via CMSIS-DAP (or other means).
  • After that, two or more TERM applications must be opened, and the serial ports must be configured with the same baud rate as the one in the project (default baud rate is 115200). Other necessary serial configurations are 8 bit, no parity, and 1 stop bit.
  • To start the setup, each platform must be reset, and one of the (user) push buttons found on the MCR20A platform must be pressed. The user can press any of the non-reset buttons on the FRDM-K64F Freescale Freedom Development platform as well. *This initiates the state machine of the application so user can start.

Documentation

SMAC Demo Applications User Guide

RF_Drivers_Atmel/driverRFPhy.h@4:d47832caea44, 2015-03-05 (annotated)

Committer:
sam_grove
Date:
Thu Mar 05 20:35:27 2015 +0000
Revision:
4:d47832caea44
Parent:
RF_Drivers/driverRFPhy.h@2:3e7685cfb2a7 
updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sam_grove 2:3e7685cfb2a7 1 /*
sam_grove 2:3e7685cfb2a7 2 * driverRFPhy.h
sam_grove 2:3e7685cfb2a7 3 *
sam_grove 2:3e7685cfb2a7 4 * Created on: 14 July 2014
sam_grove 2:3e7685cfb2a7 5 * Author: mBed Team
sam_grove 2:3e7685cfb2a7 6 */
sam_grove 2:3e7685cfb2a7 7
sam_grove 2:3e7685cfb2a7 8 #ifndef DRIVERRFPHY_H_
sam_grove 2:3e7685cfb2a7 9 #define DRIVERRFPHY_H_
sam_grove 2:3e7685cfb2a7 10
sam_grove 2:3e7685cfb2a7 11 #include "arm_hal_phy.h"
sam_grove 2:3e7685cfb2a7 12
sam_grove 2:3e7685cfb2a7 13 #ifdef __cplusplus
sam_grove 2:3e7685cfb2a7 14 extern "C" {
sam_grove 2:3e7685cfb2a7 15 #endif
sam_grove 2:3e7685cfb2a7 16
sam_grove 2:3e7685cfb2a7 17 /*Run calibration every 5 minutes*/
sam_grove 2:3e7685cfb2a7 18 #define RF_CALIBRATION_INTERVAL 6000000
sam_grove 2:3e7685cfb2a7 19 /*Wait ACK for 2.5ms*/
sam_grove 2:3e7685cfb2a7 20 #define RF_ACK_WAIT_TIMEOUT 50
sam_grove 2:3e7685cfb2a7 21
sam_grove 2:3e7685cfb2a7 22 #define RF_BUFFER_SIZE 128
sam_grove 2:3e7685cfb2a7 23 #define RF_DEFAULT_CHANNEL 11
sam_grove 2:3e7685cfb2a7 24
sam_grove 2:3e7685cfb2a7 25 /*Radio RX and TX state definitions*/
sam_grove 2:3e7685cfb2a7 26 #define RFF_ON 0x01
sam_grove 2:3e7685cfb2a7 27 #define RFF_RX 0x02
sam_grove 2:3e7685cfb2a7 28 #define RFF_TX 0x04
sam_grove 2:3e7685cfb2a7 29 #define RFF_CCA 0x08
sam_grove 2:3e7685cfb2a7 30
sam_grove 2:3e7685cfb2a7 31 /*Atmel RF states*/
sam_grove 2:3e7685cfb2a7 32 typedef enum
sam_grove 2:3e7685cfb2a7 33 {
sam_grove 2:3e7685cfb2a7 34 NOP = 0x00,
sam_grove 2:3e7685cfb2a7 35 BUSY_RX = 0x01,
sam_grove 2:3e7685cfb2a7 36 RF_TX_START = 0x02,
sam_grove 2:3e7685cfb2a7 37 FORCE_TRX_OFF = 0x03,
sam_grove 2:3e7685cfb2a7 38 FORCE_PLL_ON = 0x04,
sam_grove 2:3e7685cfb2a7 39 RX_ON = 0x06,
sam_grove 2:3e7685cfb2a7 40 TRX_OFF = 0x08,
sam_grove 2:3e7685cfb2a7 41 PLL_ON = 0x09,
sam_grove 2:3e7685cfb2a7 42 BUSY_RX_AACK = 0x11,
sam_grove 2:3e7685cfb2a7 43 SLEEP = 0x0F,
sam_grove 2:3e7685cfb2a7 44 RX_AACK_ON = 0x16,
sam_grove 2:3e7685cfb2a7 45 TX_ARET_ON = 0x19
sam_grove 2:3e7685cfb2a7 46 }rf_trx_states_t;
sam_grove 2:3e7685cfb2a7 47
sam_grove 2:3e7685cfb2a7 48 extern void rf_ack_wait_timer_start(uint16_t slots);
sam_grove 2:3e7685cfb2a7 49 extern void rf_ack_wait_timer_stop(void);
sam_grove 2:3e7685cfb2a7 50 extern void rf_handle_cca_ed_done(void);
sam_grove 2:3e7685cfb2a7 51 extern void rf_handle_tx_end(void);
sam_grove 2:3e7685cfb2a7 52 extern void rf_handle_rx_end(void);
sam_grove 2:3e7685cfb2a7 53 extern void rf_on(void);
sam_grove 2:3e7685cfb2a7 54 extern void rf_receive(void);
sam_grove 2:3e7685cfb2a7 55 extern void rf_poll_trx_state_change(rf_trx_states_t trx_state);
sam_grove 2:3e7685cfb2a7 56 extern void rf_init(void);
sam_grove 2:3e7685cfb2a7 57 extern void rf_set_mac_address(const uint8_t *ptr);
sam_grove 2:3e7685cfb2a7 58 extern int8_t rf_device_register(void);
sam_grove 2:3e7685cfb2a7 59 extern int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle);
sam_grove 2:3e7685cfb2a7 60 extern void rf_cca_abort(void);
sam_grove 2:3e7685cfb2a7 61 extern void rf_read_mac_address(uint8_t *ptr);
sam_grove 2:3e7685cfb2a7 62 extern int8_t rf_read_random(void);
sam_grove 2:3e7685cfb2a7 63 extern void rf_calibration_cb(void);
sam_grove 2:3e7685cfb2a7 64 extern uint8_t rf_init_phy_mode(void);
sam_grove 2:3e7685cfb2a7 65 extern void rf_ack_wait_timer_interrupt(void);
sam_grove 2:3e7685cfb2a7 66 extern void rf_calibration_timer_interrupt(void);
sam_grove 2:3e7685cfb2a7 67 extern void rf_calibration_timer_start(uint32_t slots);
sam_grove 2:3e7685cfb2a7 68 extern void rf_front_end_rx_lna(void);
sam_grove 2:3e7685cfb2a7 69 extern void rf_front_end_sleep(void);
sam_grove 2:3e7685cfb2a7 70 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
sam_grove 2:3e7685cfb2a7 71 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
sam_grove 2:3e7685cfb2a7 72 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
sam_grove 2:3e7685cfb2a7 73
sam_grove 2:3e7685cfb2a7 74 #ifdef __cplusplus
sam_grove 2:3e7685cfb2a7 75 }
sam_grove 2:3e7685cfb2a7 76 #endif
sam_grove 2:3e7685cfb2a7 77 #endif /* DRIVERRFPHY_H_ */