NXP
/
mcr20_wireless_uart
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Dependencies: fsl_phy_mcr20a fsl_smac mbed-rtos mbed
Fork of
mcr20_wireless_uart
by 
Freescale
By default, the application uses broadcast addresses for OTA communication. This way, the application can be directly downloaded and run without any user intervention. The following use case assumes no changes have been done to the project.
- Two (or more) MCR20A platforms (plugged into the FRDM-K64F Freescale Freedom Development platform) have to be connected to the PC using the mini/micro-USB cables.
- The code must be downloaded on the platforms via CMSIS-DAP (or other means).
- After that, two or more TERM applications must be opened, and the serial ports must be configured with the same baud rate as the one in the project (default baud rate is 115200). Other necessary serial configurations are 8 bit, no parity, and 1 stop bit.
- To start the setup, each platform must be reset, and one of the (user) push buttons found on the MCR20A platform must be pressed. The user can press any of the non-reset buttons on the FRDM-K64F Freescale Freedom Development platform as well. *This initiates the state machine of the application so user can start.
Documentation
SMAC Demo Applications User Guide
RF_Drivers_Freescale/MCR20Drv.c@10:756e09ed359c, 2015-03-05 (annotated)
- Committer:
- cotigac
- Date:
- Thu Mar 05 21:09:35 2015 +0000
- Revision:
- 10:756e09ed359c
- Child:
- 11:e15d0d27f7a5
Updated MCR20 drv
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| cotigac | 10:756e09ed359c | 1 | /*! |
| cotigac | 10:756e09ed359c | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
| cotigac | 10:756e09ed359c | 3 | * All rights reserved. |
| cotigac | 10:756e09ed359c | 4 | * |
| cotigac | 10:756e09ed359c | 5 | * \file MCR20Drv.c |
| cotigac | 10:756e09ed359c | 6 | * |
| cotigac | 10:756e09ed359c | 7 | * Redistribution and use in source and binary forms, with or without modification, |
| cotigac | 10:756e09ed359c | 8 | * are permitted provided that the following conditions are met: |
| cotigac | 10:756e09ed359c | 9 | * |
| cotigac | 10:756e09ed359c | 10 | * o Redistributions of source code must retain the above copyright notice, this list |
| cotigac | 10:756e09ed359c | 11 | * of conditions and the following disclaimer. |
| cotigac | 10:756e09ed359c | 12 | * |
| cotigac | 10:756e09ed359c | 13 | * o Redistributions in binary form must reproduce the above copyright notice, this |
| cotigac | 10:756e09ed359c | 14 | * list of conditions and the following disclaimer in the documentation and/or |
| cotigac | 10:756e09ed359c | 15 | * other materials provided with the distribution. |
| cotigac | 10:756e09ed359c | 16 | * |
| cotigac | 10:756e09ed359c | 17 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
| cotigac | 10:756e09ed359c | 18 | * contributors may be used to endorse or promote products derived from this |
| cotigac | 10:756e09ed359c | 19 | * software without specific prior written permission. |
| cotigac | 10:756e09ed359c | 20 | * |
| cotigac | 10:756e09ed359c | 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| cotigac | 10:756e09ed359c | 22 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| cotigac | 10:756e09ed359c | 23 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| cotigac | 10:756e09ed359c | 24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
| cotigac | 10:756e09ed359c | 25 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| cotigac | 10:756e09ed359c | 26 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| cotigac | 10:756e09ed359c | 27 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| cotigac | 10:756e09ed359c | 28 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| cotigac | 10:756e09ed359c | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| cotigac | 10:756e09ed359c | 30 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| cotigac | 10:756e09ed359c | 31 | */ |
| cotigac | 10:756e09ed359c | 32 | |
| cotigac | 10:756e09ed359c | 33 | |
| cotigac | 10:756e09ed359c | 34 | /***************************************************************************** |
| cotigac | 10:756e09ed359c | 35 | * INCLUDED HEADERS * |
| cotigac | 10:756e09ed359c | 36 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 37 | * Add to this section all the headers that this module needs to include. * |
| cotigac | 10:756e09ed359c | 38 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 39 | *****************************************************************************/ |
| cotigac | 10:756e09ed359c | 40 | |
| cotigac | 10:756e09ed359c | 41 | #include "MCR20Drv.h" |
| cotigac | 10:756e09ed359c | 42 | #include "MCR20Reg.h" |
| cotigac | 10:756e09ed359c | 43 | |
| cotigac | 10:756e09ed359c | 44 | #include "EmbeddedTypes.h" |
| cotigac | 10:756e09ed359c | 45 | |
| cotigac | 10:756e09ed359c | 46 | #include <string.h> |
| cotigac | 10:756e09ed359c | 47 | |
| cotigac | 10:756e09ed359c | 48 | #include "mbed.h" |
| cotigac | 10:756e09ed359c | 49 | #include "low_level_RF.h" |
| cotigac | 10:756e09ed359c | 50 | #include "arm_hal_interrupt.h" |
| cotigac | 10:756e09ed359c | 51 | |
| cotigac | 10:756e09ed359c | 52 | //#include "arm_hal_phy.h" |
| cotigac | 10:756e09ed359c | 53 | //#include "driverRFPhy.h" |
| cotigac | 10:756e09ed359c | 54 | //#include "driverAtmelRFInterface.h" |
| cotigac | 10:756e09ed359c | 55 | //#include "low_level_RF.h" |
| cotigac | 10:756e09ed359c | 56 | |
| cotigac | 10:756e09ed359c | 57 | //#include "SPI.h" |
| cotigac | 10:756e09ed359c | 58 | //#include "fsl_gpio_driver.h" |
| cotigac | 10:756e09ed359c | 59 | //#include "fsl_os_abstraction.h" |
| cotigac | 10:756e09ed359c | 60 | |
| cotigac | 10:756e09ed359c | 61 | /***************************************************************************** |
| cotigac | 10:756e09ed359c | 62 | * PRIVATE VARIABLES * |
| cotigac | 10:756e09ed359c | 63 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 64 | * Add to this section all the variables and constants that have local * |
| cotigac | 10:756e09ed359c | 65 | * (file) scope. * |
| cotigac | 10:756e09ed359c | 66 | * Each of this declarations shall be preceded by the 'static' keyword. * |
| cotigac | 10:756e09ed359c | 67 | * These variables / constants cannot be accessed outside this module. * |
| cotigac | 10:756e09ed359c | 68 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 69 | *****************************************************************************/ |
| cotigac | 10:756e09ed359c | 70 | |
| cotigac | 10:756e09ed359c | 71 | uint8_t gXcvrSpiInstance_c = 0; |
| cotigac | 10:756e09ed359c | 72 | |
| cotigac | 10:756e09ed359c | 73 | static uint32_t mPhyIrqDisableCnt = 1; |
| cotigac | 10:756e09ed359c | 74 | |
| cotigac | 10:756e09ed359c | 75 | void spi_master_init(uint32_t instance) |
| cotigac | 10:756e09ed359c | 76 | { |
| cotigac | 10:756e09ed359c | 77 | } |
| cotigac | 10:756e09ed359c | 78 | |
| cotigac | 10:756e09ed359c | 79 | void spi_master_configure_speed(uint32_t instance, uint32_t freq) |
| cotigac | 10:756e09ed359c | 80 | { |
| cotigac | 10:756e09ed359c | 81 | spi.frequency(freq); |
| cotigac | 10:756e09ed359c | 82 | } |
| cotigac | 10:756e09ed359c | 83 | |
| cotigac | 10:756e09ed359c | 84 | void gXcvrAssertCS_d(void) { |
| cotigac | 10:756e09ed359c | 85 | RF_CS_Set(0); |
| cotigac | 10:756e09ed359c | 86 | } |
| cotigac | 10:756e09ed359c | 87 | |
| cotigac | 10:756e09ed359c | 88 | void gXcvrDeassertCS_d(void) { |
| cotigac | 10:756e09ed359c | 89 | RF_CS_Set(1); |
| cotigac | 10:756e09ed359c | 90 | } |
| cotigac | 10:756e09ed359c | 91 | |
| cotigac | 10:756e09ed359c | 92 | #if 0 |
| cotigac | 10:756e09ed359c | 93 | /* GPIO configuration */ |
| cotigac | 10:756e09ed359c | 94 | const gpio_output_pin_user_config_t mXcvrSpiCsCfg = { |
| cotigac | 10:756e09ed359c | 95 | .pinName = kGpioXcvrSpiCsPin, |
| cotigac | 10:756e09ed359c | 96 | .config.outputLogic = 1, |
| cotigac | 10:756e09ed359c | 97 | .config.slewRate = kPortFastSlewRate, |
| cotigac | 10:756e09ed359c | 98 | #if FSL_FEATURE_PORT_HAS_OPEN_DRAIN |
| cotigac | 10:756e09ed359c | 99 | .config.isOpenDrainEnabled = false, |
| cotigac | 10:756e09ed359c | 100 | #endif |
| cotigac | 10:756e09ed359c | 101 | .config.driveStrength = kPortLowDriveStrength, |
| cotigac | 10:756e09ed359c | 102 | }; |
| cotigac | 10:756e09ed359c | 103 | |
| cotigac | 10:756e09ed359c | 104 | const gpio_input_pin_user_config_t mXcvrIrqPinCfg = { |
| cotigac | 10:756e09ed359c | 105 | .pinName = kGpioXcvrIrqPin, |
| cotigac | 10:756e09ed359c | 106 | .config.isPullEnable = false, |
| cotigac | 10:756e09ed359c | 107 | .config.pullSelect = kPortPullDown, |
| cotigac | 10:756e09ed359c | 108 | .config.isPassiveFilterEnabled = false, |
| cotigac | 10:756e09ed359c | 109 | .config.interrupt = kPortIntDisabled |
| cotigac | 10:756e09ed359c | 110 | }; |
| cotigac | 10:756e09ed359c | 111 | #endif |
| cotigac | 10:756e09ed359c | 112 | |
| cotigac | 10:756e09ed359c | 113 | /***************************************************************************** |
| cotigac | 10:756e09ed359c | 114 | * PUBLIC VARIABLES * |
| cotigac | 10:756e09ed359c | 115 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 116 | * Add to this section all the variables and constants that have global * |
| cotigac | 10:756e09ed359c | 117 | * (project) scope. * |
| cotigac | 10:756e09ed359c | 118 | * These variables / constants can be accessed outside this module. * |
| cotigac | 10:756e09ed359c | 119 | * These variables / constants shall be preceded by the 'extern' keyword in * |
| cotigac | 10:756e09ed359c | 120 | * the interface header. * |
| cotigac | 10:756e09ed359c | 121 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 122 | *****************************************************************************/ |
| cotigac | 10:756e09ed359c | 123 | |
| cotigac | 10:756e09ed359c | 124 | /***************************************************************************** |
| cotigac | 10:756e09ed359c | 125 | * PRIVATE FUNCTIONS PROTOTYPES * |
| cotigac | 10:756e09ed359c | 126 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 127 | * Add to this section all the functions prototypes that have local (file) * |
| cotigac | 10:756e09ed359c | 128 | * scope. * |
| cotigac | 10:756e09ed359c | 129 | * These functions cannot be accessed outside this module. * |
| cotigac | 10:756e09ed359c | 130 | * These declarations shall be preceded by the 'static' keyword. * |
| cotigac | 10:756e09ed359c | 131 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 132 | *****************************************************************************/ |
| cotigac | 10:756e09ed359c | 133 | |
| cotigac | 10:756e09ed359c | 134 | /***************************************************************************** |
| cotigac | 10:756e09ed359c | 135 | * PRIVATE FUNCTIONS * |
| cotigac | 10:756e09ed359c | 136 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 137 | * Add to this section all the functions that have local (file) scope. * |
| cotigac | 10:756e09ed359c | 138 | * These functions cannot be accessed outside this module. * |
| cotigac | 10:756e09ed359c | 139 | * These definitions shall be preceded by the 'static' keyword. * |
| cotigac | 10:756e09ed359c | 140 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 141 | *****************************************************************************/ |
| cotigac | 10:756e09ed359c | 142 | |
| cotigac | 10:756e09ed359c | 143 | |
| cotigac | 10:756e09ed359c | 144 | /***************************************************************************** |
| cotigac | 10:756e09ed359c | 145 | * PUBLIC FUNCTIONS * |
| cotigac | 10:756e09ed359c | 146 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 147 | * Add to this section all the functions that have global (project) scope. * |
| cotigac | 10:756e09ed359c | 148 | * These functions can be accessed outside this module. * |
| cotigac | 10:756e09ed359c | 149 | * These functions shall have their declarations (prototypes) within the * |
| cotigac | 10:756e09ed359c | 150 | * interface header file and shall be preceded by the 'extern' keyword. * |
| cotigac | 10:756e09ed359c | 151 | *---------------------------------------------------------------------------* |
| cotigac | 10:756e09ed359c | 152 | *****************************************************************************/ |
| cotigac | 10:756e09ed359c | 153 | |
| cotigac | 10:756e09ed359c | 154 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 155 | * Name: MCR20Drv_Init |
| cotigac | 10:756e09ed359c | 156 | * Description: - |
| cotigac | 10:756e09ed359c | 157 | * Parameters: - |
| cotigac | 10:756e09ed359c | 158 | * Return: - |
| cotigac | 10:756e09ed359c | 159 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 160 | void MCR20Drv_Init |
| cotigac | 10:756e09ed359c | 161 | ( |
| cotigac | 10:756e09ed359c | 162 | void |
| cotigac | 10:756e09ed359c | 163 | ) |
| cotigac | 10:756e09ed359c | 164 | { |
| cotigac | 10:756e09ed359c | 165 | #if 0 |
| cotigac | 10:756e09ed359c | 166 | spi_master_init(gXcvrSpiInstance_c); |
| cotigac | 10:756e09ed359c | 167 | spi_master_configure_speed(gXcvrSpiInstance_c, 8000000); |
| cotigac | 10:756e09ed359c | 168 | |
| cotigac | 10:756e09ed359c | 169 | /* Override SPI CS pin function. Set pin as GPIO */ |
| cotigac | 10:756e09ed359c | 170 | PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrSpiCsPin)], |
| cotigac | 10:756e09ed359c | 171 | GPIO_EXTRACT_PIN(kGpioXcvrSpiCsPin), |
| cotigac | 10:756e09ed359c | 172 | kPortMuxAsGpio); |
| cotigac | 10:756e09ed359c | 173 | GPIO_DRV_OutputPinInit(&mXcvrSpiCsCfg); |
| cotigac | 10:756e09ed359c | 174 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 175 | #endif |
| cotigac | 10:756e09ed359c | 176 | |
| cotigac | 10:756e09ed359c | 177 | } |
| cotigac | 10:756e09ed359c | 178 | |
| cotigac | 10:756e09ed359c | 179 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 180 | * Name: MCR20Drv_DirectAccessSPIWrite |
| cotigac | 10:756e09ed359c | 181 | * Description: - |
| cotigac | 10:756e09ed359c | 182 | * Parameters: - |
| cotigac | 10:756e09ed359c | 183 | * Return: - |
| cotigac | 10:756e09ed359c | 184 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 185 | void MCR20Drv_DirectAccessSPIWrite |
| cotigac | 10:756e09ed359c | 186 | ( |
| cotigac | 10:756e09ed359c | 187 | uint8_t address, |
| cotigac | 10:756e09ed359c | 188 | uint8_t value |
| cotigac | 10:756e09ed359c | 189 | ) |
| cotigac | 10:756e09ed359c | 190 | { |
| cotigac | 10:756e09ed359c | 191 | uint16_t txData; |
| cotigac | 10:756e09ed359c | 192 | |
| cotigac | 10:756e09ed359c | 193 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 194 | |
| cotigac | 10:756e09ed359c | 195 | spi_master_configure_speed(gXcvrSpiInstance_c, 16000000); |
| cotigac | 10:756e09ed359c | 196 | |
| cotigac | 10:756e09ed359c | 197 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 198 | |
| cotigac | 10:756e09ed359c | 199 | txData = (address & TransceiverSPI_DirectRegisterAddressMask); |
| cotigac | 10:756e09ed359c | 200 | txData |= value << 8; |
| cotigac | 10:756e09ed359c | 201 | |
| cotigac | 10:756e09ed359c | 202 | spi_master_transfer(gXcvrSpiInstance_c, (uint8_t *)&txData, NULL, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 203 | |
| cotigac | 10:756e09ed359c | 204 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 205 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 206 | } |
| cotigac | 10:756e09ed359c | 207 | |
| cotigac | 10:756e09ed359c | 208 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 209 | * Name: MCR20Drv_DirectAccessSPIMultiByteWrite |
| cotigac | 10:756e09ed359c | 210 | * Description: - |
| cotigac | 10:756e09ed359c | 211 | * Parameters: - |
| cotigac | 10:756e09ed359c | 212 | * Return: - |
| cotigac | 10:756e09ed359c | 213 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 214 | void MCR20Drv_DirectAccessSPIMultiByteWrite |
| cotigac | 10:756e09ed359c | 215 | ( |
| cotigac | 10:756e09ed359c | 216 | uint8_t startAddress, |
| cotigac | 10:756e09ed359c | 217 | uint8_t * byteArray, |
| cotigac | 10:756e09ed359c | 218 | uint8_t numOfBytes |
| cotigac | 10:756e09ed359c | 219 | ) |
| cotigac | 10:756e09ed359c | 220 | { |
| cotigac | 10:756e09ed359c | 221 | uint8_t txData; |
| cotigac | 10:756e09ed359c | 222 | |
| cotigac | 10:756e09ed359c | 223 | if( (numOfBytes == 0) || (byteArray == NULL) ) |
| cotigac | 10:756e09ed359c | 224 | { |
| cotigac | 10:756e09ed359c | 225 | return; |
| cotigac | 10:756e09ed359c | 226 | } |
| cotigac | 10:756e09ed359c | 227 | |
| cotigac | 10:756e09ed359c | 228 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 229 | |
| cotigac | 10:756e09ed359c | 230 | spi_master_configure_speed(gXcvrSpiInstance_c, 16000000); |
| cotigac | 10:756e09ed359c | 231 | |
| cotigac | 10:756e09ed359c | 232 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 233 | |
| cotigac | 10:756e09ed359c | 234 | txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask); |
| cotigac | 10:756e09ed359c | 235 | |
| cotigac | 10:756e09ed359c | 236 | spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 237 | spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes); |
| cotigac | 10:756e09ed359c | 238 | |
| cotigac | 10:756e09ed359c | 239 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 240 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 241 | } |
| cotigac | 10:756e09ed359c | 242 | |
| cotigac | 10:756e09ed359c | 243 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 244 | * Name: MCR20Drv_PB_SPIByteWrite |
| cotigac | 10:756e09ed359c | 245 | * Description: - |
| cotigac | 10:756e09ed359c | 246 | * Parameters: - |
| cotigac | 10:756e09ed359c | 247 | * Return: - |
| cotigac | 10:756e09ed359c | 248 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 249 | void MCR20Drv_PB_SPIByteWrite |
| cotigac | 10:756e09ed359c | 250 | ( |
| cotigac | 10:756e09ed359c | 251 | uint8_t address, |
| cotigac | 10:756e09ed359c | 252 | uint8_t value |
| cotigac | 10:756e09ed359c | 253 | ) |
| cotigac | 10:756e09ed359c | 254 | { |
| cotigac | 10:756e09ed359c | 255 | uint32_t txData; |
| cotigac | 10:756e09ed359c | 256 | |
| cotigac | 10:756e09ed359c | 257 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 258 | |
| cotigac | 10:756e09ed359c | 259 | spi_master_configure_speed(gXcvrSpiInstance_c, 16000000); |
| cotigac | 10:756e09ed359c | 260 | |
| cotigac | 10:756e09ed359c | 261 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 262 | |
| cotigac | 10:756e09ed359c | 263 | txData = TransceiverSPI_WriteSelect | |
| cotigac | 10:756e09ed359c | 264 | TransceiverSPI_PacketBuffAccessSelect | |
| cotigac | 10:756e09ed359c | 265 | TransceiverSPI_PacketBuffByteModeSelect; |
| cotigac | 10:756e09ed359c | 266 | txData |= (address) << 8; |
| cotigac | 10:756e09ed359c | 267 | txData |= (value) << 16; |
| cotigac | 10:756e09ed359c | 268 | |
| cotigac | 10:756e09ed359c | 269 | spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3); |
| cotigac | 10:756e09ed359c | 270 | |
| cotigac | 10:756e09ed359c | 271 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 272 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 273 | } |
| cotigac | 10:756e09ed359c | 274 | |
| cotigac | 10:756e09ed359c | 275 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 276 | * Name: MCR20Drv_PB_SPIBurstWrite |
| cotigac | 10:756e09ed359c | 277 | * Description: - |
| cotigac | 10:756e09ed359c | 278 | * Parameters: - |
| cotigac | 10:756e09ed359c | 279 | * Return: - |
| cotigac | 10:756e09ed359c | 280 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 281 | void MCR20Drv_PB_SPIBurstWrite |
| cotigac | 10:756e09ed359c | 282 | ( |
| cotigac | 10:756e09ed359c | 283 | uint8_t * byteArray, |
| cotigac | 10:756e09ed359c | 284 | uint8_t numOfBytes |
| cotigac | 10:756e09ed359c | 285 | ) |
| cotigac | 10:756e09ed359c | 286 | { |
| cotigac | 10:756e09ed359c | 287 | uint8_t txData; |
| cotigac | 10:756e09ed359c | 288 | |
| cotigac | 10:756e09ed359c | 289 | if( (numOfBytes == 0) || (byteArray == NULL) ) |
| cotigac | 10:756e09ed359c | 290 | { |
| cotigac | 10:756e09ed359c | 291 | return; |
| cotigac | 10:756e09ed359c | 292 | } |
| cotigac | 10:756e09ed359c | 293 | |
| cotigac | 10:756e09ed359c | 294 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 295 | |
| cotigac | 10:756e09ed359c | 296 | spi_master_configure_speed(gXcvrSpiInstance_c, 16000000); |
| cotigac | 10:756e09ed359c | 297 | |
| cotigac | 10:756e09ed359c | 298 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 299 | |
| cotigac | 10:756e09ed359c | 300 | txData = TransceiverSPI_WriteSelect | |
| cotigac | 10:756e09ed359c | 301 | TransceiverSPI_PacketBuffAccessSelect | |
| cotigac | 10:756e09ed359c | 302 | TransceiverSPI_PacketBuffBurstModeSelect; |
| cotigac | 10:756e09ed359c | 303 | |
| cotigac | 10:756e09ed359c | 304 | spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, 1); |
| cotigac | 10:756e09ed359c | 305 | spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes); |
| cotigac | 10:756e09ed359c | 306 | |
| cotigac | 10:756e09ed359c | 307 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 308 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 309 | } |
| cotigac | 10:756e09ed359c | 310 | |
| cotigac | 10:756e09ed359c | 311 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 312 | * Name: MCR20Drv_DirectAccessSPIRead |
| cotigac | 10:756e09ed359c | 313 | * Description: - |
| cotigac | 10:756e09ed359c | 314 | * Parameters: - |
| cotigac | 10:756e09ed359c | 315 | * Return: - |
| cotigac | 10:756e09ed359c | 316 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 317 | |
| cotigac | 10:756e09ed359c | 318 | uint8_t MCR20Drv_DirectAccessSPIRead |
| cotigac | 10:756e09ed359c | 319 | ( |
| cotigac | 10:756e09ed359c | 320 | uint8_t address |
| cotigac | 10:756e09ed359c | 321 | ) |
| cotigac | 10:756e09ed359c | 322 | { |
| cotigac | 10:756e09ed359c | 323 | uint8_t txData; |
| cotigac | 10:756e09ed359c | 324 | uint8_t rxData; |
| cotigac | 10:756e09ed359c | 325 | |
| cotigac | 10:756e09ed359c | 326 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 327 | |
| cotigac | 10:756e09ed359c | 328 | spi_master_configure_speed(gXcvrSpiInstance_c, 8000000); |
| cotigac | 10:756e09ed359c | 329 | |
| cotigac | 10:756e09ed359c | 330 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 331 | |
| cotigac | 10:756e09ed359c | 332 | txData = (address & TransceiverSPI_DirectRegisterAddressMask) | |
| cotigac | 10:756e09ed359c | 333 | TransceiverSPI_ReadSelect; |
| cotigac | 10:756e09ed359c | 334 | |
| cotigac | 10:756e09ed359c | 335 | spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 336 | spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData)); |
| cotigac | 10:756e09ed359c | 337 | |
| cotigac | 10:756e09ed359c | 338 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 339 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 340 | |
| cotigac | 10:756e09ed359c | 341 | return rxData; |
| cotigac | 10:756e09ed359c | 342 | |
| cotigac | 10:756e09ed359c | 343 | } |
| cotigac | 10:756e09ed359c | 344 | |
| cotigac | 10:756e09ed359c | 345 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 346 | * Name: MCR20Drv_DirectAccessSPIMultyByteRead |
| cotigac | 10:756e09ed359c | 347 | * Description: - |
| cotigac | 10:756e09ed359c | 348 | * Parameters: - |
| cotigac | 10:756e09ed359c | 349 | * Return: - |
| cotigac | 10:756e09ed359c | 350 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 351 | uint8_t MCR20Drv_DirectAccessSPIMultiByteRead |
| cotigac | 10:756e09ed359c | 352 | ( |
| cotigac | 10:756e09ed359c | 353 | uint8_t startAddress, |
| cotigac | 10:756e09ed359c | 354 | uint8_t * byteArray, |
| cotigac | 10:756e09ed359c | 355 | uint8_t numOfBytes |
| cotigac | 10:756e09ed359c | 356 | ) |
| cotigac | 10:756e09ed359c | 357 | { |
| cotigac | 10:756e09ed359c | 358 | uint8_t txData; |
| cotigac | 10:756e09ed359c | 359 | uint8_t phyIRQSTS1; |
| cotigac | 10:756e09ed359c | 360 | |
| cotigac | 10:756e09ed359c | 361 | if( (numOfBytes == 0) || (byteArray == NULL) ) |
| cotigac | 10:756e09ed359c | 362 | { |
| cotigac | 10:756e09ed359c | 363 | return 0; |
| cotigac | 10:756e09ed359c | 364 | } |
| cotigac | 10:756e09ed359c | 365 | |
| cotigac | 10:756e09ed359c | 366 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 367 | |
| cotigac | 10:756e09ed359c | 368 | spi_master_configure_speed(gXcvrSpiInstance_c, 8000000); |
| cotigac | 10:756e09ed359c | 369 | |
| cotigac | 10:756e09ed359c | 370 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 371 | |
| cotigac | 10:756e09ed359c | 372 | txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask) | |
| cotigac | 10:756e09ed359c | 373 | TransceiverSPI_ReadSelect; |
| cotigac | 10:756e09ed359c | 374 | |
| cotigac | 10:756e09ed359c | 375 | spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 376 | spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes); |
| cotigac | 10:756e09ed359c | 377 | |
| cotigac | 10:756e09ed359c | 378 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 379 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 380 | |
| cotigac | 10:756e09ed359c | 381 | return phyIRQSTS1; |
| cotigac | 10:756e09ed359c | 382 | } |
| cotigac | 10:756e09ed359c | 383 | |
| cotigac | 10:756e09ed359c | 384 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 385 | * Name: MCR20Drv_PB_SPIBurstRead |
| cotigac | 10:756e09ed359c | 386 | * Description: - |
| cotigac | 10:756e09ed359c | 387 | * Parameters: - |
| cotigac | 10:756e09ed359c | 388 | * Return: - |
| cotigac | 10:756e09ed359c | 389 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 390 | uint8_t MCR20Drv_PB_SPIBurstRead |
| cotigac | 10:756e09ed359c | 391 | ( |
| cotigac | 10:756e09ed359c | 392 | uint8_t * byteArray, |
| cotigac | 10:756e09ed359c | 393 | uint8_t numOfBytes |
| cotigac | 10:756e09ed359c | 394 | ) |
| cotigac | 10:756e09ed359c | 395 | { |
| cotigac | 10:756e09ed359c | 396 | uint8_t txData; |
| cotigac | 10:756e09ed359c | 397 | uint8_t phyIRQSTS1; |
| cotigac | 10:756e09ed359c | 398 | |
| cotigac | 10:756e09ed359c | 399 | if( (numOfBytes == 0) || (byteArray == NULL) ) |
| cotigac | 10:756e09ed359c | 400 | { |
| cotigac | 10:756e09ed359c | 401 | return 0; |
| cotigac | 10:756e09ed359c | 402 | } |
| cotigac | 10:756e09ed359c | 403 | |
| cotigac | 10:756e09ed359c | 404 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 405 | |
| cotigac | 10:756e09ed359c | 406 | spi_master_configure_speed(gXcvrSpiInstance_c, 8000000); |
| cotigac | 10:756e09ed359c | 407 | |
| cotigac | 10:756e09ed359c | 408 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 409 | |
| cotigac | 10:756e09ed359c | 410 | txData = TransceiverSPI_ReadSelect | |
| cotigac | 10:756e09ed359c | 411 | TransceiverSPI_PacketBuffAccessSelect | |
| cotigac | 10:756e09ed359c | 412 | TransceiverSPI_PacketBuffBurstModeSelect; |
| cotigac | 10:756e09ed359c | 413 | |
| cotigac | 10:756e09ed359c | 414 | spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 415 | spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes); |
| cotigac | 10:756e09ed359c | 416 | |
| cotigac | 10:756e09ed359c | 417 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 418 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 419 | |
| cotigac | 10:756e09ed359c | 420 | return phyIRQSTS1; |
| cotigac | 10:756e09ed359c | 421 | } |
| cotigac | 10:756e09ed359c | 422 | |
| cotigac | 10:756e09ed359c | 423 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 424 | * Name: MCR20Drv_IndirectAccessSPIWrite |
| cotigac | 10:756e09ed359c | 425 | * Description: - |
| cotigac | 10:756e09ed359c | 426 | * Parameters: - |
| cotigac | 10:756e09ed359c | 427 | * Return: - |
| cotigac | 10:756e09ed359c | 428 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 429 | void MCR20Drv_IndirectAccessSPIWrite |
| cotigac | 10:756e09ed359c | 430 | ( |
| cotigac | 10:756e09ed359c | 431 | uint8_t address, |
| cotigac | 10:756e09ed359c | 432 | uint8_t value |
| cotigac | 10:756e09ed359c | 433 | ) |
| cotigac | 10:756e09ed359c | 434 | { |
| cotigac | 10:756e09ed359c | 435 | uint32_t txData; |
| cotigac | 10:756e09ed359c | 436 | |
| cotigac | 10:756e09ed359c | 437 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 438 | |
| cotigac | 10:756e09ed359c | 439 | spi_master_configure_speed(gXcvrSpiInstance_c, 16000000); |
| cotigac | 10:756e09ed359c | 440 | |
| cotigac | 10:756e09ed359c | 441 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 442 | |
| cotigac | 10:756e09ed359c | 443 | txData = TransceiverSPI_IARIndexReg; |
| cotigac | 10:756e09ed359c | 444 | txData |= (address) << 8; |
| cotigac | 10:756e09ed359c | 445 | txData |= (value) << 16; |
| cotigac | 10:756e09ed359c | 446 | |
| cotigac | 10:756e09ed359c | 447 | spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3); |
| cotigac | 10:756e09ed359c | 448 | |
| cotigac | 10:756e09ed359c | 449 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 450 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 451 | } |
| cotigac | 10:756e09ed359c | 452 | |
| cotigac | 10:756e09ed359c | 453 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 454 | * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite |
| cotigac | 10:756e09ed359c | 455 | * Description: - |
| cotigac | 10:756e09ed359c | 456 | * Parameters: - |
| cotigac | 10:756e09ed359c | 457 | * Return: - |
| cotigac | 10:756e09ed359c | 458 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 459 | void MCR20Drv_IndirectAccessSPIMultiByteWrite |
| cotigac | 10:756e09ed359c | 460 | ( |
| cotigac | 10:756e09ed359c | 461 | uint8_t startAddress, |
| cotigac | 10:756e09ed359c | 462 | uint8_t * byteArray, |
| cotigac | 10:756e09ed359c | 463 | uint8_t numOfBytes |
| cotigac | 10:756e09ed359c | 464 | ) |
| cotigac | 10:756e09ed359c | 465 | { |
| cotigac | 10:756e09ed359c | 466 | uint16_t txData; |
| cotigac | 10:756e09ed359c | 467 | |
| cotigac | 10:756e09ed359c | 468 | if( (numOfBytes == 0) || (byteArray == NULL) ) |
| cotigac | 10:756e09ed359c | 469 | { |
| cotigac | 10:756e09ed359c | 470 | return; |
| cotigac | 10:756e09ed359c | 471 | } |
| cotigac | 10:756e09ed359c | 472 | |
| cotigac | 10:756e09ed359c | 473 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 474 | |
| cotigac | 10:756e09ed359c | 475 | spi_master_configure_speed(gXcvrSpiInstance_c, 16000000); |
| cotigac | 10:756e09ed359c | 476 | |
| cotigac | 10:756e09ed359c | 477 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 478 | |
| cotigac | 10:756e09ed359c | 479 | txData = TransceiverSPI_IARIndexReg; |
| cotigac | 10:756e09ed359c | 480 | txData |= (startAddress) << 8; |
| cotigac | 10:756e09ed359c | 481 | |
| cotigac | 10:756e09ed359c | 482 | spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 483 | spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)byteArray, NULL, numOfBytes); |
| cotigac | 10:756e09ed359c | 484 | |
| cotigac | 10:756e09ed359c | 485 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 486 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 487 | } |
| cotigac | 10:756e09ed359c | 488 | |
| cotigac | 10:756e09ed359c | 489 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 490 | * Name: MCR20Drv_IndirectAccessSPIRead |
| cotigac | 10:756e09ed359c | 491 | * Description: - |
| cotigac | 10:756e09ed359c | 492 | * Parameters: - |
| cotigac | 10:756e09ed359c | 493 | * Return: - |
| cotigac | 10:756e09ed359c | 494 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 495 | uint8_t MCR20Drv_IndirectAccessSPIRead |
| cotigac | 10:756e09ed359c | 496 | ( |
| cotigac | 10:756e09ed359c | 497 | uint8_t address |
| cotigac | 10:756e09ed359c | 498 | ) |
| cotigac | 10:756e09ed359c | 499 | { |
| cotigac | 10:756e09ed359c | 500 | uint16_t txData; |
| cotigac | 10:756e09ed359c | 501 | uint8_t rxData; |
| cotigac | 10:756e09ed359c | 502 | |
| cotigac | 10:756e09ed359c | 503 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 504 | |
| cotigac | 10:756e09ed359c | 505 | spi_master_configure_speed(gXcvrSpiInstance_c, 8000000); |
| cotigac | 10:756e09ed359c | 506 | |
| cotigac | 10:756e09ed359c | 507 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 508 | |
| cotigac | 10:756e09ed359c | 509 | txData = TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect; |
| cotigac | 10:756e09ed359c | 510 | txData |= (address) << 8; |
| cotigac | 10:756e09ed359c | 511 | |
| cotigac | 10:756e09ed359c | 512 | spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 513 | spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData)); |
| cotigac | 10:756e09ed359c | 514 | |
| cotigac | 10:756e09ed359c | 515 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 516 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 517 | |
| cotigac | 10:756e09ed359c | 518 | return rxData; |
| cotigac | 10:756e09ed359c | 519 | } |
| cotigac | 10:756e09ed359c | 520 | |
| cotigac | 10:756e09ed359c | 521 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 522 | * Name: MCR20Drv_IndirectAccessSPIMultiByteRead |
| cotigac | 10:756e09ed359c | 523 | * Description: - |
| cotigac | 10:756e09ed359c | 524 | * Parameters: - |
| cotigac | 10:756e09ed359c | 525 | * Return: - |
| cotigac | 10:756e09ed359c | 526 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 527 | void MCR20Drv_IndirectAccessSPIMultiByteRead |
| cotigac | 10:756e09ed359c | 528 | ( |
| cotigac | 10:756e09ed359c | 529 | uint8_t startAddress, |
| cotigac | 10:756e09ed359c | 530 | uint8_t * byteArray, |
| cotigac | 10:756e09ed359c | 531 | uint8_t numOfBytes |
| cotigac | 10:756e09ed359c | 532 | ) |
| cotigac | 10:756e09ed359c | 533 | { |
| cotigac | 10:756e09ed359c | 534 | uint16_t txData; |
| cotigac | 10:756e09ed359c | 535 | |
| cotigac | 10:756e09ed359c | 536 | if( (numOfBytes == 0) || (byteArray == NULL) ) |
| cotigac | 10:756e09ed359c | 537 | { |
| cotigac | 10:756e09ed359c | 538 | return; |
| cotigac | 10:756e09ed359c | 539 | } |
| cotigac | 10:756e09ed359c | 540 | |
| cotigac | 10:756e09ed359c | 541 | ProtectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 542 | |
| cotigac | 10:756e09ed359c | 543 | spi_master_configure_speed(gXcvrSpiInstance_c, 8000000); |
| cotigac | 10:756e09ed359c | 544 | |
| cotigac | 10:756e09ed359c | 545 | gXcvrAssertCS_d(); |
| cotigac | 10:756e09ed359c | 546 | |
| cotigac | 10:756e09ed359c | 547 | txData = (TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect); |
| cotigac | 10:756e09ed359c | 548 | txData |= (startAddress) << 8; |
| cotigac | 10:756e09ed359c | 549 | |
| cotigac | 10:756e09ed359c | 550 | spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData)); |
| cotigac | 10:756e09ed359c | 551 | spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes); |
| cotigac | 10:756e09ed359c | 552 | |
| cotigac | 10:756e09ed359c | 553 | gXcvrDeassertCS_d(); |
| cotigac | 10:756e09ed359c | 554 | UnprotectFromMCR20Interrupt(); |
| cotigac | 10:756e09ed359c | 555 | } |
| cotigac | 10:756e09ed359c | 556 | |
| cotigac | 10:756e09ed359c | 557 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 558 | * Name: MCR20Drv_IRQ_PortConfig |
| cotigac | 10:756e09ed359c | 559 | * Description: - |
| cotigac | 10:756e09ed359c | 560 | * Parameters: - |
| cotigac | 10:756e09ed359c | 561 | * Return: - |
| cotigac | 10:756e09ed359c | 562 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 563 | void MCR20Drv_IRQ_PortConfig |
| cotigac | 10:756e09ed359c | 564 | ( |
| cotigac | 10:756e09ed359c | 565 | void |
| cotigac | 10:756e09ed359c | 566 | ) |
| cotigac | 10:756e09ed359c | 567 | { |
| cotigac | 10:756e09ed359c | 568 | #if 0 |
| cotigac | 10:756e09ed359c | 569 | PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], |
| cotigac | 10:756e09ed359c | 570 | GPIO_EXTRACT_PIN(kGpioXcvrIrqPin), |
| cotigac | 10:756e09ed359c | 571 | kPortMuxAsGpio); |
| cotigac | 10:756e09ed359c | 572 | GPIO_DRV_InputPinInit(&mXcvrIrqPinCfg); |
| cotigac | 10:756e09ed359c | 573 | #endif |
| cotigac | 10:756e09ed359c | 574 | } |
| cotigac | 10:756e09ed359c | 575 | |
| cotigac | 10:756e09ed359c | 576 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 577 | * Name: MCR20Drv_IsIrqPending |
| cotigac | 10:756e09ed359c | 578 | * Description: - |
| cotigac | 10:756e09ed359c | 579 | * Parameters: - |
| cotigac | 10:756e09ed359c | 580 | * Return: - |
| cotigac | 10:756e09ed359c | 581 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 582 | uint32_t MCR20Drv_IsIrqPending |
| cotigac | 10:756e09ed359c | 583 | ( |
| cotigac | 10:756e09ed359c | 584 | void |
| cotigac | 10:756e09ed359c | 585 | ) |
| cotigac | 10:756e09ed359c | 586 | { |
| cotigac | 10:756e09ed359c | 587 | #if 0 |
| cotigac | 10:756e09ed359c | 588 | if( GPIO_DRV_ReadPinInput(kGpioXcvrIrqPin) ) |
| cotigac | 10:756e09ed359c | 589 | { |
| cotigac | 10:756e09ed359c | 590 | return FALSE; |
| cotigac | 10:756e09ed359c | 591 | } |
| cotigac | 10:756e09ed359c | 592 | return TRUE; |
| cotigac | 10:756e09ed359c | 593 | #endif |
| cotigac | 10:756e09ed359c | 594 | return TRUE; |
| cotigac | 10:756e09ed359c | 595 | } |
| cotigac | 10:756e09ed359c | 596 | |
| cotigac | 10:756e09ed359c | 597 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 598 | * Name: MCR20Drv_IRQ_Disable |
| cotigac | 10:756e09ed359c | 599 | * Description: - |
| cotigac | 10:756e09ed359c | 600 | * Parameters: - |
| cotigac | 10:756e09ed359c | 601 | * Return: - |
| cotigac | 10:756e09ed359c | 602 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 603 | void MCR20Drv_IRQ_Disable // TODO |
| cotigac | 10:756e09ed359c | 604 | ( |
| cotigac | 10:756e09ed359c | 605 | void |
| cotigac | 10:756e09ed359c | 606 | ) |
| cotigac | 10:756e09ed359c | 607 | { |
| cotigac | 10:756e09ed359c | 608 | arm_enter_critical(); |
| cotigac | 10:756e09ed359c | 609 | |
| cotigac | 10:756e09ed359c | 610 | if( mPhyIrqDisableCnt == 0 ) |
| cotigac | 10:756e09ed359c | 611 | { |
| cotigac | 10:756e09ed359c | 612 | // PORT_HAL_SetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], |
| cotigac | 10:756e09ed359c | 613 | // GPIO_EXTRACT_PIN(kGpioXcvrIrqPin), |
| cotigac | 10:756e09ed359c | 614 | // kPortIntDisabled); |
| cotigac | 10:756e09ed359c | 615 | } |
| cotigac | 10:756e09ed359c | 616 | |
| cotigac | 10:756e09ed359c | 617 | mPhyIrqDisableCnt++; |
| cotigac | 10:756e09ed359c | 618 | |
| cotigac | 10:756e09ed359c | 619 | arm_exit_critical(); |
| cotigac | 10:756e09ed359c | 620 | } |
| cotigac | 10:756e09ed359c | 621 | |
| cotigac | 10:756e09ed359c | 622 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 623 | * Name: MCR20Drv_IRQ_Enable |
| cotigac | 10:756e09ed359c | 624 | * Description: - |
| cotigac | 10:756e09ed359c | 625 | * Parameters: - |
| cotigac | 10:756e09ed359c | 626 | * Return: - |
| cotigac | 10:756e09ed359c | 627 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 628 | void MCR20Drv_IRQ_Enable // TODO |
| cotigac | 10:756e09ed359c | 629 | ( |
| cotigac | 10:756e09ed359c | 630 | void |
| cotigac | 10:756e09ed359c | 631 | ) |
| cotigac | 10:756e09ed359c | 632 | { |
| cotigac | 10:756e09ed359c | 633 | arm_enter_critical(); |
| cotigac | 10:756e09ed359c | 634 | |
| cotigac | 10:756e09ed359c | 635 | if( mPhyIrqDisableCnt ) |
| cotigac | 10:756e09ed359c | 636 | { |
| cotigac | 10:756e09ed359c | 637 | mPhyIrqDisableCnt--; |
| cotigac | 10:756e09ed359c | 638 | |
| cotigac | 10:756e09ed359c | 639 | if( mPhyIrqDisableCnt == 0 ) |
| cotigac | 10:756e09ed359c | 640 | { |
| cotigac | 10:756e09ed359c | 641 | // PORT_HAL_SetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], |
| cotigac | 10:756e09ed359c | 642 | // GPIO_EXTRACT_PIN(kGpioXcvrIrqPin), |
| cotigac | 10:756e09ed359c | 643 | // kPortIntLogicZero); |
| cotigac | 10:756e09ed359c | 644 | } |
| cotigac | 10:756e09ed359c | 645 | } |
| cotigac | 10:756e09ed359c | 646 | |
| cotigac | 10:756e09ed359c | 647 | arm_exit_critical(); |
| cotigac | 10:756e09ed359c | 648 | } |
| cotigac | 10:756e09ed359c | 649 | |
| cotigac | 10:756e09ed359c | 650 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 651 | * Name: MCR20Drv_IRQ_IsEnabled |
| cotigac | 10:756e09ed359c | 652 | * Description: - |
| cotigac | 10:756e09ed359c | 653 | * Parameters: - |
| cotigac | 10:756e09ed359c | 654 | * Return: - |
| cotigac | 10:756e09ed359c | 655 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 656 | uint32_t MCR20Drv_IRQ_IsEnabled |
| cotigac | 10:756e09ed359c | 657 | ( |
| cotigac | 10:756e09ed359c | 658 | void |
| cotigac | 10:756e09ed359c | 659 | ) |
| cotigac | 10:756e09ed359c | 660 | { |
| cotigac | 10:756e09ed359c | 661 | #if 0 |
| cotigac | 10:756e09ed359c | 662 | port_interrupt_config_t mode; |
| cotigac | 10:756e09ed359c | 663 | |
| cotigac | 10:756e09ed359c | 664 | mode = PORT_HAL_GetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], |
| cotigac | 10:756e09ed359c | 665 | GPIO_EXTRACT_PIN(kGpioXcvrIrqPin)); |
| cotigac | 10:756e09ed359c | 666 | return (mode != kPortIntDisabled); |
| cotigac | 10:756e09ed359c | 667 | #endif |
| cotigac | 10:756e09ed359c | 668 | return 0; |
| cotigac | 10:756e09ed359c | 669 | } |
| cotigac | 10:756e09ed359c | 670 | |
| cotigac | 10:756e09ed359c | 671 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 672 | * Name: MCR20Drv_IRQ_Clear |
| cotigac | 10:756e09ed359c | 673 | * Description: - |
| cotigac | 10:756e09ed359c | 674 | * Parameters: - |
| cotigac | 10:756e09ed359c | 675 | * Return: - |
| cotigac | 10:756e09ed359c | 676 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 677 | void MCR20Drv_IRQ_Clear |
| cotigac | 10:756e09ed359c | 678 | ( |
| cotigac | 10:756e09ed359c | 679 | void |
| cotigac | 10:756e09ed359c | 680 | ) |
| cotigac | 10:756e09ed359c | 681 | { |
| cotigac | 10:756e09ed359c | 682 | // GPIO_DRV_ClearPinIntFlag(kGpioXcvrIrqPin); |
| cotigac | 10:756e09ed359c | 683 | } |
| cotigac | 10:756e09ed359c | 684 | |
| cotigac | 10:756e09ed359c | 685 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 686 | * Name: MCR20Drv_RST_Assert |
| cotigac | 10:756e09ed359c | 687 | * Description: - |
| cotigac | 10:756e09ed359c | 688 | * Parameters: - |
| cotigac | 10:756e09ed359c | 689 | * Return: - |
| cotigac | 10:756e09ed359c | 690 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 691 | void MCR20Drv_RST_B_Assert |
| cotigac | 10:756e09ed359c | 692 | ( |
| cotigac | 10:756e09ed359c | 693 | void |
| cotigac | 10:756e09ed359c | 694 | ) |
| cotigac | 10:756e09ed359c | 695 | { |
| cotigac | 10:756e09ed359c | 696 | //GPIO_DRV_ClearPinOutput(kGpioXcvrResetPin); |
| cotigac | 10:756e09ed359c | 697 | } |
| cotigac | 10:756e09ed359c | 698 | |
| cotigac | 10:756e09ed359c | 699 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 700 | * Name: MCR20Drv_RST_Deassert |
| cotigac | 10:756e09ed359c | 701 | * Description: - |
| cotigac | 10:756e09ed359c | 702 | * Parameters: - |
| cotigac | 10:756e09ed359c | 703 | * Return: - |
| cotigac | 10:756e09ed359c | 704 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 705 | void MCR20Drv_RST_B_Deassert |
| cotigac | 10:756e09ed359c | 706 | ( |
| cotigac | 10:756e09ed359c | 707 | void |
| cotigac | 10:756e09ed359c | 708 | ) |
| cotigac | 10:756e09ed359c | 709 | { |
| cotigac | 10:756e09ed359c | 710 | //GPIO_DRV_SetPinOutput(kGpioXcvrResetPin); |
| cotigac | 10:756e09ed359c | 711 | } |
| cotigac | 10:756e09ed359c | 712 | |
| cotigac | 10:756e09ed359c | 713 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 714 | * Name: MCR20Drv_SoftRST_Assert |
| cotigac | 10:756e09ed359c | 715 | * Description: - |
| cotigac | 10:756e09ed359c | 716 | * Parameters: - |
| cotigac | 10:756e09ed359c | 717 | * Return: - |
| cotigac | 10:756e09ed359c | 718 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 719 | void MCR20Drv_SoftRST_Assert |
| cotigac | 10:756e09ed359c | 720 | ( |
| cotigac | 10:756e09ed359c | 721 | void |
| cotigac | 10:756e09ed359c | 722 | ) |
| cotigac | 10:756e09ed359c | 723 | { |
| cotigac | 10:756e09ed359c | 724 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80)); |
| cotigac | 10:756e09ed359c | 725 | } |
| cotigac | 10:756e09ed359c | 726 | |
| cotigac | 10:756e09ed359c | 727 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 728 | * Name: MCR20Drv_SoftRST_Deassert |
| cotigac | 10:756e09ed359c | 729 | * Description: - |
| cotigac | 10:756e09ed359c | 730 | * Parameters: - |
| cotigac | 10:756e09ed359c | 731 | * Return: - |
| cotigac | 10:756e09ed359c | 732 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 733 | void MCR20Drv_SoftRST_Deassert |
| cotigac | 10:756e09ed359c | 734 | ( |
| cotigac | 10:756e09ed359c | 735 | void |
| cotigac | 10:756e09ed359c | 736 | ) |
| cotigac | 10:756e09ed359c | 737 | { |
| cotigac | 10:756e09ed359c | 738 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00)); |
| cotigac | 10:756e09ed359c | 739 | } |
| cotigac | 10:756e09ed359c | 740 | |
| cotigac | 10:756e09ed359c | 741 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 742 | * Name: MCR20Drv_Soft_RESET |
| cotigac | 10:756e09ed359c | 743 | * Description: - |
| cotigac | 10:756e09ed359c | 744 | * Parameters: - |
| cotigac | 10:756e09ed359c | 745 | * Return: - |
| cotigac | 10:756e09ed359c | 746 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 747 | void MCR20Drv_Soft_RESET |
| cotigac | 10:756e09ed359c | 748 | ( |
| cotigac | 10:756e09ed359c | 749 | void |
| cotigac | 10:756e09ed359c | 750 | ) |
| cotigac | 10:756e09ed359c | 751 | { |
| cotigac | 10:756e09ed359c | 752 | //assert SOG_RST |
| cotigac | 10:756e09ed359c | 753 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80)); |
| cotigac | 10:756e09ed359c | 754 | |
| cotigac | 10:756e09ed359c | 755 | //deassert SOG_RST |
| cotigac | 10:756e09ed359c | 756 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00)); |
| cotigac | 10:756e09ed359c | 757 | } |
| cotigac | 10:756e09ed359c | 758 | |
| cotigac | 10:756e09ed359c | 759 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 760 | * Name: MCR20Drv_RESET |
| cotigac | 10:756e09ed359c | 761 | * Description: - |
| cotigac | 10:756e09ed359c | 762 | * Parameters: - |
| cotigac | 10:756e09ed359c | 763 | * Return: - |
| cotigac | 10:756e09ed359c | 764 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 765 | void MCR20Drv_RESET |
| cotigac | 10:756e09ed359c | 766 | ( |
| cotigac | 10:756e09ed359c | 767 | void |
| cotigac | 10:756e09ed359c | 768 | ) |
| cotigac | 10:756e09ed359c | 769 | { |
| cotigac | 10:756e09ed359c | 770 | volatile uint32_t delay = 1000; |
| cotigac | 10:756e09ed359c | 771 | //assert RST_B |
| cotigac | 10:756e09ed359c | 772 | MCR20Drv_RST_B_Assert(); |
| cotigac | 10:756e09ed359c | 773 | |
| cotigac | 10:756e09ed359c | 774 | // TODO |
| cotigac | 10:756e09ed359c | 775 | while(delay--); |
| cotigac | 10:756e09ed359c | 776 | |
| cotigac | 10:756e09ed359c | 777 | //deassert RST_B |
| cotigac | 10:756e09ed359c | 778 | MCR20Drv_RST_B_Deassert(); |
| cotigac | 10:756e09ed359c | 779 | } |
| cotigac | 10:756e09ed359c | 780 | |
| cotigac | 10:756e09ed359c | 781 | /*--------------------------------------------------------------------------- |
| cotigac | 10:756e09ed359c | 782 | * Name: MCR20Drv_Set_CLK_OUT_Freq |
| cotigac | 10:756e09ed359c | 783 | * Description: - |
| cotigac | 10:756e09ed359c | 784 | * Parameters: - |
| cotigac | 10:756e09ed359c | 785 | * Return: - |
| cotigac | 10:756e09ed359c | 786 | *---------------------------------------------------------------------------*/ |
| cotigac | 10:756e09ed359c | 787 | void MCR20Drv_Set_CLK_OUT_Freq |
| cotigac | 10:756e09ed359c | 788 | ( |
| cotigac | 10:756e09ed359c | 789 | uint8_t freqDiv |
| cotigac | 10:756e09ed359c | 790 | ) |
| cotigac | 10:756e09ed359c | 791 | { |
| cotigac | 10:756e09ed359c | 792 | uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND; |
| cotigac | 10:756e09ed359c | 793 | |
| cotigac | 10:756e09ed359c | 794 | if(freqDiv == gCLK_OUT_FREQ_DISABLE) |
| cotigac | 10:756e09ed359c | 795 | { |
| cotigac | 10:756e09ed359c | 796 | clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled |
| cotigac | 10:756e09ed359c | 797 | } |
| cotigac | 10:756e09ed359c | 798 | |
| cotigac | 10:756e09ed359c | 799 | MCR20Drv_DirectAccessSPIWrite((uint8_t) CLK_OUT_CTRL, clkOutCtrlReg); |
| cotigac | 10:756e09ed359c | 800 | } |
| cotigac | 10:756e09ed359c | 801 | |
| cotigac | 10:756e09ed359c | 802 |