NXP / fsl_phy_mcr20a

A library implementing IEEE 802.15.4 PHY functionality for the MCR20A transceiver. The PHY sublayer provides two services: the PHY data service and the PHY management service interfacing to the PHY sublayer management entity (PLME) service access point (SAP) (known as PLME-SAP). The PHY data service enables the transmission and reception of PHY protocol data units (PSDUs) over the media (radio).

Fork of fsl_phy_mcr20a by Freescale

The Freescale PHY Layer deals with the physical burst which is to be sent and/or received. It performs modulation and demodulation, transmitter and receiver switching, fragmentation, scrambling, interleaving, and error correction coding. The communication to the upper protocol layers is carried out through the Layer 1 Interface.

The PHY Layer is capable of executing the following sequences:

  • I (Idle)
  • R (Receive Sequence conditionally followed by a TxAck)
  • T (Transmit Sequence)
  • C (Standalone CCA)
  • CCCA (Continuous CCA)
  • TR (Transmit/Receive Sequence - transmit unconditionally followed by either an R or RxAck)

In addition to these sequences the PHY Layer also integrates a packet processor which determines whether the packet is MAC-compliant, and if it is, whether it is addressed to the end device. Another feature of the packet processor is Source Address Matching which can be viewed as an extension of packet filtering; however its function is very specific to its intended application (data-polling and indirect queue management by a PAN Coordinator).

Documentation

MCR20A PHY Reference Manual

PHY/PhyPlmeData.c@0:764779eedf2d, 2015-08-18 (annotated)

Committer:
andreikovacs
Date:
Tue Aug 18 12:41:42 2015 +0000
Revision:
0:764779eedf2d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
andreikovacs 0:764779eedf2d 1 /*!
andreikovacs 0:764779eedf2d 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
andreikovacs 0:764779eedf2d 3 * All rights reserved.
andreikovacs 0:764779eedf2d 4 *
andreikovacs 0:764779eedf2d 5 * \file PhyPlmeData.c
andreikovacs 0:764779eedf2d 6 *
andreikovacs 0:764779eedf2d 7 * Redistribution and use in source and binary forms, with or without modification,
andreikovacs 0:764779eedf2d 8 * are permitted provided that the following conditions are met:
andreikovacs 0:764779eedf2d 9 *
andreikovacs 0:764779eedf2d 10 * o Redistributions of source code must retain the above copyright notice, this list
andreikovacs 0:764779eedf2d 11 * of conditions and the following disclaimer.
andreikovacs 0:764779eedf2d 12 *
andreikovacs 0:764779eedf2d 13 * o Redistributions in binary form must reproduce the above copyright notice, this
andreikovacs 0:764779eedf2d 14 * list of conditions and the following disclaimer in the documentation and/or
andreikovacs 0:764779eedf2d 15 * other materials provided with the distribution.
andreikovacs 0:764779eedf2d 16 *
andreikovacs 0:764779eedf2d 17 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
andreikovacs 0:764779eedf2d 18 * contributors may be used to endorse or promote products derived from this
andreikovacs 0:764779eedf2d 19 * software without specific prior written permission.
andreikovacs 0:764779eedf2d 20 *
andreikovacs 0:764779eedf2d 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
andreikovacs 0:764779eedf2d 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
andreikovacs 0:764779eedf2d 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
andreikovacs 0:764779eedf2d 24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
andreikovacs 0:764779eedf2d 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
andreikovacs 0:764779eedf2d 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
andreikovacs 0:764779eedf2d 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
andreikovacs 0:764779eedf2d 28 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
andreikovacs 0:764779eedf2d 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
andreikovacs 0:764779eedf2d 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
andreikovacs 0:764779eedf2d 31 */
andreikovacs 0:764779eedf2d 32
andreikovacs 0:764779eedf2d 33
andreikovacs 0:764779eedf2d 34 /************************************************************************************
andreikovacs 0:764779eedf2d 35 *************************************************************************************
andreikovacs 0:764779eedf2d 36 * Include
andreikovacs 0:764779eedf2d 37 *************************************************************************************
andreikovacs 0:764779eedf2d 38 ************************************************************************************/
andreikovacs 0:764779eedf2d 39
andreikovacs 0:764779eedf2d 40 #include "EmbeddedTypes.h"
andreikovacs 0:764779eedf2d 41
andreikovacs 0:764779eedf2d 42 //#include "fsl_os_abstraction.h"
andreikovacs 0:764779eedf2d 43 #include "MCR20Drv.h"
andreikovacs 0:764779eedf2d 44 #include "MCR20Reg.h"
andreikovacs 0:764779eedf2d 45 #include "Phy.h"
andreikovacs 0:764779eedf2d 46 #include "PhyTypes.h"
andreikovacs 0:764779eedf2d 47 #include "PhyInterface.h"
andreikovacs 0:764779eedf2d 48 #include "MemManager.h"
andreikovacs 0:764779eedf2d 49 #include "FunctionLib.h"
andreikovacs 0:764779eedf2d 50
andreikovacs 0:764779eedf2d 51
andreikovacs 0:764779eedf2d 52
andreikovacs 0:764779eedf2d 53 /************************************************************************************
andreikovacs 0:764779eedf2d 54 *************************************************************************************
andreikovacs 0:764779eedf2d 55 * Private macros
andreikovacs 0:764779eedf2d 56 *************************************************************************************
andreikovacs 0:764779eedf2d 57 ************************************************************************************/
andreikovacs 0:764779eedf2d 58 #define PHY_PARAMETERS_VALIDATION 1
andreikovacs 0:764779eedf2d 59
andreikovacs 0:764779eedf2d 60 /************************************************************************************
andreikovacs 0:764779eedf2d 61 *************************************************************************************
andreikovacs 0:764779eedf2d 62 * Private memory declarations
andreikovacs 0:764779eedf2d 63 *************************************************************************************
andreikovacs 0:764779eedf2d 64 ************************************************************************************/
andreikovacs 0:764779eedf2d 65 //2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
andreikovacs 0:764779eedf2d 66 static const uint8_t pll_int[16] = {0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D};
andreikovacs 0:764779eedf2d 67 static const uint16_t pll_frac[16] = {0x2800, 0x5000, 0x7800, 0xA000, 0xC800, 0xF000, 0x1800, 0x4000, 0x6800, 0x9000, 0xB800, 0xE000, 0x0800, 0x3000, 0x5800, 0x8000};
andreikovacs 0:764779eedf2d 68
andreikovacs 0:764779eedf2d 69 extern Phy_PhyLocalStruct_t phyLocal[];
andreikovacs 0:764779eedf2d 70 static uint8_t gPhyCurrentChannelPAN0 = 0x0B;
andreikovacs 0:764779eedf2d 71 static uint8_t gPhyCurrentChannelPAN1 = 0x0B;
andreikovacs 0:764779eedf2d 72
andreikovacs 0:764779eedf2d 73
andreikovacs 0:764779eedf2d 74 /************************************************************************************
andreikovacs 0:764779eedf2d 75 *************************************************************************************
andreikovacs 0:764779eedf2d 76 * Private prototypes
andreikovacs 0:764779eedf2d 77 *************************************************************************************
andreikovacs 0:764779eedf2d 78 ************************************************************************************/
andreikovacs 0:764779eedf2d 79 static void PhyRxRetry( uint32_t param );
andreikovacs 0:764779eedf2d 80
andreikovacs 0:764779eedf2d 81
andreikovacs 0:764779eedf2d 82 /************************************************************************************
andreikovacs 0:764779eedf2d 83 *************************************************************************************
andreikovacs 0:764779eedf2d 84 * Public functions
andreikovacs 0:764779eedf2d 85 *************************************************************************************
andreikovacs 0:764779eedf2d 86 ************************************************************************************/
andreikovacs 0:764779eedf2d 87
andreikovacs 0:764779eedf2d 88 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 89 * \brief This function will start a TX sequence. The packet will be sent OTA
andreikovacs 0:764779eedf2d 90 *
andreikovacs 0:764779eedf2d 91 * \param[in] pTxPacket pointer to the TX packet structure
andreikovacs 0:764779eedf2d 92 * \param[in] pRxParams pointer to RX parameters
andreikovacs 0:764779eedf2d 93 * \param[in] pTxParams pointer to TX parameters
andreikovacs 0:764779eedf2d 94 *
andreikovacs 0:764779eedf2d 95 * \return phyStatus_t
andreikovacs 0:764779eedf2d 96 *
andreikovacs 0:764779eedf2d 97 ********************************************************************************** */
andreikovacs 0:764779eedf2d 98 phyStatus_t PhyPdDataRequest( pdDataReq_t *pTxPacket,
andreikovacs 0:764779eedf2d 99 volatile phyRxParams_t *pRxParams,
andreikovacs 0:764779eedf2d 100 volatile phyTxParams_t *pTxParams )
andreikovacs 0:764779eedf2d 101 {
andreikovacs 0:764779eedf2d 102 uint8_t phyRegs[5], phyCtrl4Reg;
andreikovacs 0:764779eedf2d 103 uint8_t *pTmpPsdu; //*tmp;
andreikovacs 0:764779eedf2d 104
andreikovacs 0:764779eedf2d 105 #ifdef PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 106 // null pointer
andreikovacs 0:764779eedf2d 107 if(NULL == pTxPacket)
andreikovacs 0:764779eedf2d 108 {
andreikovacs 0:764779eedf2d 109 return gPhyInvalidParameter_c;
andreikovacs 0:764779eedf2d 110 }
andreikovacs 0:764779eedf2d 111
andreikovacs 0:764779eedf2d 112 // if CCA required ...
andreikovacs 0:764779eedf2d 113 if( (pTxPacket->CCABeforeTx == gPhyCCAMode3_c) || (pTxPacket->CCABeforeTx == gPhyEnergyDetectMode_c))
andreikovacs 0:764779eedf2d 114 { // ... cannot perform other types than MODE1 and MODE2
andreikovacs 0:764779eedf2d 115 return gPhyInvalidParameter_c;
andreikovacs 0:764779eedf2d 116 }
andreikovacs 0:764779eedf2d 117
andreikovacs 0:764779eedf2d 118 #endif // PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 119
andreikovacs 0:764779eedf2d 120 if( gIdle_c != PhyPpGetState() )
andreikovacs 0:764779eedf2d 121 {
andreikovacs 0:764779eedf2d 122 return gPhyBusy_c;
andreikovacs 0:764779eedf2d 123 }
andreikovacs 0:764779eedf2d 124
andreikovacs 0:764779eedf2d 125 // load data into PB
andreikovacs 0:764779eedf2d 126 pTmpPsdu = MEM_BufferAlloc(gMaxPHYPacketSize_c + 1);
andreikovacs 0:764779eedf2d 127 *pTmpPsdu = pTxPacket->psduLength + 2;
andreikovacs 0:764779eedf2d 128 FLib_MemCpy(pTmpPsdu+1, &pTxPacket->pPsdu[0], pTxPacket->psduLength);
andreikovacs 0:764779eedf2d 129 MCR20Drv_PB_SPIBurstWrite(pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
andreikovacs 0:764779eedf2d 130 MEM_BufferFree(pTmpPsdu);
andreikovacs 0:764779eedf2d 131
andreikovacs 0:764779eedf2d 132
andreikovacs 0:764779eedf2d 133 #if 0
andreikovacs 0:764779eedf2d 134 // load data into PB
andreikovacs 0:764779eedf2d 135 tmp = pTxPacket->pPsdu;
andreikovacs 0:764779eedf2d 136
andreikovacs 0:764779eedf2d 137 pTmpPsdu = (uint8_t *) ((&pTxPacket->pPsdu[0])-1);
andreikovacs 0:764779eedf2d 138 *pTmpPsdu = pTxPacket->psduLength + 2; /* including 2 bytes of FCS */
andreikovacs 0:764779eedf2d 139 MCR20Drv_PB_SPIBurstWrite( pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
andreikovacs 0:764779eedf2d 140
andreikovacs 0:764779eedf2d 141 pTxPacket->pPsdu = tmp;
andreikovacs 0:764779eedf2d 142 #endif
andreikovacs 0:764779eedf2d 143
andreikovacs 0:764779eedf2d 144 phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
andreikovacs 0:764779eedf2d 145 phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
andreikovacs 0:764779eedf2d 146
andreikovacs 0:764779eedf2d 147 // perform CCA before TX if required
andreikovacs 0:764779eedf2d 148 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_CCABFRTX);
andreikovacs 0:764779eedf2d 149 phyCtrl4Reg &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
andreikovacs 0:764779eedf2d 150
andreikovacs 0:764779eedf2d 151 if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
andreikovacs 0:764779eedf2d 152 {
andreikovacs 0:764779eedf2d 153 #if (gUseStandaloneCCABeforeTx_d == 0)
andreikovacs 0:764779eedf2d 154 phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_CCABFRTX);
andreikovacs 0:764779eedf2d 155 #endif
andreikovacs 0:764779eedf2d 156 phyCtrl4Reg |= (uint8_t) ((cPHY_CTRL4_CCATYPE & pTxPacket->CCABeforeTx) << (cPHY_CTRL4_CCATYPE_Shift_c));
andreikovacs 0:764779eedf2d 157 }
andreikovacs 0:764779eedf2d 158
andreikovacs 0:764779eedf2d 159 // slotted operation
andreikovacs 0:764779eedf2d 160 if( pTxPacket->slottedTx == gPhySlottedMode_c )
andreikovacs 0:764779eedf2d 161 {
andreikovacs 0:764779eedf2d 162 phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
andreikovacs 0:764779eedf2d 163 }
andreikovacs 0:764779eedf2d 164 else
andreikovacs 0:764779eedf2d 165 {
andreikovacs 0:764779eedf2d 166 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
andreikovacs 0:764779eedf2d 167 }
andreikovacs 0:764779eedf2d 168
andreikovacs 0:764779eedf2d 169 // perform TxRxAck sequence if required by phyTxMode
andreikovacs 0:764779eedf2d 170 if(pTxPacket->ackRequired == gPhyRxAckRqd_c)
andreikovacs 0:764779eedf2d 171 {
andreikovacs 0:764779eedf2d 172 PhyIsrPassRxParams(pRxParams);
andreikovacs 0:764779eedf2d 173
andreikovacs 0:764779eedf2d 174 phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
andreikovacs 0:764779eedf2d 175 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
andreikovacs 0:764779eedf2d 176 phyRegs[PHY_CTRL1] |= gTR_c;
andreikovacs 0:764779eedf2d 177 }
andreikovacs 0:764779eedf2d 178 else
andreikovacs 0:764779eedf2d 179 {
andreikovacs 0:764779eedf2d 180 PhyIsrPassRxParams(NULL);
andreikovacs 0:764779eedf2d 181
andreikovacs 0:764779eedf2d 182 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
andreikovacs 0:764779eedf2d 183 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
andreikovacs 0:764779eedf2d 184 phyRegs[PHY_CTRL1] |= gTX_c;
andreikovacs 0:764779eedf2d 185 }
andreikovacs 0:764779eedf2d 186
andreikovacs 0:764779eedf2d 187 #if gUseStandaloneCCABeforeTx_d
andreikovacs 0:764779eedf2d 188 if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
andreikovacs 0:764779eedf2d 189 {
andreikovacs 0:764779eedf2d 190 // start the CCA or ED sequence (this depends on CcaType used)
andreikovacs 0:764779eedf2d 191 // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
andreikovacs 0:764779eedf2d 192 if( pTxPacket->slottedTx == gPhySlottedMode_c )
andreikovacs 0:764779eedf2d 193 pTxParams->numOfCca = 2;
andreikovacs 0:764779eedf2d 194 else
andreikovacs 0:764779eedf2d 195 pTxParams->numOfCca = 1;
andreikovacs 0:764779eedf2d 196 pTxParams->ackRequired = pTxPacket->ackRequired;
andreikovacs 0:764779eedf2d 197 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
andreikovacs 0:764779eedf2d 198 phyRegs[PHY_CTRL1] |= gCCA_c;
andreikovacs 0:764779eedf2d 199 // at the end of the scheduled sequence, an interrupt will occur:
andreikovacs 0:764779eedf2d 200 // CCA , SEQ or TMR3
andreikovacs 0:764779eedf2d 201 }
andreikovacs 0:764779eedf2d 202 else
andreikovacs 0:764779eedf2d 203 {
andreikovacs 0:764779eedf2d 204 pTxParams->numOfCca = 0;
andreikovacs 0:764779eedf2d 205 }
andreikovacs 0:764779eedf2d 206 #endif
andreikovacs 0:764779eedf2d 207
andreikovacs 0:764779eedf2d 208 phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
andreikovacs 0:764779eedf2d 209
andreikovacs 0:764779eedf2d 210 // ensure that no spurious interrupts are raised
andreikovacs 0:764779eedf2d 211 phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
andreikovacs 0:764779eedf2d 212 phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
andreikovacs 0:764779eedf2d 213 cIRQSTS3_TMR2IRQ |
andreikovacs 0:764779eedf2d 214 cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
andreikovacs 0:764779eedf2d 215
andreikovacs 0:764779eedf2d 216 MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
andreikovacs 0:764779eedf2d 217 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
andreikovacs 0:764779eedf2d 218 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
andreikovacs 0:764779eedf2d 219
andreikovacs 0:764779eedf2d 220 // start the TX or TRX sequence
andreikovacs 0:764779eedf2d 221 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
andreikovacs 0:764779eedf2d 222
andreikovacs 0:764779eedf2d 223 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 224 }
andreikovacs 0:764779eedf2d 225
andreikovacs 0:764779eedf2d 226 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 227 * \brief This function will start a RX sequence
andreikovacs 0:764779eedf2d 228 *
andreikovacs 0:764779eedf2d 229 * \param[in] phyRxMode slotted/unslotted
andreikovacs 0:764779eedf2d 230 * \param[in] pRxParams pointer to RX parameters
andreikovacs 0:764779eedf2d 231 *
andreikovacs 0:764779eedf2d 232 * \return phyStatus_t
andreikovacs 0:764779eedf2d 233 *
andreikovacs 0:764779eedf2d 234 ********************************************************************************** */
andreikovacs 0:764779eedf2d 235 phyStatus_t PhyPlmeRxRequest( phySlottedMode_t phyRxMode, phyRxParams_t * pRxParams )
andreikovacs 0:764779eedf2d 236 {
andreikovacs 0:764779eedf2d 237 uint8_t phyRegs[5];
andreikovacs 0:764779eedf2d 238
andreikovacs 0:764779eedf2d 239 #ifdef PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 240 if(NULL == pRxParams)
andreikovacs 0:764779eedf2d 241 {
andreikovacs 0:764779eedf2d 242 return gPhyInvalidParameter_c;
andreikovacs 0:764779eedf2d 243 }
andreikovacs 0:764779eedf2d 244 #endif // PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 245
andreikovacs 0:764779eedf2d 246 if( gIdle_c != PhyPpGetState() )
andreikovacs 0:764779eedf2d 247 {
andreikovacs 0:764779eedf2d 248 return gPhyBusy_c;
andreikovacs 0:764779eedf2d 249 }
andreikovacs 0:764779eedf2d 250
andreikovacs 0:764779eedf2d 251 pRxParams->phyRxMode = phyRxMode;
andreikovacs 0:764779eedf2d 252
andreikovacs 0:764779eedf2d 253 if( NULL == pRxParams->pRxData )
andreikovacs 0:764779eedf2d 254 {
andreikovacs 0:764779eedf2d 255 pRxParams->pRxData = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + gMaxPHYPacketSize_c);
andreikovacs 0:764779eedf2d 256 }
andreikovacs 0:764779eedf2d 257
andreikovacs 0:764779eedf2d 258 if( NULL == pRxParams->pRxData )
andreikovacs 0:764779eedf2d 259 {
andreikovacs 0:764779eedf2d 260 phyTimeEvent_t event = {
andreikovacs 0:764779eedf2d 261 .timestamp = PhyTime_GetTimestamp() + gPhyRxRetryInterval_c,
andreikovacs 0:764779eedf2d 262 .parameter = (uint32_t)pRxParams,
andreikovacs 0:764779eedf2d 263 .callback = PhyRxRetry,
andreikovacs 0:764779eedf2d 264 };
andreikovacs 0:764779eedf2d 265
andreikovacs 0:764779eedf2d 266 PhyTime_ScheduleEvent( &event );
andreikovacs 0:764779eedf2d 267 return gPhyTRxOff_c;
andreikovacs 0:764779eedf2d 268 }
andreikovacs 0:764779eedf2d 269
andreikovacs 0:764779eedf2d 270 PhyIsrPassRxParams(pRxParams);
andreikovacs 0:764779eedf2d 271
andreikovacs 0:764779eedf2d 272 pRxParams->pRxData->msgData.dataInd.pPsdu =
andreikovacs 0:764779eedf2d 273 (uint8_t*)&pRxParams->pRxData->msgData.dataInd.pPsdu +
andreikovacs 0:764779eedf2d 274 sizeof(pRxParams->pRxData->msgData.dataInd.pPsdu);
andreikovacs 0:764779eedf2d 275
andreikovacs 0:764779eedf2d 276 phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
andreikovacs 0:764779eedf2d 277
andreikovacs 0:764779eedf2d 278 // slotted operation
andreikovacs 0:764779eedf2d 279 if(gPhySlottedMode_c == phyRxMode)
andreikovacs 0:764779eedf2d 280 {
andreikovacs 0:764779eedf2d 281 phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
andreikovacs 0:764779eedf2d 282 }
andreikovacs 0:764779eedf2d 283 else
andreikovacs 0:764779eedf2d 284 {
andreikovacs 0:764779eedf2d 285 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
andreikovacs 0:764779eedf2d 286 }
andreikovacs 0:764779eedf2d 287
andreikovacs 0:764779eedf2d 288 // program the RX sequence
andreikovacs 0:764779eedf2d 289 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
andreikovacs 0:764779eedf2d 290 phyRegs[PHY_CTRL1] |= gRX_c;
andreikovacs 0:764779eedf2d 291
andreikovacs 0:764779eedf2d 292 phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
andreikovacs 0:764779eedf2d 293
andreikovacs 0:764779eedf2d 294 // ensure that no spurious interrupts are raised
andreikovacs 0:764779eedf2d 295 phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
andreikovacs 0:764779eedf2d 296 phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
andreikovacs 0:764779eedf2d 297 cIRQSTS3_TMR2IRQ |
andreikovacs 0:764779eedf2d 298 cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
andreikovacs 0:764779eedf2d 299
andreikovacs 0:764779eedf2d 300 MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
andreikovacs 0:764779eedf2d 301 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
andreikovacs 0:764779eedf2d 302
andreikovacs 0:764779eedf2d 303 // start the RX sequence
andreikovacs 0:764779eedf2d 304 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
andreikovacs 0:764779eedf2d 305
andreikovacs 0:764779eedf2d 306 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 307 }
andreikovacs 0:764779eedf2d 308
andreikovacs 0:764779eedf2d 309 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 310 * \brief This function will start a CCA / CCCA sequence
andreikovacs 0:764779eedf2d 311 *
andreikovacs 0:764779eedf2d 312 * \param[in] ccaParam the type of CCA
andreikovacs 0:764779eedf2d 313 * \param[in] cccaMode continuous or single CCA
andreikovacs 0:764779eedf2d 314 *
andreikovacs 0:764779eedf2d 315 * \return phyStatus_t
andreikovacs 0:764779eedf2d 316 *
andreikovacs 0:764779eedf2d 317 ********************************************************************************** */
andreikovacs 0:764779eedf2d 318 phyStatus_t PhyPlmeCcaEdRequest( phyCCAType_t ccaParam, phyContCCAMode_t cccaMode )
andreikovacs 0:764779eedf2d 319 {
andreikovacs 0:764779eedf2d 320 uint8_t phyRegs[5];
andreikovacs 0:764779eedf2d 321
andreikovacs 0:764779eedf2d 322 #ifdef PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 323 // illegal CCA type
andreikovacs 0:764779eedf2d 324 if( (ccaParam != gPhyCCAMode1_c) && (ccaParam != gPhyCCAMode2_c) && (ccaParam != gPhyCCAMode3_c) && (ccaParam != gPhyEnergyDetectMode_c))
andreikovacs 0:764779eedf2d 325 {
andreikovacs 0:764779eedf2d 326 return gPhyInvalidParameter_c;
andreikovacs 0:764779eedf2d 327 }
andreikovacs 0:764779eedf2d 328
andreikovacs 0:764779eedf2d 329 // cannot perform Continuous CCA using ED type
andreikovacs 0:764779eedf2d 330 if( (ccaParam == gPhyEnergyDetectMode_c) && (cccaMode == gPhyContCcaEnabled) )
andreikovacs 0:764779eedf2d 331 {
andreikovacs 0:764779eedf2d 332 return gPhyInvalidParameter_c;
andreikovacs 0:764779eedf2d 333 }
andreikovacs 0:764779eedf2d 334 #endif // PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 335
andreikovacs 0:764779eedf2d 336 if( gIdle_c != PhyPpGetState() )
andreikovacs 0:764779eedf2d 337 {
andreikovacs 0:764779eedf2d 338 return gPhyBusy_c;
andreikovacs 0:764779eedf2d 339 }
andreikovacs 0:764779eedf2d 340
andreikovacs 0:764779eedf2d 341 // write in PHY CTRL4 the desired type of CCA
andreikovacs 0:764779eedf2d 342 phyRegs[0] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
andreikovacs 0:764779eedf2d 343 phyRegs[0] &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
andreikovacs 0:764779eedf2d 344 phyRegs[0] |= (uint8_t) ((cPHY_CTRL4_CCATYPE & ccaParam) << (cPHY_CTRL4_CCATYPE_Shift_c));
andreikovacs 0:764779eedf2d 345 MCR20Drv_DirectAccessSPIWrite( (uint8_t)PHY_CTRL4, phyRegs[0]);
andreikovacs 0:764779eedf2d 346
andreikovacs 0:764779eedf2d 347 phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
andreikovacs 0:764779eedf2d 348
andreikovacs 0:764779eedf2d 349 // continuous CCA
andreikovacs 0:764779eedf2d 350 if(cccaMode == gPhyContCcaEnabled)
andreikovacs 0:764779eedf2d 351 {
andreikovacs 0:764779eedf2d 352 // start the continuous CCA sequence
andreikovacs 0:764779eedf2d 353 // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
andreikovacs 0:764779eedf2d 354 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
andreikovacs 0:764779eedf2d 355 phyRegs[PHY_CTRL1] |= gCCCA_c;
andreikovacs 0:764779eedf2d 356 // at the end of the scheduled sequence, an interrupt will occur:
andreikovacs 0:764779eedf2d 357 // CCA , SEQ or TMR3
andreikovacs 0:764779eedf2d 358 }
andreikovacs 0:764779eedf2d 359 // normal CCA (not continuous)
andreikovacs 0:764779eedf2d 360 else
andreikovacs 0:764779eedf2d 361 {
andreikovacs 0:764779eedf2d 362 // start the CCA or ED sequence (this depends on CcaType used)
andreikovacs 0:764779eedf2d 363 // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
andreikovacs 0:764779eedf2d 364 phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
andreikovacs 0:764779eedf2d 365 phyRegs[PHY_CTRL1] |= gCCA_c;
andreikovacs 0:764779eedf2d 366 // at the end of the scheduled sequence, an interrupt will occur:
andreikovacs 0:764779eedf2d 367 // CCA , SEQ or TMR3
andreikovacs 0:764779eedf2d 368 }
andreikovacs 0:764779eedf2d 369
andreikovacs 0:764779eedf2d 370 phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
andreikovacs 0:764779eedf2d 371
andreikovacs 0:764779eedf2d 372 // ensure that no spurious interrupts are raised
andreikovacs 0:764779eedf2d 373 phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
andreikovacs 0:764779eedf2d 374 phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
andreikovacs 0:764779eedf2d 375 cIRQSTS3_TMR2IRQ |
andreikovacs 0:764779eedf2d 376 cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
andreikovacs 0:764779eedf2d 377
andreikovacs 0:764779eedf2d 378 MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
andreikovacs 0:764779eedf2d 379
andreikovacs 0:764779eedf2d 380 // start the CCA/ED or CCCA sequence
andreikovacs 0:764779eedf2d 381 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
andreikovacs 0:764779eedf2d 382 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
andreikovacs 0:764779eedf2d 383
andreikovacs 0:764779eedf2d 384 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 385 }
andreikovacs 0:764779eedf2d 386
andreikovacs 0:764779eedf2d 387 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 388 * \brief This function will set the channel number for the specified PAN
andreikovacs 0:764779eedf2d 389 *
andreikovacs 0:764779eedf2d 390 * \param[in] channel new channel number
andreikovacs 0:764779eedf2d 391 * \param[in] pan the PAN registers (0/1)
andreikovacs 0:764779eedf2d 392 *
andreikovacs 0:764779eedf2d 393 * \return phyStatus_t
andreikovacs 0:764779eedf2d 394 *
andreikovacs 0:764779eedf2d 395 ********************************************************************************** */
andreikovacs 0:764779eedf2d 396 phyStatus_t PhyPlmeSetCurrentChannelRequest
andreikovacs 0:764779eedf2d 397 (
andreikovacs 0:764779eedf2d 398 uint8_t channel,
andreikovacs 0:764779eedf2d 399 uint8_t pan
andreikovacs 0:764779eedf2d 400 )
andreikovacs 0:764779eedf2d 401 {
andreikovacs 0:764779eedf2d 402
andreikovacs 0:764779eedf2d 403 #ifdef PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 404 if((channel < 11) || (channel > 26))
andreikovacs 0:764779eedf2d 405 {
andreikovacs 0:764779eedf2d 406 return gPhyInvalidParameter_c;
andreikovacs 0:764779eedf2d 407 }
andreikovacs 0:764779eedf2d 408 #endif // PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 409
andreikovacs 0:764779eedf2d 410 if( !pan )
andreikovacs 0:764779eedf2d 411 {
andreikovacs 0:764779eedf2d 412 gPhyCurrentChannelPAN0 = channel;
andreikovacs 0:764779eedf2d 413 MCR20Drv_DirectAccessSPIWrite(PLL_INT0, pll_int[channel - 11]);
andreikovacs 0:764779eedf2d 414 MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
andreikovacs 0:764779eedf2d 415 }
andreikovacs 0:764779eedf2d 416 else
andreikovacs 0:764779eedf2d 417 {
andreikovacs 0:764779eedf2d 418 gPhyCurrentChannelPAN1 = channel;
andreikovacs 0:764779eedf2d 419 MCR20Drv_IndirectAccessSPIWrite(PLL_INT1, pll_int[channel - 11]);
andreikovacs 0:764779eedf2d 420 MCR20Drv_IndirectAccessSPIMultiByteWrite(PLL_FRAC1_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
andreikovacs 0:764779eedf2d 421 }
andreikovacs 0:764779eedf2d 422 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 423 }
andreikovacs 0:764779eedf2d 424
andreikovacs 0:764779eedf2d 425 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 426 * \brief This function will return the current channel for a specified PAN
andreikovacs 0:764779eedf2d 427 *
andreikovacs 0:764779eedf2d 428 * \param[in] pan the PAN registers (0/1)
andreikovacs 0:764779eedf2d 429 *
andreikovacs 0:764779eedf2d 430 * \return uint8_t current channel number
andreikovacs 0:764779eedf2d 431 *
andreikovacs 0:764779eedf2d 432 ********************************************************************************** */
andreikovacs 0:764779eedf2d 433 uint8_t PhyPlmeGetCurrentChannelRequest
andreikovacs 0:764779eedf2d 434 (
andreikovacs 0:764779eedf2d 435 uint8_t pan
andreikovacs 0:764779eedf2d 436 )
andreikovacs 0:764779eedf2d 437 {
andreikovacs 0:764779eedf2d 438 if( !pan )
andreikovacs 0:764779eedf2d 439 return gPhyCurrentChannelPAN0;
andreikovacs 0:764779eedf2d 440 else
andreikovacs 0:764779eedf2d 441 return gPhyCurrentChannelPAN1;
andreikovacs 0:764779eedf2d 442 }
andreikovacs 0:764779eedf2d 443
andreikovacs 0:764779eedf2d 444 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 445 * \brief This function will set the radio Tx power
andreikovacs 0:764779eedf2d 446 *
andreikovacs 0:764779eedf2d 447 * \param[in] pwrStep the Tx power
andreikovacs 0:764779eedf2d 448 *
andreikovacs 0:764779eedf2d 449 * \return phyStatus_t
andreikovacs 0:764779eedf2d 450 *
andreikovacs 0:764779eedf2d 451 ********************************************************************************** */
andreikovacs 0:764779eedf2d 452 phyStatus_t PhyPlmeSetPwrLevelRequest
andreikovacs 0:764779eedf2d 453 (
andreikovacs 0:764779eedf2d 454 uint8_t pwrStep
andreikovacs 0:764779eedf2d 455 )
andreikovacs 0:764779eedf2d 456 {
andreikovacs 0:764779eedf2d 457 #ifdef PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 458 if((pwrStep < 3) || (pwrStep > 31)) //-40 dBm to 16 dBm
andreikovacs 0:764779eedf2d 459 {
andreikovacs 0:764779eedf2d 460 return gPhyInvalidParameter_c;
andreikovacs 0:764779eedf2d 461 }
andreikovacs 0:764779eedf2d 462 #endif // PHY_PARAMETERS_VALIDATION
andreikovacs 0:764779eedf2d 463
andreikovacs 0:764779eedf2d 464 MCR20Drv_DirectAccessSPIWrite(PA_PWR, (uint8_t)(pwrStep & 0x1F));
andreikovacs 0:764779eedf2d 465 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 466 }
andreikovacs 0:764779eedf2d 467
andreikovacs 0:764779eedf2d 468 /*---------------------------------------------------------------------------
andreikovacs 0:764779eedf2d 469 * Name: PhyPlmeSetLQIModeRequest
andreikovacs 0:764779eedf2d 470 * Description: -
andreikovacs 0:764779eedf2d 471 * Parameters: -
andreikovacs 0:764779eedf2d 472 * Return: -
andreikovacs 0:764779eedf2d 473 *---------------------------------------------------------------------------*/
andreikovacs 0:764779eedf2d 474 uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode)
andreikovacs 0:764779eedf2d 475 {
andreikovacs 0:764779eedf2d 476 uint8_t currentMode;
andreikovacs 0:764779eedf2d 477
andreikovacs 0:764779eedf2d 478 currentMode = MCR20Drv_IndirectAccessSPIRead(CCA_CTRL);
andreikovacs 0:764779eedf2d 479 lqiMode ? (currentMode |= cCCA_CTRL_LQI_RSSI_NOT_CORR) : (currentMode &= (~((uint8_t)cCCA_CTRL_LQI_RSSI_NOT_CORR)));
andreikovacs 0:764779eedf2d 480 MCR20Drv_IndirectAccessSPIWrite(CCA_CTRL, currentMode);
andreikovacs 0:764779eedf2d 481
andreikovacs 0:764779eedf2d 482 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 483 }
andreikovacs 0:764779eedf2d 484
andreikovacs 0:764779eedf2d 485 /*---------------------------------------------------------------------------
andreikovacs 0:764779eedf2d 486 * Name: PhyPlmeGetRSSILevelRequest
andreikovacs 0:764779eedf2d 487 * Description: -
andreikovacs 0:764779eedf2d 488 * Parameters: -
andreikovacs 0:764779eedf2d 489 * Return: -
andreikovacs 0:764779eedf2d 490 *---------------------------------------------------------------------------*/
andreikovacs 0:764779eedf2d 491 uint8_t PhyPlmeGetRSSILevelRequest(void)
andreikovacs 0:764779eedf2d 492 {
andreikovacs 0:764779eedf2d 493 return MCR20Drv_IndirectAccessSPIRead(RSSI);
andreikovacs 0:764779eedf2d 494 }
andreikovacs 0:764779eedf2d 495
andreikovacs 0:764779eedf2d 496 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 497 * \brief This function will set the value of PHY PIBs
andreikovacs 0:764779eedf2d 498 *
andreikovacs 0:764779eedf2d 499 * \param[in] pibId the Id of the PIB
andreikovacs 0:764779eedf2d 500 * \param[in] pibValue the new value of the PIB
andreikovacs 0:764779eedf2d 501 * \param[in] phyRegistrySet the PAN registers (0/1)
andreikovacs 0:764779eedf2d 502 * \param[in] instanceId the instance of the PHY
andreikovacs 0:764779eedf2d 503 *
andreikovacs 0:764779eedf2d 504 * \return phyStatus_t
andreikovacs 0:764779eedf2d 505 *
andreikovacs 0:764779eedf2d 506 ********************************************************************************** */
andreikovacs 0:764779eedf2d 507 phyStatus_t PhyPlmeSetPIBRequest(phyPibId_t pibId, uint64_t pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
andreikovacs 0:764779eedf2d 508 {
andreikovacs 0:764779eedf2d 509 phyStatus_t result = gPhySuccess_c;
andreikovacs 0:764779eedf2d 510
andreikovacs 0:764779eedf2d 511 switch(pibId)
andreikovacs 0:764779eedf2d 512 {
andreikovacs 0:764779eedf2d 513 case gPhyPibCurrentChannel_c:
andreikovacs 0:764779eedf2d 514 {
andreikovacs 0:764779eedf2d 515 result = PhyPlmeSetCurrentChannelRequest((uint8_t) pibValue, phyRegistrySet);
andreikovacs 0:764779eedf2d 516 }
andreikovacs 0:764779eedf2d 517 break;
andreikovacs 0:764779eedf2d 518 case gPhyPibTransmitPower_c:
andreikovacs 0:764779eedf2d 519 {
andreikovacs 0:764779eedf2d 520 result = PhyPlmeSetPwrLevelRequest((uint8_t) pibValue);
andreikovacs 0:764779eedf2d 521 }
andreikovacs 0:764779eedf2d 522 break;
andreikovacs 0:764779eedf2d 523 case gPhyPibLongAddress_c:
andreikovacs 0:764779eedf2d 524 {
andreikovacs 0:764779eedf2d 525 uint64_t longAddr = pibValue;
andreikovacs 0:764779eedf2d 526 result = PhyPpSetLongAddr((uint8_t *) &longAddr, phyRegistrySet);
andreikovacs 0:764779eedf2d 527 }
andreikovacs 0:764779eedf2d 528 break;
andreikovacs 0:764779eedf2d 529 case gPhyPibShortAddress_c:
andreikovacs 0:764779eedf2d 530 {
andreikovacs 0:764779eedf2d 531 uint16_t shortAddr = (uint16_t) pibValue;
andreikovacs 0:764779eedf2d 532 result = PhyPpSetShortAddr((uint8_t *) &shortAddr, phyRegistrySet);
andreikovacs 0:764779eedf2d 533 }
andreikovacs 0:764779eedf2d 534 break;
andreikovacs 0:764779eedf2d 535 case gPhyPibPanId_c:
andreikovacs 0:764779eedf2d 536 {
andreikovacs 0:764779eedf2d 537 uint16_t panId = (uint16_t) pibValue;
andreikovacs 0:764779eedf2d 538 result = PhyPpSetPanId((uint8_t *) &panId, phyRegistrySet);
andreikovacs 0:764779eedf2d 539 }
andreikovacs 0:764779eedf2d 540 break;
andreikovacs 0:764779eedf2d 541 case gPhyPibPanCoordinator_c:
andreikovacs 0:764779eedf2d 542 {
andreikovacs 0:764779eedf2d 543 bool_t macRole = (bool_t) pibValue;
andreikovacs 0:764779eedf2d 544 result = PhyPpSetMacRole(macRole, phyRegistrySet);
andreikovacs 0:764779eedf2d 545 }
andreikovacs 0:764779eedf2d 546 break;
andreikovacs 0:764779eedf2d 547 case gPhyPibCurrentPage_c:
andreikovacs 0:764779eedf2d 548 {
andreikovacs 0:764779eedf2d 549 /* Nothinh to do... */
andreikovacs 0:764779eedf2d 550 }
andreikovacs 0:764779eedf2d 551 break;
andreikovacs 0:764779eedf2d 552 case gPhyPibPromiscuousMode_c:
andreikovacs 0:764779eedf2d 553 {
andreikovacs 0:764779eedf2d 554 PhyPpSetPromiscuous((uint8_t)pibValue);
andreikovacs 0:764779eedf2d 555 }
andreikovacs 0:764779eedf2d 556 break;
andreikovacs 0:764779eedf2d 557 case gPhyPibRxOnWhenIdle:
andreikovacs 0:764779eedf2d 558 {
andreikovacs 0:764779eedf2d 559 PhyPlmeSetRxOnWhenIdle( (bool_t)pibValue, instanceId );
andreikovacs 0:764779eedf2d 560 }
andreikovacs 0:764779eedf2d 561 break;
andreikovacs 0:764779eedf2d 562 case gPhyPibFrameWaitTime_c:
andreikovacs 0:764779eedf2d 563 {
andreikovacs 0:764779eedf2d 564 PhyPlmeSetFrameWaitTime( (uint32_t)pibValue, instanceId );
andreikovacs 0:764779eedf2d 565 }
andreikovacs 0:764779eedf2d 566 break;
andreikovacs 0:764779eedf2d 567 case gPhyPibDeferTxIfRxBusy_c:
andreikovacs 0:764779eedf2d 568 {
andreikovacs 0:764779eedf2d 569 if( pibValue )
andreikovacs 0:764779eedf2d 570 phyLocal[instanceId].flags |= gPhyFlagDeferTx_c;
andreikovacs 0:764779eedf2d 571 else
andreikovacs 0:764779eedf2d 572 phyLocal[instanceId].flags &= ~gPhyFlagDeferTx_c;
andreikovacs 0:764779eedf2d 573 }
andreikovacs 0:764779eedf2d 574 break;
andreikovacs 0:764779eedf2d 575 default:
andreikovacs 0:764779eedf2d 576 {
andreikovacs 0:764779eedf2d 577 result = gPhyUnsupportedAttribute_c;
andreikovacs 0:764779eedf2d 578 }
andreikovacs 0:764779eedf2d 579 break;
andreikovacs 0:764779eedf2d 580 }
andreikovacs 0:764779eedf2d 581
andreikovacs 0:764779eedf2d 582 return result;
andreikovacs 0:764779eedf2d 583 }
andreikovacs 0:764779eedf2d 584
andreikovacs 0:764779eedf2d 585 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 586 * \brief This function will return the value of PHY PIBs
andreikovacs 0:764779eedf2d 587 *
andreikovacs 0:764779eedf2d 588 * \param[in] pibId the Id of the PIB
andreikovacs 0:764779eedf2d 589 * \param[out] pibValue pointer to a location where the value will be stored
andreikovacs 0:764779eedf2d 590 * \param[in] phyRegistrySet the PAN registers (0/1)
andreikovacs 0:764779eedf2d 591 * \param[in] instanceId the instance of the PHY
andreikovacs 0:764779eedf2d 592 *
andreikovacs 0:764779eedf2d 593 * \return phyStatus_t
andreikovacs 0:764779eedf2d 594 *
andreikovacs 0:764779eedf2d 595 ********************************************************************************** */
andreikovacs 0:764779eedf2d 596 phyStatus_t PhyPlmeGetPIBRequest(phyPibId_t pibId, uint64_t * pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
andreikovacs 0:764779eedf2d 597 {
andreikovacs 0:764779eedf2d 598 phyStatus_t result = gPhySuccess_c;
andreikovacs 0:764779eedf2d 599 switch(pibId)
andreikovacs 0:764779eedf2d 600 {
andreikovacs 0:764779eedf2d 601 case gPhyPibCurrentChannel_c:
andreikovacs 0:764779eedf2d 602 {
andreikovacs 0:764779eedf2d 603 *((uint8_t*)pibValue) = (uint64_t) PhyPlmeGetCurrentChannelRequest(phyRegistrySet);
andreikovacs 0:764779eedf2d 604 }
andreikovacs 0:764779eedf2d 605 break;
andreikovacs 0:764779eedf2d 606 case gPhyPibTransmitPower_c:
andreikovacs 0:764779eedf2d 607 {
andreikovacs 0:764779eedf2d 608 *((uint8_t*)pibValue) = MCR20Drv_DirectAccessSPIRead(PA_PWR);
andreikovacs 0:764779eedf2d 609 }
andreikovacs 0:764779eedf2d 610 break;
andreikovacs 0:764779eedf2d 611 case gPhyPibLongAddress_c:
andreikovacs 0:764779eedf2d 612 {
andreikovacs 0:764779eedf2d 613 if( !phyRegistrySet )
andreikovacs 0:764779eedf2d 614 MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS0_0, (uint8_t*)pibValue, 8);
andreikovacs 0:764779eedf2d 615 else
andreikovacs 0:764779eedf2d 616 MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS1_0, (uint8_t*)pibValue, 8);
andreikovacs 0:764779eedf2d 617 }
andreikovacs 0:764779eedf2d 618 break;
andreikovacs 0:764779eedf2d 619 case gPhyPibShortAddress_c:
andreikovacs 0:764779eedf2d 620 {
andreikovacs 0:764779eedf2d 621 if( !phyRegistrySet )
andreikovacs 0:764779eedf2d 622 MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS0_LSB, (uint8_t*)pibValue, 2);
andreikovacs 0:764779eedf2d 623 else
andreikovacs 0:764779eedf2d 624 MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS1_LSB, (uint8_t*)pibValue, 2);
andreikovacs 0:764779eedf2d 625 }
andreikovacs 0:764779eedf2d 626 break;
andreikovacs 0:764779eedf2d 627 case gPhyPibPanId_c:
andreikovacs 0:764779eedf2d 628 {
andreikovacs 0:764779eedf2d 629 if( !phyRegistrySet )
andreikovacs 0:764779eedf2d 630 MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID0_LSB, (uint8_t*)pibValue, 2);
andreikovacs 0:764779eedf2d 631 else
andreikovacs 0:764779eedf2d 632 MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID1_LSB, (uint8_t*)pibValue, 2);
andreikovacs 0:764779eedf2d 633 }
andreikovacs 0:764779eedf2d 634 break;
andreikovacs 0:764779eedf2d 635 case gPhyPibPanCoordinator_c:
andreikovacs 0:764779eedf2d 636 {
andreikovacs 0:764779eedf2d 637 uint8_t phyReg;
andreikovacs 0:764779eedf2d 638
andreikovacs 0:764779eedf2d 639 if( !phyRegistrySet )
andreikovacs 0:764779eedf2d 640 {
andreikovacs 0:764779eedf2d 641 phyReg = MCR20Drv_DirectAccessSPIRead( PHY_CTRL4);
andreikovacs 0:764779eedf2d 642 phyReg = (phyReg & cPHY_CTRL4_PANCORDNTR0) == cPHY_CTRL4_PANCORDNTR0;
andreikovacs 0:764779eedf2d 643 }
andreikovacs 0:764779eedf2d 644 else
andreikovacs 0:764779eedf2d 645 {
andreikovacs 0:764779eedf2d 646 phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
andreikovacs 0:764779eedf2d 647 phyReg = (phyReg & cDUAL_PAN_CTRL_PANCORDNTR1) == cDUAL_PAN_CTRL_PANCORDNTR1;
andreikovacs 0:764779eedf2d 648 }
andreikovacs 0:764779eedf2d 649
andreikovacs 0:764779eedf2d 650 *((uint8_t*)pibValue) = phyReg;
andreikovacs 0:764779eedf2d 651 }
andreikovacs 0:764779eedf2d 652 break;
andreikovacs 0:764779eedf2d 653 case gPhyPibRxOnWhenIdle:
andreikovacs 0:764779eedf2d 654 {
andreikovacs 0:764779eedf2d 655 *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagRxOnWhenIdle_c);
andreikovacs 0:764779eedf2d 656 }
andreikovacs 0:764779eedf2d 657 break;
andreikovacs 0:764779eedf2d 658 case gPhyPibFrameWaitTime_c:
andreikovacs 0:764779eedf2d 659 {
andreikovacs 0:764779eedf2d 660 *((uint8_t*)pibValue) = phyLocal[instanceId].maxFrameWaitTime;
andreikovacs 0:764779eedf2d 661 }
andreikovacs 0:764779eedf2d 662 break;
andreikovacs 0:764779eedf2d 663 case gPhyPibDeferTxIfRxBusy_c:
andreikovacs 0:764779eedf2d 664 {
andreikovacs 0:764779eedf2d 665 *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagDeferTx_c);
andreikovacs 0:764779eedf2d 666 }
andreikovacs 0:764779eedf2d 667 break;
andreikovacs 0:764779eedf2d 668 default:
andreikovacs 0:764779eedf2d 669 {
andreikovacs 0:764779eedf2d 670 result = gPhyUnsupportedAttribute_c;
andreikovacs 0:764779eedf2d 671 }
andreikovacs 0:764779eedf2d 672 break;
andreikovacs 0:764779eedf2d 673 }
andreikovacs 0:764779eedf2d 674
andreikovacs 0:764779eedf2d 675 return result;
andreikovacs 0:764779eedf2d 676
andreikovacs 0:764779eedf2d 677 }
andreikovacs 0:764779eedf2d 678
andreikovacs 0:764779eedf2d 679 /************************************************************************************
andreikovacs 0:764779eedf2d 680 *************************************************************************************
andreikovacs 0:764779eedf2d 681 * Private functions
andreikovacs 0:764779eedf2d 682 *************************************************************************************
andreikovacs 0:764779eedf2d 683 ************************************************************************************/
andreikovacs 0:764779eedf2d 684 static void PhyRxRetry( uint32_t param )
andreikovacs 0:764779eedf2d 685 {
andreikovacs 0:764779eedf2d 686 PhyPlmeRxRequest( ((phyRxParams_t*)param)->phyRxMode, (phyRxParams_t*)param );
andreikovacs 0:764779eedf2d 687 }