A library implementing IEEE 802.15.4 PHY functionality for the MCR20A transceiver. The PHY sublayer provides two services: the PHY data service and the PHY management service interfacing to the PHY sublayer management entity (PLME) service access point (SAP) (known as PLME-SAP). The PHY data service enables the transmission and reception of PHY protocol data units (PSDUs) over the media (radio).

Fork of fsl_phy_mcr20a by Freescale

The Freescale PHY Layer deals with the physical burst which is to be sent and/or received. It performs modulation and demodulation, transmitter and receiver switching, fragmentation, scrambling, interleaving, and error correction coding. The communication to the upper protocol layers is carried out through the Layer 1 Interface.

The PHY Layer is capable of executing the following sequences:

  • I (Idle)
  • R (Receive Sequence conditionally followed by a TxAck)
  • T (Transmit Sequence)
  • C (Standalone CCA)
  • CCCA (Continuous CCA)
  • TR (Transmit/Receive Sequence - transmit unconditionally followed by either an R or RxAck)

In addition to these sequences the PHY Layer also integrates a packet processor which determines whether the packet is MAC-compliant, and if it is, whether it is addressed to the end device. Another feature of the packet processor is Source Address Matching which can be viewed as an extension of packet filtering; however its function is very specific to its intended application (data-polling and indirect queue management by a PAN Coordinator).

Documentation

MCR20A PHY Reference Manual

Committer:
andreikovacs
Date:
Tue Aug 18 12:41:42 2015 +0000
Revision:
0:764779eedf2d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
andreikovacs 0:764779eedf2d 1 /*!
andreikovacs 0:764779eedf2d 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
andreikovacs 0:764779eedf2d 3 * All rights reserved.
andreikovacs 0:764779eedf2d 4 *
andreikovacs 0:764779eedf2d 5 * \file ASP.c
andreikovacs 0:764779eedf2d 6 * This is the source file for the ASP module.
andreikovacs 0:764779eedf2d 7 *
andreikovacs 0:764779eedf2d 8 * Redistribution and use in source and binary forms, with or without modification,
andreikovacs 0:764779eedf2d 9 * are permitted provided that the following conditions are met:
andreikovacs 0:764779eedf2d 10 *
andreikovacs 0:764779eedf2d 11 * o Redistributions of source code must retain the above copyright notice, this list
andreikovacs 0:764779eedf2d 12 * of conditions and the following disclaimer.
andreikovacs 0:764779eedf2d 13 *
andreikovacs 0:764779eedf2d 14 * o Redistributions in binary form must reproduce the above copyright notice, this
andreikovacs 0:764779eedf2d 15 * list of conditions and the following disclaimer in the documentation and/or
andreikovacs 0:764779eedf2d 16 * other materials provided with the distribution.
andreikovacs 0:764779eedf2d 17 *
andreikovacs 0:764779eedf2d 18 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
andreikovacs 0:764779eedf2d 19 * contributors may be used to endorse or promote products derived from this
andreikovacs 0:764779eedf2d 20 * software without specific prior written permission.
andreikovacs 0:764779eedf2d 21 *
andreikovacs 0:764779eedf2d 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
andreikovacs 0:764779eedf2d 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
andreikovacs 0:764779eedf2d 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
andreikovacs 0:764779eedf2d 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
andreikovacs 0:764779eedf2d 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
andreikovacs 0:764779eedf2d 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
andreikovacs 0:764779eedf2d 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
andreikovacs 0:764779eedf2d 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
andreikovacs 0:764779eedf2d 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
andreikovacs 0:764779eedf2d 31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
andreikovacs 0:764779eedf2d 32 */
andreikovacs 0:764779eedf2d 33
andreikovacs 0:764779eedf2d 34 /************************************************************************************
andreikovacs 0:764779eedf2d 35 *************************************************************************************
andreikovacs 0:764779eedf2d 36 * Include
andreikovacs 0:764779eedf2d 37 *************************************************************************************
andreikovacs 0:764779eedf2d 38 ************************************************************************************/
andreikovacs 0:764779eedf2d 39
andreikovacs 0:764779eedf2d 40 #include "EmbeddedTypes.h"
andreikovacs 0:764779eedf2d 41 //#include "fsl_os_abstraction.h"
andreikovacs 0:764779eedf2d 42
andreikovacs 0:764779eedf2d 43 #include "Phy.h"
andreikovacs 0:764779eedf2d 44 #include "PhyInterface.h"
andreikovacs 0:764779eedf2d 45 #include "MpmInterface.h"
andreikovacs 0:764779eedf2d 46 #include "AspInterface.h"
andreikovacs 0:764779eedf2d 47
andreikovacs 0:764779eedf2d 48 #if 0
andreikovacs 0:764779eedf2d 49 #include "MemManager.h"
andreikovacs 0:764779eedf2d 50 #include "FunctionLib.h"
andreikovacs 0:764779eedf2d 51 #include "Panic.h"
andreikovacs 0:764779eedf2d 52 #endif
andreikovacs 0:764779eedf2d 53
andreikovacs 0:764779eedf2d 54 #include "MCR20Drv.h"
andreikovacs 0:764779eedf2d 55 #include "MCR20Reg.h"
andreikovacs 0:764779eedf2d 56
andreikovacs 0:764779eedf2d 57 #if gFsciIncluded_c
andreikovacs 0:764779eedf2d 58 #include "FsciInterface.h"
andreikovacs 0:764779eedf2d 59 #include "FsciCommands.h"
andreikovacs 0:764779eedf2d 60 #include "FsciCommunication.h"
andreikovacs 0:764779eedf2d 61 #endif
andreikovacs 0:764779eedf2d 62
andreikovacs 0:764779eedf2d 63 #define gSmacSupported (1)
andreikovacs 0:764779eedf2d 64
andreikovacs 0:764779eedf2d 65 #ifdef gSmacSupported
andreikovacs 0:764779eedf2d 66 #include "SMAC_Interface.h"
andreikovacs 0:764779eedf2d 67 #endif
andreikovacs 0:764779eedf2d 68 #if gAspCapability_d
andreikovacs 0:764779eedf2d 69
andreikovacs 0:764779eedf2d 70 /************************************************************************************
andreikovacs 0:764779eedf2d 71 *************************************************************************************
andreikovacs 0:764779eedf2d 72 * Public macros
andreikovacs 0:764779eedf2d 73 *************************************************************************************
andreikovacs 0:764779eedf2d 74 ************************************************************************************/
andreikovacs 0:764779eedf2d 75 #define mFAD_THR_ResetValue 0x82
andreikovacs 0:764779eedf2d 76 #define mANT_AGC_CTRL_ResetValue 0x40
andreikovacs 0:764779eedf2d 77
andreikovacs 0:764779eedf2d 78 /************************************************************************************
andreikovacs 0:764779eedf2d 79 *************************************************************************************
andreikovacs 0:764779eedf2d 80 * Public type definitions
andreikovacs 0:764779eedf2d 81 *************************************************************************************
andreikovacs 0:764779eedf2d 82 ************************************************************************************/
andreikovacs 0:764779eedf2d 83 //MCR20 DTS modes
andreikovacs 0:764779eedf2d 84 enum {
andreikovacs 0:764779eedf2d 85 gDtsNormal_c,
andreikovacs 0:764779eedf2d 86 gDtsTxOne_c,
andreikovacs 0:764779eedf2d 87 gDtsTxZero_c,
andreikovacs 0:764779eedf2d 88 gDtsTx2Mhz_c,
andreikovacs 0:764779eedf2d 89 gDtsTx200Khz_c,
andreikovacs 0:764779eedf2d 90 gDtsTx1MbpsPRBS9_c,
andreikovacs 0:764779eedf2d 91 gDtsTxExternalSrc_c,
andreikovacs 0:764779eedf2d 92 gDtsTxRandomSeq_c
andreikovacs 0:764779eedf2d 93 };
andreikovacs 0:764779eedf2d 94
andreikovacs 0:764779eedf2d 95 /************************************************************************************
andreikovacs 0:764779eedf2d 96 *************************************************************************************
andreikovacs 0:764779eedf2d 97 * Private functions prototype
andreikovacs 0:764779eedf2d 98 *************************************************************************************
andreikovacs 0:764779eedf2d 99 ************************************************************************************/
andreikovacs 0:764779eedf2d 100 phyStatus_t AspSetDtsMode( uint8_t mode );
andreikovacs 0:764779eedf2d 101 phyStatus_t AspEnableBER( void );
andreikovacs 0:764779eedf2d 102 void AspDisableBER( void );
andreikovacs 0:764779eedf2d 103
andreikovacs 0:764779eedf2d 104 #if gFsciIncluded_c
andreikovacs 0:764779eedf2d 105 static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId);
andreikovacs 0:764779eedf2d 106 static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId);
andreikovacs 0:764779eedf2d 107 #endif
andreikovacs 0:764779eedf2d 108
andreikovacs 0:764779eedf2d 109 /************************************************************************************
andreikovacs 0:764779eedf2d 110 *************************************************************************************
andreikovacs 0:764779eedf2d 111 * Private memory declarations
andreikovacs 0:764779eedf2d 112 *************************************************************************************
andreikovacs 0:764779eedf2d 113 ************************************************************************************/
andreikovacs 0:764779eedf2d 114 //2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
andreikovacs 0:764779eedf2d 115 static const uint16_t asp_pll_frac[16] = {0x2400, 0x4C00, 0x7400, 0x9C00, 0xC400, 0xEC00, 0x1400, 0x3C00, 0x6400, 0x8C00, 0xB400, 0xDC00, 0x0400, 0x2C00, 0x5400, 0x7C00};
andreikovacs 0:764779eedf2d 116
andreikovacs 0:764779eedf2d 117 #if gFsciIncluded_c
andreikovacs 0:764779eedf2d 118 static uint8_t mAspFsciBinding[gPhyInstancesCnt_c];
andreikovacs 0:764779eedf2d 119 #endif
andreikovacs 0:764779eedf2d 120
andreikovacs 0:764779eedf2d 121 /************************************************************************************
andreikovacs 0:764779eedf2d 122 *************************************************************************************
andreikovacs 0:764779eedf2d 123 * Public functions
andreikovacs 0:764779eedf2d 124 *************************************************************************************
andreikovacs 0:764779eedf2d 125 ************************************************************************************/
andreikovacs 0:764779eedf2d 126
andreikovacs 0:764779eedf2d 127 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 128 * \brief Initialize the ASP module
andreikovacs 0:764779eedf2d 129 *
andreikovacs 0:764779eedf2d 130 * \param[in] phyInstance The instance of the PHY
andreikovacs 0:764779eedf2d 131 * \param[in] interfaceId The Serial Manager interface used
andreikovacs 0:764779eedf2d 132 *
andreikovacs 0:764779eedf2d 133 ********************************************************************************** */
andreikovacs 0:764779eedf2d 134 #undef mFuncId_c
andreikovacs 0:764779eedf2d 135 #define mFuncId_c 0
andreikovacs 0:764779eedf2d 136 void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId )
andreikovacs 0:764779eedf2d 137 {
andreikovacs 0:764779eedf2d 138 #if gFsciIncluded_c
andreikovacs 0:764779eedf2d 139 if( phyInstance < gPhyInstancesCnt_c )
andreikovacs 0:764779eedf2d 140 {
andreikovacs 0:764779eedf2d 141 mAspFsciBinding[phyInstance] = interfaceId;
andreikovacs 0:764779eedf2d 142 FSCI_RegisterOpGroup( gFSCI_AppAspOpcodeGroup_c, gFsciMonitorMode_c, fsciAspReqHandler, NULL, gAspInterfaceId);
andreikovacs 0:764779eedf2d 143 FSCI_RegisterOpGroup( gFSCI_AspSapId_c, gFsciMonitorMode_c, AspSapMonitor, NULL, gAspInterfaceId);
andreikovacs 0:764779eedf2d 144 }
andreikovacs 0:764779eedf2d 145 #endif
andreikovacs 0:764779eedf2d 146 }
andreikovacs 0:764779eedf2d 147
andreikovacs 0:764779eedf2d 148 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 149 * \brief ASP SAP handler.
andreikovacs 0:764779eedf2d 150 *
andreikovacs 0:764779eedf2d 151 * \param[in] pMsg Pointer to the request message
andreikovacs 0:764779eedf2d 152 * \param[in] instanceId The instance of the PHY
andreikovacs 0:764779eedf2d 153 *
andreikovacs 0:764779eedf2d 154 * \return AspStatus_t
andreikovacs 0:764779eedf2d 155 *
andreikovacs 0:764779eedf2d 156 ********************************************************************************** */
andreikovacs 0:764779eedf2d 157 #undef mFuncId_c
andreikovacs 0:764779eedf2d 158 #define mFuncId_c 1
andreikovacs 0:764779eedf2d 159 AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId)
andreikovacs 0:764779eedf2d 160 {
andreikovacs 0:764779eedf2d 161 AspStatus_t status = gAspSuccess_c;
andreikovacs 0:764779eedf2d 162 #if gFsciIncluded_c
andreikovacs 0:764779eedf2d 163 FSCI_Monitor( gFSCI_AspSapId_c,
andreikovacs 0:764779eedf2d 164 pMsg,
andreikovacs 0:764779eedf2d 165 NULL,
andreikovacs 0:764779eedf2d 166 gAspInterfaceId );
andreikovacs 0:764779eedf2d 167 #endif
andreikovacs 0:764779eedf2d 168 switch( pMsg->msgType )
andreikovacs 0:764779eedf2d 169 {
andreikovacs 0:764779eedf2d 170 case aspMsgTypeGetTimeReq_c:
andreikovacs 0:764779eedf2d 171 Asp_GetTimeReq((uint32_t*)&pMsg->msgData.aspGetTimeReq.time);
andreikovacs 0:764779eedf2d 172 break;
andreikovacs 0:764779eedf2d 173 case aspMsgTypeXcvrWriteReq_c:
andreikovacs 0:764779eedf2d 174 status = Asp_XcvrWriteReq( pMsg->msgData.aspXcvrData.mode,
andreikovacs 0:764779eedf2d 175 pMsg->msgData.aspXcvrData.addr,
andreikovacs 0:764779eedf2d 176 pMsg->msgData.aspXcvrData.len,
andreikovacs 0:764779eedf2d 177 pMsg->msgData.aspXcvrData.data);
andreikovacs 0:764779eedf2d 178 break;
andreikovacs 0:764779eedf2d 179 case aspMsgTypeXcvrReadReq_c:
andreikovacs 0:764779eedf2d 180 status = Asp_XcvrReadReq( pMsg->msgData.aspXcvrData.mode,
andreikovacs 0:764779eedf2d 181 pMsg->msgData.aspXcvrData.addr,
andreikovacs 0:764779eedf2d 182 pMsg->msgData.aspXcvrData.len,
andreikovacs 0:764779eedf2d 183 pMsg->msgData.aspXcvrData.data);
andreikovacs 0:764779eedf2d 184 break;
andreikovacs 0:764779eedf2d 185 case aspMsgTypeSetFADState_c:
andreikovacs 0:764779eedf2d 186 status = Asp_SetFADState(pMsg->msgData.aspFADState);
andreikovacs 0:764779eedf2d 187 break;
andreikovacs 0:764779eedf2d 188 case aspMsgTypeSetFADThreshold_c:
andreikovacs 0:764779eedf2d 189 status = Asp_SetFADThreshold(pMsg->msgData.aspFADThreshold);
andreikovacs 0:764779eedf2d 190 break;
andreikovacs 0:764779eedf2d 191 case aspMsgTypeSetANTXState_c:
andreikovacs 0:764779eedf2d 192 status = Asp_SetANTXState(pMsg->msgData.aspANTXState);
andreikovacs 0:764779eedf2d 193 break;
andreikovacs 0:764779eedf2d 194 case aspMsgTypeGetANTXState_c:
andreikovacs 0:764779eedf2d 195 *((uint8_t*)&status) = Asp_GetANTXState();
andreikovacs 0:764779eedf2d 196 break;
andreikovacs 0:764779eedf2d 197 case aspMsgTypeSetPowerLevel_c:
andreikovacs 0:764779eedf2d 198 status = Asp_SetPowerLevel(pMsg->msgData.aspSetPowerLevelReq.powerLevel);
andreikovacs 0:764779eedf2d 199 break;
andreikovacs 0:764779eedf2d 200 case aspMsgTypeGetPowerLevel_c:
andreikovacs 0:764779eedf2d 201 *((uint8_t*)&status) = Asp_GetPowerLevel(); //remove compiler warning
andreikovacs 0:764779eedf2d 202 break;
andreikovacs 0:764779eedf2d 203 case aspMsgTypeTelecSetFreq_c:
andreikovacs 0:764779eedf2d 204 status = ASP_TelecSetFreq(pMsg->msgData.aspTelecsetFreq.channel);
andreikovacs 0:764779eedf2d 205 break;
andreikovacs 0:764779eedf2d 206 case aspMsgTypeTelecSendRawData_c:
andreikovacs 0:764779eedf2d 207 status = ASP_TelecSendRawData((uint8_t*)&pMsg->msgData.aspTelecSendRawData);
andreikovacs 0:764779eedf2d 208 break;
andreikovacs 0:764779eedf2d 209 case aspMsgTypeTelecTest_c:
andreikovacs 0:764779eedf2d 210 status = ASP_TelecTest(pMsg->msgData.aspTelecTest.mode);
andreikovacs 0:764779eedf2d 211 break;
andreikovacs 0:764779eedf2d 212 case aspMsgTypeSetLQIMode_c:
andreikovacs 0:764779eedf2d 213 status = Asp_SetLQIMode(pMsg->msgData.aspLQIMode);
andreikovacs 0:764779eedf2d 214 break;
andreikovacs 0:764779eedf2d 215 case aspMsgTypeGetRSSILevel_c:
andreikovacs 0:764779eedf2d 216 *((uint8_t*)&status) = Asp_GetRSSILevel(); //remove compiler warning
andreikovacs 0:764779eedf2d 217 break;
andreikovacs 0:764779eedf2d 218 #if gMpmIncluded_d
andreikovacs 0:764779eedf2d 219 case aspMsgTypeSetMpmConfig_c:
andreikovacs 0:764779eedf2d 220 MPM_SetConfig(&pMsg->msgData.MpmConfig);
andreikovacs 0:764779eedf2d 221 break;
andreikovacs 0:764779eedf2d 222 case aspMsgTypeGetMpmConfig_c:
andreikovacs 0:764779eedf2d 223 MPM_GetConfig(&pMsg->msgData.MpmConfig);
andreikovacs 0:764779eedf2d 224 break;
andreikovacs 0:764779eedf2d 225 #endif
andreikovacs 0:764779eedf2d 226 default:
andreikovacs 0:764779eedf2d 227 status = gAspInvalidRequest_c;// OR gAspInvalidParameter_c
andreikovacs 0:764779eedf2d 228 break;
andreikovacs 0:764779eedf2d 229 }
andreikovacs 0:764779eedf2d 230 #if gFsciIncluded_c
andreikovacs 0:764779eedf2d 231 FSCI_Monitor( gFSCI_AspSapId_c,
andreikovacs 0:764779eedf2d 232 pMsg,
andreikovacs 0:764779eedf2d 233 (void*)&status,
andreikovacs 0:764779eedf2d 234 gAspInterfaceId );
andreikovacs 0:764779eedf2d 235 #endif
andreikovacs 0:764779eedf2d 236 return status;
andreikovacs 0:764779eedf2d 237 }
andreikovacs 0:764779eedf2d 238
andreikovacs 0:764779eedf2d 239 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 240 * \brief Returns the current PHY time
andreikovacs 0:764779eedf2d 241 *
andreikovacs 0:764779eedf2d 242 * \param[in] time location where the PHY time will be stored
andreikovacs 0:764779eedf2d 243 *
andreikovacs 0:764779eedf2d 244 ********************************************************************************** */
andreikovacs 0:764779eedf2d 245 #undef mFuncId_c
andreikovacs 0:764779eedf2d 246 #define mFuncId_c 2
andreikovacs 0:764779eedf2d 247 void Asp_GetTimeReq(uint32_t *time)
andreikovacs 0:764779eedf2d 248 {
andreikovacs 0:764779eedf2d 249 PhyTimeReadClock( time );
andreikovacs 0:764779eedf2d 250 }
andreikovacs 0:764779eedf2d 251
andreikovacs 0:764779eedf2d 252 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 253 * \brief Write XCVR registers
andreikovacs 0:764779eedf2d 254 *
andreikovacs 0:764779eedf2d 255 * \param[in] mode Direct/Indirect access
andreikovacs 0:764779eedf2d 256 * \param[in] addr XCVR address
andreikovacs 0:764779eedf2d 257 * \param[in] len number of bytes to write
andreikovacs 0:764779eedf2d 258 * \param[in] pData data o be written
andreikovacs 0:764779eedf2d 259 *
andreikovacs 0:764779eedf2d 260 * \return AspStatus_t
andreikovacs 0:764779eedf2d 261 *
andreikovacs 0:764779eedf2d 262 ********************************************************************************** */
andreikovacs 0:764779eedf2d 263 #undef mFuncId_c
andreikovacs 0:764779eedf2d 264 #define mFuncId_c 3
andreikovacs 0:764779eedf2d 265 AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
andreikovacs 0:764779eedf2d 266 {
andreikovacs 0:764779eedf2d 267 if (mode)
andreikovacs 0:764779eedf2d 268 MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
andreikovacs 0:764779eedf2d 269 else
andreikovacs 0:764779eedf2d 270 MCR20Drv_DirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
andreikovacs 0:764779eedf2d 271
andreikovacs 0:764779eedf2d 272 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 273 }
andreikovacs 0:764779eedf2d 274
andreikovacs 0:764779eedf2d 275 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 276 * \brief Read XCVR registers
andreikovacs 0:764779eedf2d 277 *
andreikovacs 0:764779eedf2d 278 * \param[in] mode Direct/Indirect access
andreikovacs 0:764779eedf2d 279 * \param[in] addr XCVR address
andreikovacs 0:764779eedf2d 280 * \param[in] len number of bytes to read
andreikovacs 0:764779eedf2d 281 * \param[in] pData location where data will be stored
andreikovacs 0:764779eedf2d 282 *
andreikovacs 0:764779eedf2d 283 * \return AspStatus_t
andreikovacs 0:764779eedf2d 284 *
andreikovacs 0:764779eedf2d 285 ********************************************************************************** */
andreikovacs 0:764779eedf2d 286 #undef mFuncId_c
andreikovacs 0:764779eedf2d 287 #define mFuncId_c 4
andreikovacs 0:764779eedf2d 288 AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
andreikovacs 0:764779eedf2d 289 {
andreikovacs 0:764779eedf2d 290 if (mode)
andreikovacs 0:764779eedf2d 291 MCR20Drv_IndirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
andreikovacs 0:764779eedf2d 292 else
andreikovacs 0:764779eedf2d 293 MCR20Drv_DirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
andreikovacs 0:764779eedf2d 294
andreikovacs 0:764779eedf2d 295 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 296 }
andreikovacs 0:764779eedf2d 297
andreikovacs 0:764779eedf2d 298 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 299 * \brief Set Tx output power level
andreikovacs 0:764779eedf2d 300 *
andreikovacs 0:764779eedf2d 301 * \param[in] powerLevel The new power level: 0x03-0x1F (see documentation for details)
andreikovacs 0:764779eedf2d 302 *
andreikovacs 0:764779eedf2d 303 * \return AspStatus_t
andreikovacs 0:764779eedf2d 304 *
andreikovacs 0:764779eedf2d 305 ********************************************************************************** */
andreikovacs 0:764779eedf2d 306 #undef mFuncId_c
andreikovacs 0:764779eedf2d 307 #define mFuncId_c 5
andreikovacs 0:764779eedf2d 308 AspStatus_t Asp_SetPowerLevel( uint8_t powerLevel )
andreikovacs 0:764779eedf2d 309 {
andreikovacs 0:764779eedf2d 310 if(powerLevel > gAspPowerLevel_16dBm)
andreikovacs 0:764779eedf2d 311 return gAspInvalidParameter_c;
andreikovacs 0:764779eedf2d 312
andreikovacs 0:764779eedf2d 313 {
andreikovacs 0:764779eedf2d 314 uint8_t res;
andreikovacs 0:764779eedf2d 315
andreikovacs 0:764779eedf2d 316 res = PhyPlmeSetPwrLevelRequest(powerLevel);
andreikovacs 0:764779eedf2d 317
andreikovacs 0:764779eedf2d 318 if( res == gPhySuccess_c )
andreikovacs 0:764779eedf2d 319 {
andreikovacs 0:764779eedf2d 320 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 321 }
andreikovacs 0:764779eedf2d 322 else
andreikovacs 0:764779eedf2d 323 {
andreikovacs 0:764779eedf2d 324 return gAspDenied_c;
andreikovacs 0:764779eedf2d 325 }
andreikovacs 0:764779eedf2d 326 }
andreikovacs 0:764779eedf2d 327 }
andreikovacs 0:764779eedf2d 328
andreikovacs 0:764779eedf2d 329 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 330 * \brief Read the current Tx power level
andreikovacs 0:764779eedf2d 331 *
andreikovacs 0:764779eedf2d 332 * \return power level
andreikovacs 0:764779eedf2d 333 *
andreikovacs 0:764779eedf2d 334 ********************************************************************************** */
andreikovacs 0:764779eedf2d 335 #undef mFuncId_c
andreikovacs 0:764779eedf2d 336 #define mFuncId_c 6
andreikovacs 0:764779eedf2d 337 uint8_t Asp_GetPowerLevel()
andreikovacs 0:764779eedf2d 338 {
andreikovacs 0:764779eedf2d 339 return MCR20Drv_DirectAccessSPIRead(PA_PWR);
andreikovacs 0:764779eedf2d 340 }
andreikovacs 0:764779eedf2d 341
andreikovacs 0:764779eedf2d 342 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 343 * \brief Set the state of Active Promiscuous functionality
andreikovacs 0:764779eedf2d 344 *
andreikovacs 0:764779eedf2d 345 * \param[in] state new state
andreikovacs 0:764779eedf2d 346 *
andreikovacs 0:764779eedf2d 347 * \return AspStatus_t
andreikovacs 0:764779eedf2d 348 *
andreikovacs 0:764779eedf2d 349 ********************************************************************************** */
andreikovacs 0:764779eedf2d 350 #undef mFuncId_c
andreikovacs 0:764779eedf2d 351 #define mFuncId_c 7
andreikovacs 0:764779eedf2d 352 AspStatus_t Asp_SetActivePromState(bool_t state)
andreikovacs 0:764779eedf2d 353 {
andreikovacs 0:764779eedf2d 354 PhySetActivePromiscuous(state);
andreikovacs 0:764779eedf2d 355 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 356 }
andreikovacs 0:764779eedf2d 357
andreikovacs 0:764779eedf2d 358 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 359 * \brief Set the state of Fast Antenna Diversity functionality
andreikovacs 0:764779eedf2d 360 *
andreikovacs 0:764779eedf2d 361 * \param[in] state new state
andreikovacs 0:764779eedf2d 362 *
andreikovacs 0:764779eedf2d 363 * \return AspStatus_t
andreikovacs 0:764779eedf2d 364 *
andreikovacs 0:764779eedf2d 365 ********************************************************************************** */
andreikovacs 0:764779eedf2d 366 #undef mFuncId_c
andreikovacs 0:764779eedf2d 367 #define mFuncId_c 8
andreikovacs 0:764779eedf2d 368 AspStatus_t Asp_SetFADState(bool_t state)
andreikovacs 0:764779eedf2d 369 {
andreikovacs 0:764779eedf2d 370 if( gPhySuccess_c != PhyPlmeSetFADStateRequest(state) )
andreikovacs 0:764779eedf2d 371 {
andreikovacs 0:764779eedf2d 372 return gAspDenied_c;
andreikovacs 0:764779eedf2d 373 }
andreikovacs 0:764779eedf2d 374 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 375 }
andreikovacs 0:764779eedf2d 376
andreikovacs 0:764779eedf2d 377 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 378 * \brief Set the Fast Antenna Diversity threshold
andreikovacs 0:764779eedf2d 379 *
andreikovacs 0:764779eedf2d 380 * \param[in] threshold
andreikovacs 0:764779eedf2d 381 *
andreikovacs 0:764779eedf2d 382 * \return AspStatus_t
andreikovacs 0:764779eedf2d 383 *
andreikovacs 0:764779eedf2d 384 ********************************************************************************** */
andreikovacs 0:764779eedf2d 385 #undef mFuncId_c
andreikovacs 0:764779eedf2d 386 #define mFuncId_c 9
andreikovacs 0:764779eedf2d 387 AspStatus_t Asp_SetFADThreshold(uint8_t threshold)
andreikovacs 0:764779eedf2d 388 {
andreikovacs 0:764779eedf2d 389 if( gPhySuccess_c != PhyPlmeSetFADThresholdRequest(threshold) )
andreikovacs 0:764779eedf2d 390 {
andreikovacs 0:764779eedf2d 391 return gAspDenied_c;
andreikovacs 0:764779eedf2d 392 }
andreikovacs 0:764779eedf2d 393 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 394 }
andreikovacs 0:764779eedf2d 395
andreikovacs 0:764779eedf2d 396 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 397 * \brief Set the ANTX functionality
andreikovacs 0:764779eedf2d 398 *
andreikovacs 0:764779eedf2d 399 * \param[in] state
andreikovacs 0:764779eedf2d 400 *
andreikovacs 0:764779eedf2d 401 * \return AspStatus_t
andreikovacs 0:764779eedf2d 402 *
andreikovacs 0:764779eedf2d 403 ********************************************************************************** */
andreikovacs 0:764779eedf2d 404 #undef mFuncId_c
andreikovacs 0:764779eedf2d 405 #define mFuncId_c 10
andreikovacs 0:764779eedf2d 406 AspStatus_t Asp_SetANTXState(bool_t state)
andreikovacs 0:764779eedf2d 407 {
andreikovacs 0:764779eedf2d 408 if( gPhySuccess_c != PhyPlmeSetANTXStateRequest(state) )
andreikovacs 0:764779eedf2d 409 {
andreikovacs 0:764779eedf2d 410 return gAspDenied_c;
andreikovacs 0:764779eedf2d 411 }
andreikovacs 0:764779eedf2d 412 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 413 }
andreikovacs 0:764779eedf2d 414
andreikovacs 0:764779eedf2d 415 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 416 * \brief Get the ANTX functionality
andreikovacs 0:764779eedf2d 417 *
andreikovacs 0:764779eedf2d 418 * \return current state
andreikovacs 0:764779eedf2d 419 *
andreikovacs 0:764779eedf2d 420 ********************************************************************************** */
andreikovacs 0:764779eedf2d 421 #undef mFuncId_c
andreikovacs 0:764779eedf2d 422 #define mFuncId_c 11
andreikovacs 0:764779eedf2d 423 uint8_t Asp_GetANTXState(void)
andreikovacs 0:764779eedf2d 424 {
andreikovacs 0:764779eedf2d 425 return PhyPlmeGetANTXStateRequest();
andreikovacs 0:764779eedf2d 426 }
andreikovacs 0:764779eedf2d 427
andreikovacs 0:764779eedf2d 428 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 429 * \brief Set the ANTX pad state
andreikovacs 0:764779eedf2d 430 *
andreikovacs 0:764779eedf2d 431 * \param[in] antAB_on
andreikovacs 0:764779eedf2d 432 * \param[in] rxtxSwitch_on
andreikovacs 0:764779eedf2d 433 *
andreikovacs 0:764779eedf2d 434 * \return status
andreikovacs 0:764779eedf2d 435 *
andreikovacs 0:764779eedf2d 436 ********************************************************************************** */
andreikovacs 0:764779eedf2d 437 #undef mFuncId_c
andreikovacs 0:764779eedf2d 438 #define mFuncId_c 12
andreikovacs 0:764779eedf2d 439 uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
andreikovacs 0:764779eedf2d 440 {
andreikovacs 0:764779eedf2d 441 return PhyPlmeSetANTPadStateRequest(antAB_on, rxtxSwitch_on);
andreikovacs 0:764779eedf2d 442 }
andreikovacs 0:764779eedf2d 443
andreikovacs 0:764779eedf2d 444 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 445 * \brief Set the ANTX pad strength
andreikovacs 0:764779eedf2d 446 *
andreikovacs 0:764779eedf2d 447 * \param[in] hiStrength
andreikovacs 0:764779eedf2d 448 *
andreikovacs 0:764779eedf2d 449 * \return status
andreikovacs 0:764779eedf2d 450 *
andreikovacs 0:764779eedf2d 451 ********************************************************************************** */
andreikovacs 0:764779eedf2d 452 #undef mFuncId_c
andreikovacs 0:764779eedf2d 453 #define mFuncId_c 13
andreikovacs 0:764779eedf2d 454 uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength)
andreikovacs 0:764779eedf2d 455 {
andreikovacs 0:764779eedf2d 456 return PhyPlmeSetANTPadStrengthRequest(hiStrength);
andreikovacs 0:764779eedf2d 457 }
andreikovacs 0:764779eedf2d 458
andreikovacs 0:764779eedf2d 459 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 460 * \brief Set the ANTX inverted pads
andreikovacs 0:764779eedf2d 461 *
andreikovacs 0:764779eedf2d 462 * \param[in] invAntA invert Ant_A pad
andreikovacs 0:764779eedf2d 463 * \param[in] invAntB invert Ant_B pad
andreikovacs 0:764779eedf2d 464 * \param[in] invTx invert Tx pad
andreikovacs 0:764779eedf2d 465 * \param[in] invRx invert Rx pad
andreikovacs 0:764779eedf2d 466 *
andreikovacs 0:764779eedf2d 467 * \return status
andreikovacs 0:764779eedf2d 468 *
andreikovacs 0:764779eedf2d 469 ********************************************************************************** */
andreikovacs 0:764779eedf2d 470 #undef mFuncId_c
andreikovacs 0:764779eedf2d 471 #define mFuncId_c 14
andreikovacs 0:764779eedf2d 472 uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
andreikovacs 0:764779eedf2d 473 {
andreikovacs 0:764779eedf2d 474 return PhyPlmeSetANTPadInvertedRequest(invAntA, invAntB, invTx, invRx);
andreikovacs 0:764779eedf2d 475 }
andreikovacs 0:764779eedf2d 476
andreikovacs 0:764779eedf2d 477 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 478 * \brief Set the LQI mode
andreikovacs 0:764779eedf2d 479 *
andreikovacs 0:764779eedf2d 480 * \param[in] mode
andreikovacs 0:764779eedf2d 481 *
andreikovacs 0:764779eedf2d 482 * \return AspStatus_t
andreikovacs 0:764779eedf2d 483 *
andreikovacs 0:764779eedf2d 484 ********************************************************************************** */
andreikovacs 0:764779eedf2d 485 #undef mFuncId_c
andreikovacs 0:764779eedf2d 486 #define mFuncId_c 15
andreikovacs 0:764779eedf2d 487 AspStatus_t Asp_SetLQIMode(bool_t mode)
andreikovacs 0:764779eedf2d 488 {
andreikovacs 0:764779eedf2d 489 if( gPhySuccess_c != PhyPlmeSetLQIModeRequest(mode) )
andreikovacs 0:764779eedf2d 490 {
andreikovacs 0:764779eedf2d 491 return gAspDenied_c;
andreikovacs 0:764779eedf2d 492 }
andreikovacs 0:764779eedf2d 493 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 494 }
andreikovacs 0:764779eedf2d 495
andreikovacs 0:764779eedf2d 496 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 497 * \brief Get the last RSSI level
andreikovacs 0:764779eedf2d 498 *
andreikovacs 0:764779eedf2d 499 * \return RSSI
andreikovacs 0:764779eedf2d 500 *
andreikovacs 0:764779eedf2d 501 ********************************************************************************** */
andreikovacs 0:764779eedf2d 502 #undef mFuncId_c
andreikovacs 0:764779eedf2d 503 #define mFuncId_c 16
andreikovacs 0:764779eedf2d 504 uint8_t Asp_GetRSSILevel(void)
andreikovacs 0:764779eedf2d 505 {
andreikovacs 0:764779eedf2d 506 return PhyPlmeGetRSSILevelRequest();
andreikovacs 0:764779eedf2d 507 }
andreikovacs 0:764779eedf2d 508
andreikovacs 0:764779eedf2d 509 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 510 * \brief Set current channel
andreikovacs 0:764779eedf2d 511 *
andreikovacs 0:764779eedf2d 512 * \param[in] channel channel number (11-26)
andreikovacs 0:764779eedf2d 513 *
andreikovacs 0:764779eedf2d 514 * \return AspStatus_t
andreikovacs 0:764779eedf2d 515 *
andreikovacs 0:764779eedf2d 516 ********************************************************************************** */
andreikovacs 0:764779eedf2d 517 #undef mFuncId_c
andreikovacs 0:764779eedf2d 518 #define mFuncId_c 17
andreikovacs 0:764779eedf2d 519 AspStatus_t ASP_TelecSetFreq(uint8_t channel)
andreikovacs 0:764779eedf2d 520 {
andreikovacs 0:764779eedf2d 521 PhyPlmeForceTrxOffRequest();
andreikovacs 0:764779eedf2d 522 if( gPhySuccess_c != PhyPlmeSetCurrentChannelRequest(channel,0) )
andreikovacs 0:764779eedf2d 523 {
andreikovacs 0:764779eedf2d 524 return gAspInvalidParameter_c;
andreikovacs 0:764779eedf2d 525 }
andreikovacs 0:764779eedf2d 526
andreikovacs 0:764779eedf2d 527 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 528 }
andreikovacs 0:764779eedf2d 529
andreikovacs 0:764779eedf2d 530 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 531 * \brief Send a raw data frame OTA
andreikovacs 0:764779eedf2d 532 *
andreikovacs 0:764779eedf2d 533 * \param[in] dataPtr raw data
andreikovacs 0:764779eedf2d 534 *
andreikovacs 0:764779eedf2d 535 * \return AspStatus_t
andreikovacs 0:764779eedf2d 536 *
andreikovacs 0:764779eedf2d 537 ********************************************************************************** */
andreikovacs 0:764779eedf2d 538 #undef mFuncId_c
andreikovacs 0:764779eedf2d 539 #define mFuncId_c 18
andreikovacs 0:764779eedf2d 540 AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr)
andreikovacs 0:764779eedf2d 541 {
andreikovacs 0:764779eedf2d 542 uint8_t phyReg;
andreikovacs 0:764779eedf2d 543
andreikovacs 0:764779eedf2d 544 dataPtr[0] += 2; /* Add FCS length to PSDU Length*/
andreikovacs 0:764779eedf2d 545
andreikovacs 0:764779eedf2d 546 // Validate the length
andreikovacs 0:764779eedf2d 547 if(dataPtr[0] > gMaxPHYPacketSize_c)
andreikovacs 0:764779eedf2d 548 return gAspTooLong_c;
andreikovacs 0:764779eedf2d 549
andreikovacs 0:764779eedf2d 550 //Force Idle
andreikovacs 0:764779eedf2d 551 PhyPlmeForceTrxOffRequest();
andreikovacs 0:764779eedf2d 552 AspSetDtsMode(gDtsNormal_c);
andreikovacs 0:764779eedf2d 553 AspDisableBER();
andreikovacs 0:764779eedf2d 554 // Load the TX PB: load the PSDU Lenght byte but not the FCS bytes
andreikovacs 0:764779eedf2d 555 MCR20Drv_PB_SPIBurstWrite(dataPtr, dataPtr[0] + 1 - 2);
andreikovacs 0:764779eedf2d 556 // Program a Tx sequence
andreikovacs 0:764779eedf2d 557 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 558 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 559 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 560 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 561 }
andreikovacs 0:764779eedf2d 562
andreikovacs 0:764779eedf2d 563 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 564 * \brief Set Telec test mode
andreikovacs 0:764779eedf2d 565 *
andreikovacs 0:764779eedf2d 566 * \param[in] mode Telec test mode
andreikovacs 0:764779eedf2d 567 *
andreikovacs 0:764779eedf2d 568 * \return AspStatus_t
andreikovacs 0:764779eedf2d 569 *
andreikovacs 0:764779eedf2d 570 ********************************************************************************** */
andreikovacs 0:764779eedf2d 571 #undef mFuncId_c
andreikovacs 0:764779eedf2d 572 #define mFuncId_c 19
andreikovacs 0:764779eedf2d 573 AspStatus_t ASP_TelecTest(uint8_t mode)
andreikovacs 0:764779eedf2d 574 {
andreikovacs 0:764779eedf2d 575 uint8_t phyReg;
andreikovacs 0:764779eedf2d 576 static uint8_t aTxContModPattern[2];
andreikovacs 0:764779eedf2d 577 uint8_t channel;
andreikovacs 0:764779eedf2d 578 static bool_t fracSet = FALSE;
andreikovacs 0:764779eedf2d 579
andreikovacs 0:764779eedf2d 580 // Get current channel number
andreikovacs 0:764779eedf2d 581 channel = PhyPlmeGetCurrentChannelRequest(0);
andreikovacs 0:764779eedf2d 582
andreikovacs 0:764779eedf2d 583 if( fracSet )
andreikovacs 0:764779eedf2d 584 {
andreikovacs 0:764779eedf2d 585 ASP_TelecSetFreq(channel);
andreikovacs 0:764779eedf2d 586 fracSet = FALSE;
andreikovacs 0:764779eedf2d 587 }
andreikovacs 0:764779eedf2d 588
andreikovacs 0:764779eedf2d 589 switch( mode )
andreikovacs 0:764779eedf2d 590 {
andreikovacs 0:764779eedf2d 591 case gTestForceIdle_c: //ForceIdle();
andreikovacs 0:764779eedf2d 592 #ifdef gSmacSupported
andreikovacs 0:764779eedf2d 593 MLMEPhySoftReset();
andreikovacs 0:764779eedf2d 594 #else
andreikovacs 0:764779eedf2d 595 PhyPlmeForceTrxOffRequest();
andreikovacs 0:764779eedf2d 596 #endif
andreikovacs 0:764779eedf2d 597 AspSetDtsMode(gDtsNormal_c);
andreikovacs 0:764779eedf2d 598 AspDisableBER();
andreikovacs 0:764779eedf2d 599 break;
andreikovacs 0:764779eedf2d 600
andreikovacs 0:764779eedf2d 601 case gTestPulseTxPrbs9_c: // Continuously transmit a PRBS9 pattern.
andreikovacs 0:764779eedf2d 602 // PLME_PRBS9_Load (); // Load the TX RAM
andreikovacs 0:764779eedf2d 603 AspSetDtsMode(gDtsTxRandomSeq_c);
andreikovacs 0:764779eedf2d 604 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 605 AspEnableBER();
andreikovacs 0:764779eedf2d 606 // Start Tx packet mode with no interrupt on end
andreikovacs 0:764779eedf2d 607 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 608 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 609 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 610 break;
andreikovacs 0:764779eedf2d 611
andreikovacs 0:764779eedf2d 612 case gTestContinuousRx_c: // Sets the device into continuous RX mode
andreikovacs 0:764779eedf2d 613 AspSetDtsMode(gDtsNormal_c);
andreikovacs 0:764779eedf2d 614 //Enable continuous RX mode
andreikovacs 0:764779eedf2d 615 AspEnableBER();
andreikovacs 0:764779eedf2d 616 // Set length of data in DUAL_PAN_DWELL register
andreikovacs 0:764779eedf2d 617 MCR20Drv_IndirectAccessSPIWrite(DUAL_PAN_DWELL, 127);
andreikovacs 0:764779eedf2d 618 // Start Rx packet mode with no interrupt on end
andreikovacs 0:764779eedf2d 619 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 620 phyReg |= gRX_c;
andreikovacs 0:764779eedf2d 621 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 622 break;
andreikovacs 0:764779eedf2d 623
andreikovacs 0:764779eedf2d 624 case gTestContinuousTxMod_c: // Sets the device to continuously transmit a 10101010 pattern
andreikovacs 0:764779eedf2d 625 AspSetDtsMode(gDtsNormal_c);
andreikovacs 0:764779eedf2d 626 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 627 AspEnableBER();
andreikovacs 0:764779eedf2d 628 //Prepare TX operation
andreikovacs 0:764779eedf2d 629 aTxContModPattern[0] = 1;
andreikovacs 0:764779eedf2d 630 aTxContModPattern[1] = 0xAA;
andreikovacs 0:764779eedf2d 631 // Load the TX PB
andreikovacs 0:764779eedf2d 632 MCR20Drv_PB_SPIBurstWrite(aTxContModPattern, aTxContModPattern[0] + 1);
andreikovacs 0:764779eedf2d 633 // Program a Tx sequence
andreikovacs 0:764779eedf2d 634 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 635 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 636 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 637 break;
andreikovacs 0:764779eedf2d 638
andreikovacs 0:764779eedf2d 639 case gTestContinuousTxNoMod_c: // Sets the device to continuously transmit an unmodulated CW
andreikovacs 0:764779eedf2d 640 //Enable unmodulated TX
andreikovacs 0:764779eedf2d 641 AspSetDtsMode(gDtsTxOne_c);
andreikovacs 0:764779eedf2d 642 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 643 AspEnableBER();
andreikovacs 0:764779eedf2d 644 MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &asp_pll_frac[channel - 11], 2);
andreikovacs 0:764779eedf2d 645 fracSet = TRUE;
andreikovacs 0:764779eedf2d 646 // Program a Tx sequence
andreikovacs 0:764779eedf2d 647 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 648 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 649 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 650 break;
andreikovacs 0:764779eedf2d 651
andreikovacs 0:764779eedf2d 652 case gTestContinuousTx2Mhz_c:
andreikovacs 0:764779eedf2d 653 AspSetDtsMode(gDtsTx2Mhz_c);
andreikovacs 0:764779eedf2d 654 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 655 AspEnableBER();
andreikovacs 0:764779eedf2d 656 // Program a Tx sequence
andreikovacs 0:764779eedf2d 657 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 658 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 659 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 660 break;
andreikovacs 0:764779eedf2d 661
andreikovacs 0:764779eedf2d 662 case gTestContinuousTx200Khz_c:
andreikovacs 0:764779eedf2d 663 AspSetDtsMode(gDtsTx200Khz_c);
andreikovacs 0:764779eedf2d 664 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 665 AspEnableBER();
andreikovacs 0:764779eedf2d 666 // Program a Tx sequence
andreikovacs 0:764779eedf2d 667 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 668 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 669 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 670 break;
andreikovacs 0:764779eedf2d 671
andreikovacs 0:764779eedf2d 672 case gTestContinuousTx1MbpsPRBS9_c:
andreikovacs 0:764779eedf2d 673 AspSetDtsMode(gDtsTx1MbpsPRBS9_c);
andreikovacs 0:764779eedf2d 674 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 675 AspEnableBER();
andreikovacs 0:764779eedf2d 676 // Program a Tx sequence
andreikovacs 0:764779eedf2d 677 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 678 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 679 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 680 break;
andreikovacs 0:764779eedf2d 681
andreikovacs 0:764779eedf2d 682 case gTestContinuousTxExternalSrc_c:
andreikovacs 0:764779eedf2d 683 AspSetDtsMode(gDtsTxExternalSrc_c);
andreikovacs 0:764779eedf2d 684 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 685 AspEnableBER();
andreikovacs 0:764779eedf2d 686 // Program a Tx sequence
andreikovacs 0:764779eedf2d 687 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 688 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 689 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 690 break;
andreikovacs 0:764779eedf2d 691
andreikovacs 0:764779eedf2d 692 case gTestContinuousTxNoModZero_c:
andreikovacs 0:764779eedf2d 693 //Enable unmodulated TX
andreikovacs 0:764779eedf2d 694 AspSetDtsMode(gDtsTxZero_c);
andreikovacs 0:764779eedf2d 695 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 696 AspEnableBER();
andreikovacs 0:764779eedf2d 697 // Program a Tx sequence
andreikovacs 0:764779eedf2d 698 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 699 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 700 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 701 break;
andreikovacs 0:764779eedf2d 702
andreikovacs 0:764779eedf2d 703 case gTestContinuousTxNoModOne_c:
andreikovacs 0:764779eedf2d 704 //Enable unmodulated TX
andreikovacs 0:764779eedf2d 705 AspSetDtsMode(gDtsTxOne_c);
andreikovacs 0:764779eedf2d 706 //Enable continuous TX mode
andreikovacs 0:764779eedf2d 707 AspEnableBER();
andreikovacs 0:764779eedf2d 708 // Program a Tx sequence
andreikovacs 0:764779eedf2d 709 phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
andreikovacs 0:764779eedf2d 710 phyReg |= gTX_c;
andreikovacs 0:764779eedf2d 711 MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 712 break;
andreikovacs 0:764779eedf2d 713 }
andreikovacs 0:764779eedf2d 714
andreikovacs 0:764779eedf2d 715 return gAspSuccess_c;
andreikovacs 0:764779eedf2d 716 }
andreikovacs 0:764779eedf2d 717
andreikovacs 0:764779eedf2d 718 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 719 * \brief Return the instance of the PHY associated with the FSCI interface
andreikovacs 0:764779eedf2d 720 *
andreikovacs 0:764779eedf2d 721 * \param[in] interfaceId FSCI interface
andreikovacs 0:764779eedf2d 722 *
andreikovacs 0:764779eedf2d 723 * \return insance
andreikovacs 0:764779eedf2d 724 *
andreikovacs 0:764779eedf2d 725 ********************************************************************************** */
andreikovacs 0:764779eedf2d 726 #if gFsciIncluded_c
andreikovacs 0:764779eedf2d 727 #undef mFuncId_c
andreikovacs 0:764779eedf2d 728 #define mFuncId_c 20
andreikovacs 0:764779eedf2d 729 static uint32_t getPhyInstance( uint32_t interfaceId )
andreikovacs 0:764779eedf2d 730 {
andreikovacs 0:764779eedf2d 731 uint32_t i;
andreikovacs 0:764779eedf2d 732
andreikovacs 0:764779eedf2d 733 for( i=0; i<gPhyInstancesCnt_c; i++ )
andreikovacs 0:764779eedf2d 734 if( mAspFsciBinding[i] == interfaceId )
andreikovacs 0:764779eedf2d 735 return i;
andreikovacs 0:764779eedf2d 736
andreikovacs 0:764779eedf2d 737 return 0;
andreikovacs 0:764779eedf2d 738 }
andreikovacs 0:764779eedf2d 739
andreikovacs 0:764779eedf2d 740 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 741 * \brief Handle ASP requests received from FSCI
andreikovacs 0:764779eedf2d 742 *
andreikovacs 0:764779eedf2d 743 * \param[in] pData monitored message
andreikovacs 0:764779eedf2d 744 * \param[in] param
andreikovacs 0:764779eedf2d 745 * \param[in] interfaceId FSCI interface
andreikovacs 0:764779eedf2d 746 *
andreikovacs 0:764779eedf2d 747 ********************************************************************************** */
andreikovacs 0:764779eedf2d 748 #undef mFuncId_c
andreikovacs 0:764779eedf2d 749 #define mFuncId_c 21
andreikovacs 0:764779eedf2d 750 static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId)
andreikovacs 0:764779eedf2d 751 {
andreikovacs 0:764779eedf2d 752 clientPacket_t *pClientPacket = ((clientPacket_t*)pData);
andreikovacs 0:764779eedf2d 753 uint8_t *pMsg = pClientPacket->structured.payload;
andreikovacs 0:764779eedf2d 754
andreikovacs 0:764779eedf2d 755 pMsg -= sizeof(AppAspMsgType_t);
andreikovacs 0:764779eedf2d 756 ((AppToAspMessage_t*)pMsg)->msgType = (AppAspMsgType_t)pClientPacket->structured.header.opCode;
andreikovacs 0:764779eedf2d 757
andreikovacs 0:764779eedf2d 758 APP_ASP_SapHandler( (AppToAspMessage_t*)pMsg, getPhyInstance( interfaceId ) );
andreikovacs 0:764779eedf2d 759 MEM_BufferFree(pData);
andreikovacs 0:764779eedf2d 760 }
andreikovacs 0:764779eedf2d 761
andreikovacs 0:764779eedf2d 762 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 763 * \brief Monitor the ASP Requests and Responses
andreikovacs 0:764779eedf2d 764 *
andreikovacs 0:764779eedf2d 765 * \param[in] pData monitored message
andreikovacs 0:764779eedf2d 766 * \param[in] param
andreikovacs 0:764779eedf2d 767 * \param[in] interfaceId FSCI interface
andreikovacs 0:764779eedf2d 768 *
andreikovacs 0:764779eedf2d 769 * \return AspStatus_t
andreikovacs 0:764779eedf2d 770 *
andreikovacs 0:764779eedf2d 771 ********************************************************************************** */
andreikovacs 0:764779eedf2d 772 #undef mFuncId_c
andreikovacs 0:764779eedf2d 773 #define mFuncId_c 22
andreikovacs 0:764779eedf2d 774 static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId)
andreikovacs 0:764779eedf2d 775 {
andreikovacs 0:764779eedf2d 776 clientPacket_t *pFsciPacket = MEM_BufferAlloc( sizeof(clientPacket_t) );
andreikovacs 0:764779eedf2d 777 AppToAspMessage_t *pReq = (AppToAspMessage_t*)pData;
andreikovacs 0:764779eedf2d 778 uint8_t *p;
andreikovacs 0:764779eedf2d 779
andreikovacs 0:764779eedf2d 780 if( NULL == pFsciPacket )
andreikovacs 0:764779eedf2d 781 {
andreikovacs 0:764779eedf2d 782 FSCI_Error( gFsciOutOfMessages_c, interfaceId );
andreikovacs 0:764779eedf2d 783 return;
andreikovacs 0:764779eedf2d 784 }
andreikovacs 0:764779eedf2d 785
andreikovacs 0:764779eedf2d 786 p = pFsciPacket->structured.payload;
andreikovacs 0:764779eedf2d 787
andreikovacs 0:764779eedf2d 788 if( NULL == param ) // Requests
andreikovacs 0:764779eedf2d 789 {
andreikovacs 0:764779eedf2d 790 pFsciPacket->structured.header.opGroup = gFSCI_AppAspOpcodeGroup_c;
andreikovacs 0:764779eedf2d 791 pFsciPacket->structured.header.opCode = pReq->msgType;
andreikovacs 0:764779eedf2d 792
andreikovacs 0:764779eedf2d 793 switch( pReq->msgType )
andreikovacs 0:764779eedf2d 794 {
andreikovacs 0:764779eedf2d 795 case aspMsgTypeGetTimeReq_c:
andreikovacs 0:764779eedf2d 796 break;
andreikovacs 0:764779eedf2d 797 case aspMsgTypeXcvrWriteReq_c:
andreikovacs 0:764779eedf2d 798 case aspMsgTypeXcvrReadReq_c:
andreikovacs 0:764779eedf2d 799 *p++ = pReq->msgData.aspXcvrData.mode;
andreikovacs 0:764779eedf2d 800 *((uint16_t*)p) = pReq->msgData.aspXcvrData.addr;
andreikovacs 0:764779eedf2d 801 p += sizeof(uint16_t);
andreikovacs 0:764779eedf2d 802 *p++ = pReq->msgData.aspXcvrData.len;
andreikovacs 0:764779eedf2d 803 if( pReq->msgType == aspMsgTypeXcvrWriteReq_c )
andreikovacs 0:764779eedf2d 804 {
andreikovacs 0:764779eedf2d 805 FLib_MemCpy( p, pReq->msgData.aspXcvrData.data,
andreikovacs 0:764779eedf2d 806 pReq->msgData.aspXcvrData.len );
andreikovacs 0:764779eedf2d 807 p += pReq->msgData.aspXcvrData.len;
andreikovacs 0:764779eedf2d 808 }
andreikovacs 0:764779eedf2d 809 break;
andreikovacs 0:764779eedf2d 810 case aspMsgTypeSetFADState_c:
andreikovacs 0:764779eedf2d 811 FLib_MemCpy( p, &pReq->msgData.aspFADState, sizeof(pReq->msgData.aspFADState) );
andreikovacs 0:764779eedf2d 812 p += sizeof(pReq->msgData.aspFADState);
andreikovacs 0:764779eedf2d 813 break;
andreikovacs 0:764779eedf2d 814 case aspMsgTypeSetFADThreshold_c:
andreikovacs 0:764779eedf2d 815 FLib_MemCpy( p, &pReq->msgData.aspFADThreshold, sizeof(pReq->msgData.aspFADThreshold) );
andreikovacs 0:764779eedf2d 816 p += sizeof(pReq->msgData.aspFADThreshold);
andreikovacs 0:764779eedf2d 817 break;
andreikovacs 0:764779eedf2d 818 case aspMsgTypeSetANTXState_c:
andreikovacs 0:764779eedf2d 819 FLib_MemCpy( p, &pReq->msgData.aspANTXState, sizeof(pReq->msgData.aspANTXState) );
andreikovacs 0:764779eedf2d 820 p += sizeof(pReq->msgData.aspANTXState);
andreikovacs 0:764779eedf2d 821 break;
andreikovacs 0:764779eedf2d 822 case aspMsgTypeGetANTXState_c:
andreikovacs 0:764779eedf2d 823 /* Nothing to do here */
andreikovacs 0:764779eedf2d 824 break;
andreikovacs 0:764779eedf2d 825
andreikovacs 0:764779eedf2d 826 case aspMsgTypeSetPowerLevel_c:
andreikovacs 0:764779eedf2d 827 FLib_MemCpy( p, &pReq->msgData.aspSetPowerLevelReq, sizeof(pReq->msgData.aspSetPowerLevelReq) );
andreikovacs 0:764779eedf2d 828 p += sizeof(pReq->msgData.aspSetPowerLevelReq);
andreikovacs 0:764779eedf2d 829 break;
andreikovacs 0:764779eedf2d 830 case aspMsgTypeGetPowerLevel_c:
andreikovacs 0:764779eedf2d 831 /* Nothing to do here */
andreikovacs 0:764779eedf2d 832 break;
andreikovacs 0:764779eedf2d 833 case aspMsgTypeTelecSetFreq_c:
andreikovacs 0:764779eedf2d 834 FLib_MemCpy( p, &pReq->msgData.aspTelecsetFreq, sizeof(pReq->msgData.aspTelecsetFreq) );
andreikovacs 0:764779eedf2d 835 p += sizeof(pReq->msgData.aspTelecsetFreq);
andreikovacs 0:764779eedf2d 836 break;
andreikovacs 0:764779eedf2d 837 case aspMsgTypeTelecSendRawData_c:
andreikovacs 0:764779eedf2d 838 FLib_MemCpy( p, &pReq->msgData.aspTelecSendRawData, sizeof(pReq->msgData.aspTelecSendRawData) );
andreikovacs 0:764779eedf2d 839 p += sizeof(pReq->msgData.aspTelecSendRawData);
andreikovacs 0:764779eedf2d 840 break;
andreikovacs 0:764779eedf2d 841 case aspMsgTypeTelecTest_c:
andreikovacs 0:764779eedf2d 842 FLib_MemCpy( p, &pReq->msgData.aspTelecTest, sizeof(pReq->msgData.aspTelecTest) );
andreikovacs 0:764779eedf2d 843 p += sizeof(pReq->msgData.aspTelecTest);
andreikovacs 0:764779eedf2d 844 break;
andreikovacs 0:764779eedf2d 845 case aspMsgTypeSetLQIMode_c:
andreikovacs 0:764779eedf2d 846 FLib_MemCpy(p, &pReq->msgData.aspLQIMode, sizeof(pReq->msgData.aspLQIMode) );
andreikovacs 0:764779eedf2d 847 p += sizeof(pReq->msgData.aspLQIMode);
andreikovacs 0:764779eedf2d 848 break;
andreikovacs 0:764779eedf2d 849 case aspMsgTypeGetRSSILevel_c:
andreikovacs 0:764779eedf2d 850 /* Nothing to do here */
andreikovacs 0:764779eedf2d 851 break;
andreikovacs 0:764779eedf2d 852 }
andreikovacs 0:764779eedf2d 853 }
andreikovacs 0:764779eedf2d 854 else // Confirms / Indications
andreikovacs 0:764779eedf2d 855 {
andreikovacs 0:764779eedf2d 856 pFsciPacket->structured.header.opGroup = gFSCI_AspAppOpcodeGroup_c;
andreikovacs 0:764779eedf2d 857 pFsciPacket->structured.header.opCode = pReq->msgType;
andreikovacs 0:764779eedf2d 858
andreikovacs 0:764779eedf2d 859 *p++ = *((uint8_t*)param);/* copy status */
andreikovacs 0:764779eedf2d 860
andreikovacs 0:764779eedf2d 861 switch( pReq->msgType )
andreikovacs 0:764779eedf2d 862 {
andreikovacs 0:764779eedf2d 863 case aspMsgTypeGetTimeReq_c:
andreikovacs 0:764779eedf2d 864 FLib_MemCpy( p, &pReq->msgData.aspGetTimeReq.time , sizeof(aspEventReq_t) );
andreikovacs 0:764779eedf2d 865 p += sizeof(aspEventReq_t);
andreikovacs 0:764779eedf2d 866 break;
andreikovacs 0:764779eedf2d 867 case aspMsgTypeGetMpmConfig_c:
andreikovacs 0:764779eedf2d 868 FLib_MemCpy( p, &pReq->msgData.MpmConfig , sizeof(mpmConfig_t) );
andreikovacs 0:764779eedf2d 869 p += sizeof(mpmConfig_t);
andreikovacs 0:764779eedf2d 870 break;
andreikovacs 0:764779eedf2d 871 case aspMsgTypeXcvrReadReq_c:
andreikovacs 0:764779eedf2d 872 *p++ = pReq->msgData.aspXcvrData.len; /* copy length */
andreikovacs 0:764779eedf2d 873 FLib_MemCpy( p, pReq->msgData.aspXcvrData.data, pReq->msgData.aspXcvrData.len );
andreikovacs 0:764779eedf2d 874 p += pReq->msgData.aspXcvrData.len;
andreikovacs 0:764779eedf2d 875 break;
andreikovacs 0:764779eedf2d 876 }
andreikovacs 0:764779eedf2d 877
andreikovacs 0:764779eedf2d 878 }
andreikovacs 0:764779eedf2d 879
andreikovacs 0:764779eedf2d 880 /* Send data over the serial interface */
andreikovacs 0:764779eedf2d 881 pFsciPacket->structured.header.len = (fsciLen_t)(p - pFsciPacket->structured.payload);
andreikovacs 0:764779eedf2d 882
andreikovacs 0:764779eedf2d 883 if ( pFsciPacket->structured.header.len )
andreikovacs 0:764779eedf2d 884 FSCI_transmitFormatedPacket( pFsciPacket, interfaceId );
andreikovacs 0:764779eedf2d 885 else
andreikovacs 0:764779eedf2d 886 MEM_BufferFree( pFsciPacket );
andreikovacs 0:764779eedf2d 887 }
andreikovacs 0:764779eedf2d 888
andreikovacs 0:764779eedf2d 889 #endif /* gFsciIncluded_c */
andreikovacs 0:764779eedf2d 890
andreikovacs 0:764779eedf2d 891
andreikovacs 0:764779eedf2d 892 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 893 * \brief Set the Tx data source selector
andreikovacs 0:764779eedf2d 894 *
andreikovacs 0:764779eedf2d 895 * \param[in] mode
andreikovacs 0:764779eedf2d 896 *
andreikovacs 0:764779eedf2d 897 * \return AspStatus_t
andreikovacs 0:764779eedf2d 898 *
andreikovacs 0:764779eedf2d 899 ********************************************************************************** */
andreikovacs 0:764779eedf2d 900 phyStatus_t AspSetDtsMode(uint8_t mode)
andreikovacs 0:764779eedf2d 901 {
andreikovacs 0:764779eedf2d 902 uint8_t phyReg;
andreikovacs 0:764779eedf2d 903
andreikovacs 0:764779eedf2d 904 phyReg = MCR20Drv_IndirectAccessSPIRead(TX_MODE_CTRL);
andreikovacs 0:764779eedf2d 905 phyReg &= ~cTX_MODE_CTRL_DTS_MASK; // Clear DTS_MODE
andreikovacs 0:764779eedf2d 906 phyReg |= mode; // Set new DTS_MODE
andreikovacs 0:764779eedf2d 907 MCR20Drv_IndirectAccessSPIWrite(TX_MODE_CTRL, phyReg);
andreikovacs 0:764779eedf2d 908
andreikovacs 0:764779eedf2d 909 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 910 }
andreikovacs 0:764779eedf2d 911
andreikovacs 0:764779eedf2d 912 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 913 * \brief Enable XCVR test mode
andreikovacs 0:764779eedf2d 914 *
andreikovacs 0:764779eedf2d 915 * \return AspStatus_t
andreikovacs 0:764779eedf2d 916 *
andreikovacs 0:764779eedf2d 917 ********************************************************************************** */
andreikovacs 0:764779eedf2d 918 phyStatus_t AspEnableBER()
andreikovacs 0:764779eedf2d 919 {
andreikovacs 0:764779eedf2d 920 uint8_t phyReg;
andreikovacs 0:764779eedf2d 921
andreikovacs 0:764779eedf2d 922 phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
andreikovacs 0:764779eedf2d 923 phyReg |= cDTM_CTRL1_DTM_EN;
andreikovacs 0:764779eedf2d 924 MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 925
andreikovacs 0:764779eedf2d 926 phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
andreikovacs 0:764779eedf2d 927 phyReg |= cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN;
andreikovacs 0:764779eedf2d 928 MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
andreikovacs 0:764779eedf2d 929
andreikovacs 0:764779eedf2d 930 return gPhySuccess_c;
andreikovacs 0:764779eedf2d 931 }
andreikovacs 0:764779eedf2d 932
andreikovacs 0:764779eedf2d 933 /*! *********************************************************************************
andreikovacs 0:764779eedf2d 934 * \brief Disable XCVR test mode
andreikovacs 0:764779eedf2d 935 *
andreikovacs 0:764779eedf2d 936 ********************************************************************************** */
andreikovacs 0:764779eedf2d 937 void AspDisableBER()
andreikovacs 0:764779eedf2d 938 {
andreikovacs 0:764779eedf2d 939 uint8_t phyReg;
andreikovacs 0:764779eedf2d 940
andreikovacs 0:764779eedf2d 941 phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
andreikovacs 0:764779eedf2d 942 phyReg &= ~cDTM_CTRL1_DTM_EN;
andreikovacs 0:764779eedf2d 943 MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
andreikovacs 0:764779eedf2d 944
andreikovacs 0:764779eedf2d 945 phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
andreikovacs 0:764779eedf2d 946 phyReg &= ~(cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN);
andreikovacs 0:764779eedf2d 947 MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
andreikovacs 0:764779eedf2d 948 }
andreikovacs 0:764779eedf2d 949
andreikovacs 0:764779eedf2d 950
andreikovacs 0:764779eedf2d 951 #endif /* gAspCapability_d */