Diff: NeuroShieldSPI.cpp

Revision:

1:0c6bf23f2fc8

Parent:

0:529602524696

Child:

2:2812bcbcaaea

--- a/NeuroShieldSPI.cpp	Thu Aug 17 23:31:15 2017 +0000
+++ b/NeuroShieldSPI.cpp	Thu Jan 25 02:20:37 2018 +0000
@@ -31,6 +31,14 @@
  *
  */
 
+/*
+ * Revision History (v1.1.3)
+ * 2018/01/03    v1.1.3    Add burst-mode read
+ * 2017/12/20    v1.1.2    Modify the structure of neurondata
+ * 2017/12/11    v1.1.1    Add Powersave command and Minor changes to the library
+ * 2017/08/17    v1.0.0    First Release
+ */
+
 #include "mbed.h"
 #include <NeuroShield.h>
 #include <NeuroShieldSPI.h>
@@ -100,6 +108,29 @@
     return(data);
 }
 
+void NeuroShieldSPI::readVector16(uint16_t* data, uint16_t size)
+{
+    //device.lock();
+    
+    nm500_ss = LOW;
+    device.write(1);
+    device.write((uint8_t)module_nm500);
+    device.write(0);
+    device.write(0);
+    device.write(NM_COMP);
+    device.write(0);
+    device.write((uint8_t)((size >> 8) & 0x00FF));
+    device.write((uint8_t)(size & 0x00FF));
+    for (int i = 0; i < size; i++) {
+        *data = device.write(0);
+        *data = (*data << 8) + device.write(0);
+        data++;
+    }
+    nm500_ss = HIGH;
+    
+    //device.unlock();
+}
+
 // ---------------------------------------------------------
 // SPI Write the register of a given module (module + reg = addr)
 // ---------------------------------------------------------
@@ -132,9 +163,9 @@
 // ----------------------------------------------------------------
 // SPI Write burst mode at COMP register
 // ----------------------------------------------------------------
-uint16_t NeuroShieldSPI::writeVector(uint8_t reg, uint8_t* data, uint16_t size)
+uint16_t NeuroShieldSPI::writeVector(uint8_t* data, uint16_t size)
 {
-    if ((reg != NM_COMP) || (size > 255))
+    if (size > NEURON_SIZE)                         // to use SR-mode
         return(0);
     
     //device.lock();
@@ -144,10 +175,10 @@
     device.write((uint8_t)(module_nm500 + 0x80));   // module and write flag
     device.write(0);
     device.write(0);
-    device.write(reg);
+    device.write(NM_COMP);
     device.write(0);
-    device.write(0);
-    device.write((uint8_t)size);                    // 0 ~ 255 byte
+    device.write((uint8_t)((size >> 8) & 0x00FF));
+    device.write((uint8_t)(size & 0x00FF));         // 1 ~ 256 byte
     for (int i = 0; i < size; i++) {
         device.write(0x00);                         // COMP' upper data = 0x00
         device.write((uint8_t)(*data));             // lower data
@@ -160,6 +191,34 @@
     return(size);
 }
 
+uint16_t NeuroShieldSPI::writeVector16(uint16_t* data, uint16_t size)
+{
+    if (size > NEURON_SIZE)                         // to use SR-mode
+        return(0);
+    
+    //device.lock();
+    
+    nm500_ss = LOW;
+    device.write(1);                                // Dummy for ID
+    device.write((uint8_t)(module_nm500 + 0x80));   // module and write flag
+    device.write(0);
+    device.write(0);
+    device.write(NM_COMP);
+    device.write(0);
+    device.write((uint8_t)((size >> 8) & 0x00FF));
+    device.write((uint8_t)(size & 0x00FF));         // 1 ~ 256 byte
+    for (int i = 0; i < size; i++) {
+        device.write(0x00);                         // COMP' upper data = 0x00
+        device.write((uint8_t)((*data) & 0x00FF));  // lower data
+        data++;
+    }
+    nm500_ss = HIGH;
+    
+    //device.unlock();
+    
+    return(size);
+}
+
 // ----------------------------------------------------------------
 // read FPGA Version
 // ----------------------------------------------------------------