Morpheus / target-mcu-k64f

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hal/TARGET_FRDM/PeripheralNames.h@0:c5e2f793b59a, 2016-03-23 (annotated)

Committer:
screamer
Date:
Wed Mar 23 21:24:48 2016 +0000
Revision:
0:c5e2f793b59a
Initial revision

Who changed what in which revision?

UserRevisionLine numberNew contents of line
screamer 0:c5e2f793b59a 1 /* mbed Microcontroller Library
screamer 0:c5e2f793b59a 2 * Copyright (c) 2006-2013 ARM Limited
screamer 0:c5e2f793b59a 3 *
screamer 0:c5e2f793b59a 4 * Licensed under the Apache License, Version 2.0 (the "License");
screamer 0:c5e2f793b59a 5 * you may not use this file except in compliance with the License.
screamer 0:c5e2f793b59a 6 * You may obtain a copy of the License at
screamer 0:c5e2f793b59a 7 *
screamer 0:c5e2f793b59a 8 * http://www.apache.org/licenses/LICENSE-2.0
screamer 0:c5e2f793b59a 9 *
screamer 0:c5e2f793b59a 10 * Unless required by applicable law or agreed to in writing, software
screamer 0:c5e2f793b59a 11 * distributed under the License is distributed on an "AS IS" BASIS,
screamer 0:c5e2f793b59a 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
screamer 0:c5e2f793b59a 13 * See the License for the specific language governing permissions and
screamer 0:c5e2f793b59a 14 * limitations under the License.
screamer 0:c5e2f793b59a 15 */
screamer 0:c5e2f793b59a 16 #ifndef MBED_PERIPHERALNAMES_H
screamer 0:c5e2f793b59a 17 #define MBED_PERIPHERALNAMES_H
screamer 0:c5e2f793b59a 18
screamer 0:c5e2f793b59a 19 #include "cmsis.h"
screamer 0:c5e2f793b59a 20
screamer 0:c5e2f793b59a 21 #ifdef __cplusplus
screamer 0:c5e2f793b59a 22 extern "C" {
screamer 0:c5e2f793b59a 23 #endif
screamer 0:c5e2f793b59a 24
screamer 0:c5e2f793b59a 25 typedef enum {
screamer 0:c5e2f793b59a 26 OSC32KCLK = 0,
screamer 0:c5e2f793b59a 27 } RTCName;
screamer 0:c5e2f793b59a 28
screamer 0:c5e2f793b59a 29 typedef enum {
screamer 0:c5e2f793b59a 30 UART_0 = 0,
screamer 0:c5e2f793b59a 31 UART_1 = 1,
screamer 0:c5e2f793b59a 32 UART_2 = 2,
screamer 0:c5e2f793b59a 33 UART_3 = 3,
screamer 0:c5e2f793b59a 34 UART_4 = 4,
screamer 0:c5e2f793b59a 35 } UARTName;
screamer 0:c5e2f793b59a 36
screamer 0:c5e2f793b59a 37 #define STDIO_UART_TX USBTX
screamer 0:c5e2f793b59a 38 #define STDIO_UART_RX USBRX
screamer 0:c5e2f793b59a 39 #define STDIO_UART UART_0
screamer 0:c5e2f793b59a 40
screamer 0:c5e2f793b59a 41 typedef enum {
screamer 0:c5e2f793b59a 42 I2C_0 = 0,
screamer 0:c5e2f793b59a 43 I2C_1 = 1,
screamer 0:c5e2f793b59a 44 I2C_2 = 2,
screamer 0:c5e2f793b59a 45 } I2CName;
screamer 0:c5e2f793b59a 46
screamer 0:c5e2f793b59a 47 #define TPM_SHIFT 8
screamer 0:c5e2f793b59a 48 typedef enum {
screamer 0:c5e2f793b59a 49 PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
screamer 0:c5e2f793b59a 50 PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
screamer 0:c5e2f793b59a 51 PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
screamer 0:c5e2f793b59a 52 PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
screamer 0:c5e2f793b59a 53 PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
screamer 0:c5e2f793b59a 54 PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
screamer 0:c5e2f793b59a 55 PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
screamer 0:c5e2f793b59a 56 PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
screamer 0:c5e2f793b59a 57 PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
screamer 0:c5e2f793b59a 58 PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
screamer 0:c5e2f793b59a 59 PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
screamer 0:c5e2f793b59a 60 PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
screamer 0:c5e2f793b59a 61 PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
screamer 0:c5e2f793b59a 62 PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
screamer 0:c5e2f793b59a 63 PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
screamer 0:c5e2f793b59a 64 PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
screamer 0:c5e2f793b59a 65 PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
screamer 0:c5e2f793b59a 66 PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
screamer 0:c5e2f793b59a 67 PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
screamer 0:c5e2f793b59a 68 PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
screamer 0:c5e2f793b59a 69 PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
screamer 0:c5e2f793b59a 70 PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
screamer 0:c5e2f793b59a 71 PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
screamer 0:c5e2f793b59a 72 PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
screamer 0:c5e2f793b59a 73 // could be 4 or could be 3... not sure what register
screamer 0:c5e2f793b59a 74 // this is for... too much abstraction
screamer 0:c5e2f793b59a 75 PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
screamer 0:c5e2f793b59a 76 PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
screamer 0:c5e2f793b59a 77 PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
screamer 0:c5e2f793b59a 78 PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
screamer 0:c5e2f793b59a 79 PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
screamer 0:c5e2f793b59a 80 PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
screamer 0:c5e2f793b59a 81 PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
screamer 0:c5e2f793b59a 82 PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
screamer 0:c5e2f793b59a 83 } PWMName;
screamer 0:c5e2f793b59a 84
screamer 0:c5e2f793b59a 85 #define ADC_INSTANCE_SHIFT 8
screamer 0:c5e2f793b59a 86 #define ADC_B_CHANNEL_SHIFT 5
screamer 0:c5e2f793b59a 87 typedef enum {
screamer 0:c5e2f793b59a 88 ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
screamer 0:c5e2f793b59a 89 ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
screamer 0:c5e2f793b59a 90 ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
screamer 0:c5e2f793b59a 91 ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
screamer 0:c5e2f793b59a 92 ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
screamer 0:c5e2f793b59a 93 ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
screamer 0:c5e2f793b59a 94 ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
screamer 0:c5e2f793b59a 95 ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
screamer 0:c5e2f793b59a 96 ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
screamer 0:c5e2f793b59a 97 ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
screamer 0:c5e2f793b59a 98 ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
screamer 0:c5e2f793b59a 99 ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
screamer 0:c5e2f793b59a 100 ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
screamer 0:c5e2f793b59a 101 ADC0_SE21 = (0 << ADC_INSTANCE_SHIFT) | 21,
screamer 0:c5e2f793b59a 102 ADC0_SE22 = (0 << ADC_INSTANCE_SHIFT) | 22,
screamer 0:c5e2f793b59a 103 ADC0_SE23 = (0 << ADC_INSTANCE_SHIFT) | 23,
screamer 0:c5e2f793b59a 104 ADC1_SE4a = (1 << ADC_INSTANCE_SHIFT) | 4,
screamer 0:c5e2f793b59a 105 ADC1_SE5a = (1 << ADC_INSTANCE_SHIFT) | 5,
screamer 0:c5e2f793b59a 106 ADC1_SE6a = (1 << ADC_INSTANCE_SHIFT) | 6,
screamer 0:c5e2f793b59a 107 ADC1_SE7a = (1 << ADC_INSTANCE_SHIFT) | 7,
screamer 0:c5e2f793b59a 108 ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
screamer 0:c5e2f793b59a 109 ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
screamer 0:c5e2f793b59a 110 ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
screamer 0:c5e2f793b59a 111 ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
screamer 0:c5e2f793b59a 112 ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
screamer 0:c5e2f793b59a 113 ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
screamer 0:c5e2f793b59a 114 ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
screamer 0:c5e2f793b59a 115 ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
screamer 0:c5e2f793b59a 116 ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
screamer 0:c5e2f793b59a 117 ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
screamer 0:c5e2f793b59a 118 ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
screamer 0:c5e2f793b59a 119 ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
screamer 0:c5e2f793b59a 120 ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
screamer 0:c5e2f793b59a 121 ADC1_SE23 = (1 << ADC_INSTANCE_SHIFT) | 23,
screamer 0:c5e2f793b59a 122 } ADCName;
screamer 0:c5e2f793b59a 123
screamer 0:c5e2f793b59a 124 typedef enum {
screamer 0:c5e2f793b59a 125 DAC_0 = 0
screamer 0:c5e2f793b59a 126 } DACName;
screamer 0:c5e2f793b59a 127
screamer 0:c5e2f793b59a 128
screamer 0:c5e2f793b59a 129 typedef enum {
screamer 0:c5e2f793b59a 130 SPI_0 = 0,
screamer 0:c5e2f793b59a 131 SPI_1 = 1,
screamer 0:c5e2f793b59a 132 SPI_2 = 2,
screamer 0:c5e2f793b59a 133 } SPIName;
screamer 0:c5e2f793b59a 134
screamer 0:c5e2f793b59a 135 #ifdef __cplusplus
screamer 0:c5e2f793b59a 136 }
screamer 0:c5e2f793b59a 137 #endif
screamer 0:c5e2f793b59a 138
screamer 0:c5e2f793b59a 139 #endif